xref: /qemu/hw/ppc/spapr_cpu_core.c (revision bf8d4924) 
1 /*
2  * sPAPR CPU core device, acts as container of CPU thread devices.
3  *
4  * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
7  * See the COPYING file in the top-level directory.
8  */
9 #include "hw/cpu/core.h"
10 #include "hw/ppc/spapr_cpu_core.h"
11 #include "target-ppc/cpu.h"
12 #include "hw/ppc/spapr.h"
13 #include "hw/boards.h"
14 #include "qapi/error.h"
15 #include <sysemu/cpus.h>
16 #include "target-ppc/kvm_ppc.h"
17 #include "hw/ppc/ppc.h"
18 #include "target-ppc/mmu-hash64.h"
19 #include <sysemu/numa.h>
20 
21 static void spapr_cpu_reset(void *opaque)
22 {
23     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
24     PowerPCCPU *cpu = opaque;
25     CPUState *cs = CPU(cpu);
26     CPUPPCState *env = &cpu->env;
27 
28     cpu_reset(cs);
29 
30     /* All CPUs start halted.  CPU0 is unhalted from the machine level
31      * reset code and the rest are explicitly started up by the guest
32      * using an RTAS call */
33     cs->halted = 1;
34 
35     env->spr[SPR_HIOR] = 0;
36 
37     ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
38                                 &error_fatal);
39 }
40 
41 static void spapr_cpu_destroy(PowerPCCPU *cpu)
42 {
43     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
44 
45     xics_cpu_destroy(spapr->xics, cpu);
46     qemu_unregister_reset(spapr_cpu_reset, cpu);
47 }
48 
49 void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
50 {
51     CPUPPCState *env = &cpu->env;
52     CPUState *cs = CPU(cpu);
53     int i;
54 
55     /* Set time-base frequency to 512 MHz */
56     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
57 
58     /* Enable PAPR mode in TCG or KVM */
59     cpu_ppc_set_papr(cpu);
60 
61     if (cpu->max_compat) {
62         Error *local_err = NULL;
63 
64         ppc_set_compat(cpu, cpu->max_compat, &local_err);
65         if (local_err) {
66             error_propagate(errp, local_err);
67             return;
68         }
69     }
70 
71     /* Set NUMA node for the added CPUs  */
72     for (i = 0; i < nb_numa_nodes; i++) {
73         if (test_bit(cs->cpu_index, numa_info[i].node_cpu)) {
74             cs->numa_node = i;
75             break;
76         }
77     }
78 
79     xics_cpu_setup(spapr->xics, cpu);
80 
81     qemu_register_reset(spapr_cpu_reset, cpu);
82     spapr_cpu_reset(cpu);
83 }
84 
85 /*
86  * Return the sPAPR CPU core type for @model which essentially is the CPU
87  * model specified with -cpu cmdline option.
88  */
89 char *spapr_get_cpu_core_type(const char *model)
90 {
91     char *core_type;
92     gchar **model_pieces = g_strsplit(model, ",", 2);
93 
94     core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE);
95     g_strfreev(model_pieces);
96     return core_type;
97 }
98 
99 static void spapr_core_release(DeviceState *dev, void *opaque)
100 {
101     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
102     const char *typename = object_class_get_name(sc->cpu_class);
103     size_t size = object_type_get_instance_size(typename);
104     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
105     CPUCore *cc = CPU_CORE(dev);
106     int smt = kvmppc_smt_threads();
107     int i;
108 
109     for (i = 0; i < cc->nr_threads; i++) {
110         void *obj = sc->threads + i * size;
111         DeviceState *dev = DEVICE(obj);
112         CPUState *cs = CPU(dev);
113         PowerPCCPU *cpu = POWERPC_CPU(cs);
114 
115         spapr_cpu_destroy(cpu);
116         cpu_remove_sync(cs);
117         object_unparent(obj);
118     }
119 
120     spapr->cores[cc->core_id / smt] = NULL;
121 
122     g_free(sc->threads);
123     object_unparent(OBJECT(dev));
124 }
125 
126 void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
127                        Error **errp)
128 {
129     sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
130     PowerPCCPU *cpu = POWERPC_CPU(core->threads);
131     int id = ppc_get_vcpu_dt_id(cpu);
132     sPAPRDRConnector *drc =
133         spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, id);
134     sPAPRDRConnectorClass *drck;
135     Error *local_err = NULL;
136 
137     g_assert(drc);
138 
139     drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
140     drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
141     if (local_err) {
142         error_propagate(errp, local_err);
143         return;
144     }
145 
146     spapr_hotplug_req_remove_by_index(drc);
147 }
148 
149 void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
150                      Error **errp)
151 {
152     sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(OBJECT(hotplug_dev));
153     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
154     sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
155     CPUCore *cc = CPU_CORE(dev);
156     CPUState *cs = CPU(core->threads);
157     sPAPRDRConnector *drc;
158     sPAPRDRConnectorClass *drck;
159     Error *local_err = NULL;
160     void *fdt = NULL;
161     int fdt_offset = 0;
162     int index;
163     int smt = kvmppc_smt_threads();
164 
165     drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, cc->core_id);
166     index = cc->core_id / smt;
167     spapr->cores[index] = OBJECT(dev);
168 
169     if (!smc->dr_cpu_enabled) {
170         /*
171          * This is a cold plugged CPU core but the machine doesn't support
172          * DR. So skip the hotplug path ensuring that the core is brought
173          * up online with out an associated DR connector.
174          */
175         return;
176     }
177 
178     g_assert(drc);
179 
180     /*
181      * Setup CPU DT entries only for hotplugged CPUs. For boot time or
182      * coldplugged CPUs DT entries are setup in spapr_finalize_fdt().
183      */
184     if (dev->hotplugged) {
185         fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
186     }
187 
188     drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
189     drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
190     if (local_err) {
191         g_free(fdt);
192         spapr->cores[index] = NULL;
193         error_propagate(errp, local_err);
194         return;
195     }
196 
197     if (dev->hotplugged) {
198         /*
199          * Send hotplug notification interrupt to the guest only in case
200          * of hotplugged CPUs.
201          */
202         spapr_hotplug_req_add_by_index(drc);
203     } else {
204         /*
205          * Set the right DRC states for cold plugged CPU.
206          */
207         drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
208         drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
209     }
210 }
211 
212 void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
213                          Error **errp)
214 {
215     MachineState *machine = MACHINE(OBJECT(hotplug_dev));
216     sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(OBJECT(hotplug_dev));
217     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
218     int spapr_max_cores = max_cpus / smp_threads;
219     int index;
220     int smt = kvmppc_smt_threads();
221     Error *local_err = NULL;
222     CPUCore *cc = CPU_CORE(dev);
223     char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
224     const char *type = object_get_typename(OBJECT(dev));
225 
226     if (strcmp(base_core_type, type)) {
227         error_setg(&local_err, "CPU core type should be %s", base_core_type);
228         goto out;
229     }
230 
231     if (!smc->dr_cpu_enabled && dev->hotplugged) {
232         error_setg(&local_err, "CPU hotplug not supported for this machine");
233         goto out;
234     }
235 
236     if (cc->nr_threads != smp_threads) {
237         error_setg(&local_err, "threads must be %d", smp_threads);
238         goto out;
239     }
240 
241     if (cc->core_id % smt) {
242         error_setg(&local_err, "invalid core id %d\n", cc->core_id);
243         goto out;
244     }
245 
246     index = cc->core_id / smt;
247     if (index < 0 || index >= spapr_max_cores) {
248         error_setg(&local_err, "core id %d out of range", cc->core_id);
249         goto out;
250     }
251 
252     if (spapr->cores[index]) {
253         error_setg(&local_err, "core %d already populated", cc->core_id);
254         goto out;
255     }
256 
257 out:
258     g_free(base_core_type);
259     error_propagate(errp, local_err);
260 }
261 
262 static int spapr_cpu_core_realize_child(Object *child, void *opaque)
263 {
264     Error **errp = opaque, *local_err = NULL;
265     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
266     CPUState *cs = CPU(child);
267     PowerPCCPU *cpu = POWERPC_CPU(cs);
268 
269     object_property_set_bool(child, true, "realized", &local_err);
270     if (local_err) {
271         error_propagate(errp, local_err);
272         return 1;
273     }
274 
275     spapr_cpu_init(spapr, cpu, &local_err);
276     if (local_err) {
277         error_propagate(errp, local_err);
278         return 1;
279     }
280     return 0;
281 }
282 
283 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
284 {
285     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
286     CPUCore *cc = CPU_CORE(OBJECT(dev));
287     const char *typename = object_class_get_name(sc->cpu_class);
288     size_t size = object_type_get_instance_size(typename);
289     Error *local_err = NULL;
290     Object *obj;
291     int i;
292 
293     sc->threads = g_malloc0(size * cc->nr_threads);
294     for (i = 0; i < cc->nr_threads; i++) {
295         char id[32];
296         void *obj = sc->threads + i * size;
297 
298         object_initialize(obj, size, typename);
299         snprintf(id, sizeof(id), "thread[%d]", i);
300         object_property_add_child(OBJECT(sc), id, obj, &local_err);
301         if (local_err) {
302             goto err;
303         }
304         object_unref(obj);
305     }
306     object_child_foreach(OBJECT(dev), spapr_cpu_core_realize_child, &local_err);
307     if (local_err) {
308         goto err;
309     } else {
310         return;
311     }
312 
313 err:
314     while (--i >= 0) {
315         obj = sc->threads + i * size;
316         object_unparent(obj);
317     }
318     g_free(sc->threads);
319     error_propagate(errp, local_err);
320 }
321 
322 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
323 {
324     DeviceClass *dc = DEVICE_CLASS(oc);
325     dc->realize = spapr_cpu_core_realize;
326 }
327 
328 /*
329  * instance_init routines from different flavours of sPAPR CPU cores.
330  */
331 #define SPAPR_CPU_CORE_INITFN(_type, _fname) \
332 static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \
333 { \
334     sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \
335     char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \
336     ObjectClass *oc = object_class_by_name(name); \
337     g_assert(oc); \
338     g_free((void *)name); \
339     core->cpu_class = oc; \
340 }
341 
342 SPAPR_CPU_CORE_INITFN(970mp_v1.0, 970MP_v10);
343 SPAPR_CPU_CORE_INITFN(970mp_v1.1, 970MP_v11);
344 SPAPR_CPU_CORE_INITFN(970_v2.2, 970);
345 SPAPR_CPU_CORE_INITFN(POWER5+_v2.1, POWER5plus);
346 SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7);
347 SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus);
348 SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8);
349 SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E);
350 SPAPR_CPU_CORE_INITFN(POWER8NVL_v1.0, POWER8NVL);
351 
352 typedef struct SPAPRCoreInfo {
353     const char *name;
354     void (*initfn)(Object *obj);
355 } SPAPRCoreInfo;
356 
357 static const SPAPRCoreInfo spapr_cores[] = {
358     /* 970 and aliaes */
359     { .name = "970_v2.2", .initfn = spapr_cpu_core_970_initfn },
360     { .name = "970", .initfn = spapr_cpu_core_970_initfn },
361 
362     /* 970MP variants and aliases */
363     { .name = "970MP_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
364     { .name = "970mp_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
365     { .name = "970MP_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
366     { .name = "970mp_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
367     { .name = "970mp", .initfn = spapr_cpu_core_970MP_v11_initfn },
368 
369     /* POWER5 and aliases */
370     { .name = "POWER5+_v2.1", .initfn = spapr_cpu_core_POWER5plus_initfn },
371     { .name = "POWER5+", .initfn = spapr_cpu_core_POWER5plus_initfn },
372 
373     /* POWER7 and aliases */
374     { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn },
375     { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn },
376 
377     /* POWER7+ and aliases */
378     { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn },
379     { .name = "POWER7+", .initfn = spapr_cpu_core_POWER7plus_initfn },
380 
381     /* POWER8 and aliases */
382     { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn },
383     { .name = "POWER8", .initfn = spapr_cpu_core_POWER8_initfn },
384     { .name = "power8", .initfn = spapr_cpu_core_POWER8_initfn },
385 
386     /* POWER8E and aliases */
387     { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn },
388     { .name = "POWER8E", .initfn = spapr_cpu_core_POWER8E_initfn },
389 
390     /* POWER8NVL and aliases */
391     { .name = "POWER8NVL_v1.0", .initfn = spapr_cpu_core_POWER8NVL_initfn },
392     { .name = "POWER8NVL", .initfn = spapr_cpu_core_POWER8NVL_initfn },
393 
394     { .name = NULL }
395 };
396 
397 static void spapr_cpu_core_register(const SPAPRCoreInfo *info)
398 {
399     TypeInfo type_info = {
400         .parent = TYPE_SPAPR_CPU_CORE,
401         .instance_size = sizeof(sPAPRCPUCore),
402         .instance_init = info->initfn,
403     };
404 
405     type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name);
406     type_register(&type_info);
407     g_free((void *)type_info.name);
408 }
409 
410 static const TypeInfo spapr_cpu_core_type_info = {
411     .name = TYPE_SPAPR_CPU_CORE,
412     .parent = TYPE_CPU_CORE,
413     .abstract = true,
414     .instance_size = sizeof(sPAPRCPUCore),
415     .class_init = spapr_cpu_core_class_init,
416 };
417 
418 static void spapr_cpu_core_register_types(void)
419 {
420     const SPAPRCoreInfo *info = spapr_cores;
421 
422     type_register_static(&spapr_cpu_core_type_info);
423     while (info->name) {
424         spapr_cpu_core_register(info);
425         info++;
426     }
427 }
428 
429 type_init(spapr_cpu_core_register_types)
430