xref: /qemu/hw/ppc/trace-events (revision 7562f907)
1# See docs/tracing.txt for syntax documentation.
2
3# hw/ppc/spapr_pci.c
4spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
5spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
6spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
7spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
8spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
9spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
10spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
11
12# hw/ppc/spapr.c
13spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
14spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
15
16# hw/ppc/spapr_hcall.c
17spapr_cas_pvr_try(uint32_t pvr) "%x"
18spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) "current=%x, explicit_match=%u, new=%x"
19
20# hw/ppc/spapr_iommu.c
21spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
22spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
23spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
24spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
25spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
26spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
27spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
28spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
29spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
30spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d"
31spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
32spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
33spapr_iommu_ddw_query(uint64_t buid, uint32_t cfgaddr, unsigned wa, uint64_t win_size, uint32_t pgmask) "buid=%"PRIx64" addr=%"PRIx32", %u windows available, max window size=%"PRIx64", mask=%"PRIx32
34spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, uint64_t req_size, uint64_t start, uint32_t liobn) "buid=%"PRIx64" addr=%"PRIx32", page size=0x%"PRIx64", requested=0x%"PRIx64", start addr=%"PRIx64", liobn=%"PRIx32
35spapr_iommu_ddw_remove(uint32_t liobn) "liobn=%"PRIx32
36spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) "buid=%"PRIx64" addr=%"PRIx32
37
38# hw/ppc/spapr_drc.c
39spapr_drc_set_isolation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: %"PRIx32
40spapr_drc_set_isolation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32
41spapr_drc_set_isolation_state_deferring(uint32_t index) "drc: 0x%"PRIx32
42spapr_drc_set_indicator_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x"
43spapr_drc_set_allocation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x"
44spapr_drc_set_allocation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32
45spapr_drc_set_configured(uint32_t index) "drc: 0x%"PRIx32
46spapr_drc_set_configured_skipping(uint32_t index) "drc: 0x%"PRIx32", isolated device"
47spapr_drc_entity_sense(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x"
48spapr_drc_attach(uint32_t index) "drc: 0x%"PRIx32
49spapr_drc_detach(uint32_t index) "drc: 0x%"PRIx32
50spapr_drc_awaiting_isolated(uint32_t index) "drc: 0x%"PRIx32
51spapr_drc_awaiting_unusable(uint32_t index) "drc: 0x%"PRIx32
52spapr_drc_awaiting_allocation(uint32_t index) "drc: 0x%"PRIx32
53spapr_drc_reset(uint32_t index) "drc: 0x%"PRIx32
54spapr_drc_realize(uint32_t index) "drc: 0x%"PRIx32
55spapr_drc_realize_child(uint32_t index, char *childname) "drc: 0x%"PRIx32", child name: %s"
56spapr_drc_realize_complete(uint32_t index) "drc: 0x%"PRIx32
57spapr_drc_unrealize(uint32_t index) "drc: 0x%"PRIx32
58
59# hw/ppc/spapr_ovec.c
60spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t entry) "read guest vector %2d, byte %3d / %3d: 0x%.2x"
61spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) "encoding guest vector byte %3d / %3d: 0x%.2x"
62
63# hw/ppc/spapr_rtas.c
64spapr_rtas_set_indicator_invalid(uint32_t index) "sensor index: 0x%"PRIx32
65spapr_rtas_set_indicator_not_supported(uint32_t index, uint32_t type) "sensor index: 0x%"PRIx32", type: %"PRIu32
66spapr_rtas_get_sensor_state_not_supported(uint32_t index, uint32_t type) "sensor index: 0x%"PRIx32", type: %"PRIu32
67spapr_rtas_get_sensor_state_invalid(uint32_t index) "sensor index: 0x%"PRIx32
68spapr_rtas_ibm_configure_connector_invalid(uint32_t index) "DRC index: 0x%"PRIx32
69spapr_rtas_ibm_configure_connector_missing_fdt(uint32_t index) "DRC index: 0x%"PRIx32
70
71# hw/ppc/spapr_vio.c
72spapr_vio_h_reg_crq(uint64_t reg, uint64_t queue_addr, uint64_t queue_len) "CRQ for dev 0x%" PRIx64 " registered at 0x%" PRIx64 "/0x%" PRIx64
73spapr_vio_free_crq(uint32_t reg) "CRQ for dev 0x%" PRIx32 " freed"
74
75# hw/ppc/ppc.c
76ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
77
78# hw/ppc/prep.c
79prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
80prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
81
82# hw/ppc/prep_systemio.c
83prep_systemio_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
84prep_systemio_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
85
86# hw/ppc/rs6000_mc.c
87rs6000mc_id_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
88rs6000mc_presence_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
89rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
90rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
91rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
92
93# hw/ppc/mac_newworld.c
94mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
95mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64
96
97# hw/ppc/ppc4xx_pci.c
98ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn %x irq %d -> %d"
99ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
100