1 /* 2 * TI TWL92230C energy-management companion device for the OMAP24xx. 3 * Aka. Menelaus (N4200 MENELAUS1_V2.2) 4 * 5 * Copyright (C) 2008 Nokia Corporation 6 * Written by Andrzej Zaborowski <andrew@openedhand.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 or 11 * (at your option) version 3 of the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qemu-common.h" 24 #include "qemu/timer.h" 25 #include "hw/i2c/i2c.h" 26 #include "hw/irq.h" 27 #include "migration/qemu-file-types.h" 28 #include "migration/vmstate.h" 29 #include "sysemu/sysemu.h" 30 #include "qemu/bcd.h" 31 #include "qemu/module.h" 32 33 #define VERBOSE 1 34 35 #define TYPE_TWL92230 "twl92230" 36 #define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230) 37 38 typedef struct MenelausState { 39 I2CSlave parent_obj; 40 41 int firstbyte; 42 uint8_t reg; 43 44 uint8_t vcore[5]; 45 uint8_t dcdc[3]; 46 uint8_t ldo[8]; 47 uint8_t sleep[2]; 48 uint8_t osc; 49 uint8_t detect; 50 uint16_t mask; 51 uint16_t status; 52 uint8_t dir; 53 uint8_t inputs; 54 uint8_t outputs; 55 uint8_t bbsms; 56 uint8_t pull[4]; 57 uint8_t mmc_ctrl[3]; 58 uint8_t mmc_debounce; 59 struct { 60 uint8_t ctrl; 61 uint16_t comp; 62 QEMUTimer *hz_tm; 63 int64_t next; 64 struct tm tm; 65 struct tm new; 66 struct tm alm; 67 int sec_offset; 68 int alm_sec; 69 int next_comp; 70 } rtc; 71 uint16_t rtc_next_vmstate; 72 qemu_irq out[4]; 73 uint8_t pwrbtn_state; 74 } MenelausState; 75 76 static inline void menelaus_update(MenelausState *s) 77 { 78 qemu_set_irq(s->out[3], s->status & ~s->mask); 79 } 80 81 static inline void menelaus_rtc_start(MenelausState *s) 82 { 83 s->rtc.next += qemu_clock_get_ms(rtc_clock); 84 timer_mod(s->rtc.hz_tm, s->rtc.next); 85 } 86 87 static inline void menelaus_rtc_stop(MenelausState *s) 88 { 89 timer_del(s->rtc.hz_tm); 90 s->rtc.next -= qemu_clock_get_ms(rtc_clock); 91 if (s->rtc.next < 1) 92 s->rtc.next = 1; 93 } 94 95 static void menelaus_rtc_update(MenelausState *s) 96 { 97 qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset); 98 } 99 100 static void menelaus_alm_update(MenelausState *s) 101 { 102 if ((s->rtc.ctrl & 3) == 3) 103 s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset; 104 } 105 106 static void menelaus_rtc_hz(void *opaque) 107 { 108 MenelausState *s = (MenelausState *) opaque; 109 110 s->rtc.next_comp --; 111 s->rtc.alm_sec --; 112 s->rtc.next += 1000; 113 timer_mod(s->rtc.hz_tm, s->rtc.next); 114 if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */ 115 menelaus_rtc_update(s); 116 if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec) 117 s->status |= 1 << 8; /* RTCTMR */ 118 else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min) 119 s->status |= 1 << 8; /* RTCTMR */ 120 else if (!s->rtc.tm.tm_hour) 121 s->status |= 1 << 8; /* RTCTMR */ 122 } else 123 s->status |= 1 << 8; /* RTCTMR */ 124 if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */ 125 if (s->rtc.alm_sec == 0) 126 s->status |= 1 << 9; /* RTCALM */ 127 /* TODO: wake-up */ 128 } 129 if (s->rtc.next_comp <= 0) { 130 s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000); 131 s->rtc.next_comp = 3600; 132 } 133 menelaus_update(s); 134 } 135 136 static void menelaus_reset(I2CSlave *i2c) 137 { 138 MenelausState *s = TWL92230(i2c); 139 140 s->reg = 0x00; 141 142 s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */ 143 s->vcore[1] = 0x05; 144 s->vcore[2] = 0x02; 145 s->vcore[3] = 0x0c; 146 s->vcore[4] = 0x03; 147 s->dcdc[0] = 0x33; /* Depends on wiring */ 148 s->dcdc[1] = 0x03; 149 s->dcdc[2] = 0x00; 150 s->ldo[0] = 0x95; 151 s->ldo[1] = 0x7e; 152 s->ldo[2] = 0x00; 153 s->ldo[3] = 0x00; /* Depends on wiring */ 154 s->ldo[4] = 0x03; /* Depends on wiring */ 155 s->ldo[5] = 0x00; 156 s->ldo[6] = 0x00; 157 s->ldo[7] = 0x00; 158 s->sleep[0] = 0x00; 159 s->sleep[1] = 0x00; 160 s->osc = 0x01; 161 s->detect = 0x09; 162 s->mask = 0x0fff; 163 s->status = 0; 164 s->dir = 0x07; 165 s->outputs = 0x00; 166 s->bbsms = 0x00; 167 s->pull[0] = 0x00; 168 s->pull[1] = 0x00; 169 s->pull[2] = 0x00; 170 s->pull[3] = 0x00; 171 s->mmc_ctrl[0] = 0x03; 172 s->mmc_ctrl[1] = 0xc0; 173 s->mmc_ctrl[2] = 0x00; 174 s->mmc_debounce = 0x05; 175 176 if (s->rtc.ctrl & 1) 177 menelaus_rtc_stop(s); 178 s->rtc.ctrl = 0x00; 179 s->rtc.comp = 0x0000; 180 s->rtc.next = 1000; 181 s->rtc.sec_offset = 0; 182 s->rtc.next_comp = 1800; 183 s->rtc.alm_sec = 1800; 184 s->rtc.alm.tm_sec = 0x00; 185 s->rtc.alm.tm_min = 0x00; 186 s->rtc.alm.tm_hour = 0x00; 187 s->rtc.alm.tm_mday = 0x01; 188 s->rtc.alm.tm_mon = 0x00; 189 s->rtc.alm.tm_year = 2004; 190 menelaus_update(s); 191 } 192 193 static void menelaus_gpio_set(void *opaque, int line, int level) 194 { 195 MenelausState *s = (MenelausState *) opaque; 196 197 if (line < 3) { 198 /* No interrupt generated */ 199 s->inputs &= ~(1 << line); 200 s->inputs |= level << line; 201 return; 202 } 203 204 if (!s->pwrbtn_state && level) { 205 s->status |= 1 << 11; /* PSHBTN */ 206 menelaus_update(s); 207 } 208 s->pwrbtn_state = level; 209 } 210 211 #define MENELAUS_REV 0x01 212 #define MENELAUS_VCORE_CTRL1 0x02 213 #define MENELAUS_VCORE_CTRL2 0x03 214 #define MENELAUS_VCORE_CTRL3 0x04 215 #define MENELAUS_VCORE_CTRL4 0x05 216 #define MENELAUS_VCORE_CTRL5 0x06 217 #define MENELAUS_DCDC_CTRL1 0x07 218 #define MENELAUS_DCDC_CTRL2 0x08 219 #define MENELAUS_DCDC_CTRL3 0x09 220 #define MENELAUS_LDO_CTRL1 0x0a 221 #define MENELAUS_LDO_CTRL2 0x0b 222 #define MENELAUS_LDO_CTRL3 0x0c 223 #define MENELAUS_LDO_CTRL4 0x0d 224 #define MENELAUS_LDO_CTRL5 0x0e 225 #define MENELAUS_LDO_CTRL6 0x0f 226 #define MENELAUS_LDO_CTRL7 0x10 227 #define MENELAUS_LDO_CTRL8 0x11 228 #define MENELAUS_SLEEP_CTRL1 0x12 229 #define MENELAUS_SLEEP_CTRL2 0x13 230 #define MENELAUS_DEVICE_OFF 0x14 231 #define MENELAUS_OSC_CTRL 0x15 232 #define MENELAUS_DETECT_CTRL 0x16 233 #define MENELAUS_INT_MASK1 0x17 234 #define MENELAUS_INT_MASK2 0x18 235 #define MENELAUS_INT_STATUS1 0x19 236 #define MENELAUS_INT_STATUS2 0x1a 237 #define MENELAUS_INT_ACK1 0x1b 238 #define MENELAUS_INT_ACK2 0x1c 239 #define MENELAUS_GPIO_CTRL 0x1d 240 #define MENELAUS_GPIO_IN 0x1e 241 #define MENELAUS_GPIO_OUT 0x1f 242 #define MENELAUS_BBSMS 0x20 243 #define MENELAUS_RTC_CTRL 0x21 244 #define MENELAUS_RTC_UPDATE 0x22 245 #define MENELAUS_RTC_SEC 0x23 246 #define MENELAUS_RTC_MIN 0x24 247 #define MENELAUS_RTC_HR 0x25 248 #define MENELAUS_RTC_DAY 0x26 249 #define MENELAUS_RTC_MON 0x27 250 #define MENELAUS_RTC_YR 0x28 251 #define MENELAUS_RTC_WKDAY 0x29 252 #define MENELAUS_RTC_AL_SEC 0x2a 253 #define MENELAUS_RTC_AL_MIN 0x2b 254 #define MENELAUS_RTC_AL_HR 0x2c 255 #define MENELAUS_RTC_AL_DAY 0x2d 256 #define MENELAUS_RTC_AL_MON 0x2e 257 #define MENELAUS_RTC_AL_YR 0x2f 258 #define MENELAUS_RTC_COMP_MSB 0x30 259 #define MENELAUS_RTC_COMP_LSB 0x31 260 #define MENELAUS_S1_PULL_EN 0x32 261 #define MENELAUS_S1_PULL_DIR 0x33 262 #define MENELAUS_S2_PULL_EN 0x34 263 #define MENELAUS_S2_PULL_DIR 0x35 264 #define MENELAUS_MCT_CTRL1 0x36 265 #define MENELAUS_MCT_CTRL2 0x37 266 #define MENELAUS_MCT_CTRL3 0x38 267 #define MENELAUS_MCT_PIN_ST 0x39 268 #define MENELAUS_DEBOUNCE1 0x3a 269 270 static uint8_t menelaus_read(void *opaque, uint8_t addr) 271 { 272 MenelausState *s = (MenelausState *) opaque; 273 int reg = 0; 274 275 switch (addr) { 276 case MENELAUS_REV: 277 return 0x22; 278 279 case MENELAUS_VCORE_CTRL5: reg ++; 280 case MENELAUS_VCORE_CTRL4: reg ++; 281 case MENELAUS_VCORE_CTRL3: reg ++; 282 case MENELAUS_VCORE_CTRL2: reg ++; 283 case MENELAUS_VCORE_CTRL1: 284 return s->vcore[reg]; 285 286 case MENELAUS_DCDC_CTRL3: reg ++; 287 case MENELAUS_DCDC_CTRL2: reg ++; 288 case MENELAUS_DCDC_CTRL1: 289 return s->dcdc[reg]; 290 291 case MENELAUS_LDO_CTRL8: reg ++; 292 case MENELAUS_LDO_CTRL7: reg ++; 293 case MENELAUS_LDO_CTRL6: reg ++; 294 case MENELAUS_LDO_CTRL5: reg ++; 295 case MENELAUS_LDO_CTRL4: reg ++; 296 case MENELAUS_LDO_CTRL3: reg ++; 297 case MENELAUS_LDO_CTRL2: reg ++; 298 case MENELAUS_LDO_CTRL1: 299 return s->ldo[reg]; 300 301 case MENELAUS_SLEEP_CTRL2: reg ++; 302 case MENELAUS_SLEEP_CTRL1: 303 return s->sleep[reg]; 304 305 case MENELAUS_DEVICE_OFF: 306 return 0; 307 308 case MENELAUS_OSC_CTRL: 309 return s->osc | (1 << 7); /* CLK32K_GOOD */ 310 311 case MENELAUS_DETECT_CTRL: 312 return s->detect; 313 314 case MENELAUS_INT_MASK1: 315 return (s->mask >> 0) & 0xff; 316 case MENELAUS_INT_MASK2: 317 return (s->mask >> 8) & 0xff; 318 319 case MENELAUS_INT_STATUS1: 320 return (s->status >> 0) & 0xff; 321 case MENELAUS_INT_STATUS2: 322 return (s->status >> 8) & 0xff; 323 324 case MENELAUS_INT_ACK1: 325 case MENELAUS_INT_ACK2: 326 return 0; 327 328 case MENELAUS_GPIO_CTRL: 329 return s->dir; 330 case MENELAUS_GPIO_IN: 331 return s->inputs | (~s->dir & s->outputs); 332 case MENELAUS_GPIO_OUT: 333 return s->outputs; 334 335 case MENELAUS_BBSMS: 336 return s->bbsms; 337 338 case MENELAUS_RTC_CTRL: 339 return s->rtc.ctrl; 340 case MENELAUS_RTC_UPDATE: 341 return 0x00; 342 case MENELAUS_RTC_SEC: 343 menelaus_rtc_update(s); 344 return to_bcd(s->rtc.tm.tm_sec); 345 case MENELAUS_RTC_MIN: 346 menelaus_rtc_update(s); 347 return to_bcd(s->rtc.tm.tm_min); 348 case MENELAUS_RTC_HR: 349 menelaus_rtc_update(s); 350 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */ 351 return to_bcd((s->rtc.tm.tm_hour % 12) + 1) | 352 (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */ 353 else 354 return to_bcd(s->rtc.tm.tm_hour); 355 case MENELAUS_RTC_DAY: 356 menelaus_rtc_update(s); 357 return to_bcd(s->rtc.tm.tm_mday); 358 case MENELAUS_RTC_MON: 359 menelaus_rtc_update(s); 360 return to_bcd(s->rtc.tm.tm_mon + 1); 361 case MENELAUS_RTC_YR: 362 menelaus_rtc_update(s); 363 return to_bcd(s->rtc.tm.tm_year - 2000); 364 case MENELAUS_RTC_WKDAY: 365 menelaus_rtc_update(s); 366 return to_bcd(s->rtc.tm.tm_wday); 367 case MENELAUS_RTC_AL_SEC: 368 return to_bcd(s->rtc.alm.tm_sec); 369 case MENELAUS_RTC_AL_MIN: 370 return to_bcd(s->rtc.alm.tm_min); 371 case MENELAUS_RTC_AL_HR: 372 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */ 373 return to_bcd((s->rtc.alm.tm_hour % 12) + 1) | 374 (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */ 375 else 376 return to_bcd(s->rtc.alm.tm_hour); 377 case MENELAUS_RTC_AL_DAY: 378 return to_bcd(s->rtc.alm.tm_mday); 379 case MENELAUS_RTC_AL_MON: 380 return to_bcd(s->rtc.alm.tm_mon + 1); 381 case MENELAUS_RTC_AL_YR: 382 return to_bcd(s->rtc.alm.tm_year - 2000); 383 case MENELAUS_RTC_COMP_MSB: 384 return (s->rtc.comp >> 8) & 0xff; 385 case MENELAUS_RTC_COMP_LSB: 386 return (s->rtc.comp >> 0) & 0xff; 387 388 case MENELAUS_S1_PULL_EN: 389 return s->pull[0]; 390 case MENELAUS_S1_PULL_DIR: 391 return s->pull[1]; 392 case MENELAUS_S2_PULL_EN: 393 return s->pull[2]; 394 case MENELAUS_S2_PULL_DIR: 395 return s->pull[3]; 396 397 case MENELAUS_MCT_CTRL3: reg ++; 398 case MENELAUS_MCT_CTRL2: reg ++; 399 case MENELAUS_MCT_CTRL1: 400 return s->mmc_ctrl[reg]; 401 case MENELAUS_MCT_PIN_ST: 402 /* TODO: return the real Card Detect */ 403 return 0; 404 case MENELAUS_DEBOUNCE1: 405 return s->mmc_debounce; 406 407 default: 408 #ifdef VERBOSE 409 printf("%s: unknown register %02x\n", __func__, addr); 410 #endif 411 break; 412 } 413 return 0; 414 } 415 416 static void menelaus_write(void *opaque, uint8_t addr, uint8_t value) 417 { 418 MenelausState *s = (MenelausState *) opaque; 419 int line; 420 int reg = 0; 421 struct tm tm; 422 423 switch (addr) { 424 case MENELAUS_VCORE_CTRL1: 425 s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12); 426 break; 427 case MENELAUS_VCORE_CTRL2: 428 s->vcore[1] = value; 429 break; 430 case MENELAUS_VCORE_CTRL3: 431 s->vcore[2] = MIN(value & 0x1f, 0x12); 432 break; 433 case MENELAUS_VCORE_CTRL4: 434 s->vcore[3] = MIN(value & 0x1f, 0x12); 435 break; 436 case MENELAUS_VCORE_CTRL5: 437 s->vcore[4] = value & 3; 438 /* XXX 439 * auto set to 3 on M_Active, nRESWARM 440 * auto set to 0 on M_WaitOn, M_Backup 441 */ 442 break; 443 444 case MENELAUS_DCDC_CTRL1: 445 s->dcdc[0] = value & 0x3f; 446 break; 447 case MENELAUS_DCDC_CTRL2: 448 s->dcdc[1] = value & 0x07; 449 /* XXX 450 * auto set to 3 on M_Active, nRESWARM 451 * auto set to 0 on M_WaitOn, M_Backup 452 */ 453 break; 454 case MENELAUS_DCDC_CTRL3: 455 s->dcdc[2] = value & 0x07; 456 break; 457 458 case MENELAUS_LDO_CTRL1: 459 s->ldo[0] = value; 460 break; 461 case MENELAUS_LDO_CTRL2: 462 s->ldo[1] = value & 0x7f; 463 /* XXX 464 * auto set to 0x7e on M_WaitOn, M_Backup 465 */ 466 break; 467 case MENELAUS_LDO_CTRL3: 468 s->ldo[2] = value & 3; 469 /* XXX 470 * auto set to 3 on M_Active, nRESWARM 471 * auto set to 0 on M_WaitOn, M_Backup 472 */ 473 break; 474 case MENELAUS_LDO_CTRL4: 475 s->ldo[3] = value & 3; 476 /* XXX 477 * auto set to 3 on M_Active, nRESWARM 478 * auto set to 0 on M_WaitOn, M_Backup 479 */ 480 break; 481 case MENELAUS_LDO_CTRL5: 482 s->ldo[4] = value & 3; 483 /* XXX 484 * auto set to 3 on M_Active, nRESWARM 485 * auto set to 0 on M_WaitOn, M_Backup 486 */ 487 break; 488 case MENELAUS_LDO_CTRL6: 489 s->ldo[5] = value & 3; 490 break; 491 case MENELAUS_LDO_CTRL7: 492 s->ldo[6] = value & 3; 493 break; 494 case MENELAUS_LDO_CTRL8: 495 s->ldo[7] = value & 3; 496 break; 497 498 case MENELAUS_SLEEP_CTRL2: reg ++; 499 case MENELAUS_SLEEP_CTRL1: 500 s->sleep[reg] = value; 501 break; 502 503 case MENELAUS_DEVICE_OFF: 504 if (value & 1) { 505 menelaus_reset(I2C_SLAVE(s)); 506 } 507 break; 508 509 case MENELAUS_OSC_CTRL: 510 s->osc = value & 7; 511 break; 512 513 case MENELAUS_DETECT_CTRL: 514 s->detect = value & 0x7f; 515 break; 516 517 case MENELAUS_INT_MASK1: 518 s->mask &= 0xf00; 519 s->mask |= value << 0; 520 menelaus_update(s); 521 break; 522 case MENELAUS_INT_MASK2: 523 s->mask &= 0x0ff; 524 s->mask |= value << 8; 525 menelaus_update(s); 526 break; 527 528 case MENELAUS_INT_ACK1: 529 s->status &= ~(((uint16_t) value) << 0); 530 menelaus_update(s); 531 break; 532 case MENELAUS_INT_ACK2: 533 s->status &= ~(((uint16_t) value) << 8); 534 menelaus_update(s); 535 break; 536 537 case MENELAUS_GPIO_CTRL: 538 for (line = 0; line < 3; line ++) { 539 if (((s->dir ^ value) >> line) & 1) { 540 qemu_set_irq(s->out[line], 541 ((s->outputs & ~s->dir) >> line) & 1); 542 } 543 } 544 s->dir = value & 0x67; 545 break; 546 case MENELAUS_GPIO_OUT: 547 for (line = 0; line < 3; line ++) { 548 if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) { 549 qemu_set_irq(s->out[line], (s->outputs >> line) & 1); 550 } 551 } 552 s->outputs = value & 0x07; 553 break; 554 555 case MENELAUS_BBSMS: 556 s->bbsms = 0x0d; 557 break; 558 559 case MENELAUS_RTC_CTRL: 560 if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */ 561 if (value & 1) 562 menelaus_rtc_start(s); 563 else 564 menelaus_rtc_stop(s); 565 } 566 s->rtc.ctrl = value & 0x1f; 567 menelaus_alm_update(s); 568 break; 569 case MENELAUS_RTC_UPDATE: 570 menelaus_rtc_update(s); 571 memcpy(&tm, &s->rtc.tm, sizeof(tm)); 572 switch (value & 0xf) { 573 case 0: 574 break; 575 case 1: 576 tm.tm_sec = s->rtc.new.tm_sec; 577 break; 578 case 2: 579 tm.tm_min = s->rtc.new.tm_min; 580 break; 581 case 3: 582 if (s->rtc.new.tm_hour > 23) 583 goto rtc_badness; 584 tm.tm_hour = s->rtc.new.tm_hour; 585 break; 586 case 4: 587 if (s->rtc.new.tm_mday < 1) 588 goto rtc_badness; 589 /* TODO check range */ 590 tm.tm_mday = s->rtc.new.tm_mday; 591 break; 592 case 5: 593 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11) 594 goto rtc_badness; 595 tm.tm_mon = s->rtc.new.tm_mon; 596 break; 597 case 6: 598 tm.tm_year = s->rtc.new.tm_year; 599 break; 600 case 7: 601 /* TODO set .tm_mday instead */ 602 tm.tm_wday = s->rtc.new.tm_wday; 603 break; 604 case 8: 605 if (s->rtc.new.tm_hour > 23) 606 goto rtc_badness; 607 if (s->rtc.new.tm_mday < 1) 608 goto rtc_badness; 609 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11) 610 goto rtc_badness; 611 tm.tm_sec = s->rtc.new.tm_sec; 612 tm.tm_min = s->rtc.new.tm_min; 613 tm.tm_hour = s->rtc.new.tm_hour; 614 tm.tm_mday = s->rtc.new.tm_mday; 615 tm.tm_mon = s->rtc.new.tm_mon; 616 tm.tm_year = s->rtc.new.tm_year; 617 break; 618 rtc_badness: 619 default: 620 fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n", 621 __func__, value); 622 s->status |= 1 << 10; /* RTCERR */ 623 menelaus_update(s); 624 } 625 s->rtc.sec_offset = qemu_timedate_diff(&tm); 626 break; 627 case MENELAUS_RTC_SEC: 628 s->rtc.tm.tm_sec = from_bcd(value & 0x7f); 629 break; 630 case MENELAUS_RTC_MIN: 631 s->rtc.tm.tm_min = from_bcd(value & 0x7f); 632 break; 633 case MENELAUS_RTC_HR: 634 s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */ 635 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) : 636 from_bcd(value & 0x3f); 637 break; 638 case MENELAUS_RTC_DAY: 639 s->rtc.tm.tm_mday = from_bcd(value); 640 break; 641 case MENELAUS_RTC_MON: 642 s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1; 643 break; 644 case MENELAUS_RTC_YR: 645 s->rtc.tm.tm_year = 2000 + from_bcd(value); 646 break; 647 case MENELAUS_RTC_WKDAY: 648 s->rtc.tm.tm_mday = from_bcd(value); 649 break; 650 case MENELAUS_RTC_AL_SEC: 651 s->rtc.alm.tm_sec = from_bcd(value & 0x7f); 652 menelaus_alm_update(s); 653 break; 654 case MENELAUS_RTC_AL_MIN: 655 s->rtc.alm.tm_min = from_bcd(value & 0x7f); 656 menelaus_alm_update(s); 657 break; 658 case MENELAUS_RTC_AL_HR: 659 s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */ 660 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) : 661 from_bcd(value & 0x3f); 662 menelaus_alm_update(s); 663 break; 664 case MENELAUS_RTC_AL_DAY: 665 s->rtc.alm.tm_mday = from_bcd(value); 666 menelaus_alm_update(s); 667 break; 668 case MENELAUS_RTC_AL_MON: 669 s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1; 670 menelaus_alm_update(s); 671 break; 672 case MENELAUS_RTC_AL_YR: 673 s->rtc.alm.tm_year = 2000 + from_bcd(value); 674 menelaus_alm_update(s); 675 break; 676 case MENELAUS_RTC_COMP_MSB: 677 s->rtc.comp &= 0xff; 678 s->rtc.comp |= value << 8; 679 break; 680 case MENELAUS_RTC_COMP_LSB: 681 s->rtc.comp &= 0xff << 8; 682 s->rtc.comp |= value; 683 break; 684 685 case MENELAUS_S1_PULL_EN: 686 s->pull[0] = value; 687 break; 688 case MENELAUS_S1_PULL_DIR: 689 s->pull[1] = value & 0x1f; 690 break; 691 case MENELAUS_S2_PULL_EN: 692 s->pull[2] = value; 693 break; 694 case MENELAUS_S2_PULL_DIR: 695 s->pull[3] = value & 0x1f; 696 break; 697 698 case MENELAUS_MCT_CTRL1: 699 s->mmc_ctrl[0] = value & 0x7f; 700 break; 701 case MENELAUS_MCT_CTRL2: 702 s->mmc_ctrl[1] = value; 703 /* TODO update Card Detect interrupts */ 704 break; 705 case MENELAUS_MCT_CTRL3: 706 s->mmc_ctrl[2] = value & 0xf; 707 break; 708 case MENELAUS_DEBOUNCE1: 709 s->mmc_debounce = value & 0x3f; 710 break; 711 712 default: 713 #ifdef VERBOSE 714 printf("%s: unknown register %02x\n", __func__, addr); 715 #endif 716 } 717 } 718 719 static int menelaus_event(I2CSlave *i2c, enum i2c_event event) 720 { 721 MenelausState *s = TWL92230(i2c); 722 723 if (event == I2C_START_SEND) 724 s->firstbyte = 1; 725 726 return 0; 727 } 728 729 static int menelaus_tx(I2CSlave *i2c, uint8_t data) 730 { 731 MenelausState *s = TWL92230(i2c); 732 733 /* Interpret register address byte */ 734 if (s->firstbyte) { 735 s->reg = data; 736 s->firstbyte = 0; 737 } else 738 menelaus_write(s, s->reg ++, data); 739 740 return 0; 741 } 742 743 static uint8_t menelaus_rx(I2CSlave *i2c) 744 { 745 MenelausState *s = TWL92230(i2c); 746 747 return menelaus_read(s, s->reg ++); 748 } 749 750 /* Save restore 32 bit int as uint16_t 751 This is a Big hack, but it is how the old state did it. 752 Or we broke compatibility in the state, or we can't use struct tm 753 */ 754 755 static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size, 756 const VMStateField *field) 757 { 758 int *v = pv; 759 *v = qemu_get_be16(f); 760 return 0; 761 } 762 763 static int put_int32_as_uint16(QEMUFile *f, void *pv, size_t size, 764 const VMStateField *field, QJSON *vmdesc) 765 { 766 int *v = pv; 767 qemu_put_be16(f, *v); 768 769 return 0; 770 } 771 772 static const VMStateInfo vmstate_hack_int32_as_uint16 = { 773 .name = "int32_as_uint16", 774 .get = get_int32_as_uint16, 775 .put = put_int32_as_uint16, 776 }; 777 778 #define VMSTATE_UINT16_HACK(_f, _s) \ 779 VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t) 780 781 782 static const VMStateDescription vmstate_menelaus_tm = { 783 .name = "menelaus_tm", 784 .version_id = 0, 785 .minimum_version_id = 0, 786 .fields = (VMStateField[]) { 787 VMSTATE_UINT16_HACK(tm_sec, struct tm), 788 VMSTATE_UINT16_HACK(tm_min, struct tm), 789 VMSTATE_UINT16_HACK(tm_hour, struct tm), 790 VMSTATE_UINT16_HACK(tm_mday, struct tm), 791 VMSTATE_UINT16_HACK(tm_min, struct tm), 792 VMSTATE_UINT16_HACK(tm_year, struct tm), 793 VMSTATE_END_OF_LIST() 794 } 795 }; 796 797 static int menelaus_pre_save(void *opaque) 798 { 799 MenelausState *s = opaque; 800 /* Should be <= 1000 */ 801 s->rtc_next_vmstate = s->rtc.next - qemu_clock_get_ms(rtc_clock); 802 803 return 0; 804 } 805 806 static int menelaus_post_load(void *opaque, int version_id) 807 { 808 MenelausState *s = opaque; 809 810 if (s->rtc.ctrl & 1) /* RTC_EN */ 811 menelaus_rtc_stop(s); 812 813 s->rtc.next = s->rtc_next_vmstate; 814 815 menelaus_alm_update(s); 816 menelaus_update(s); 817 if (s->rtc.ctrl & 1) /* RTC_EN */ 818 menelaus_rtc_start(s); 819 return 0; 820 } 821 822 static const VMStateDescription vmstate_menelaus = { 823 .name = "menelaus", 824 .version_id = 0, 825 .minimum_version_id = 0, 826 .pre_save = menelaus_pre_save, 827 .post_load = menelaus_post_load, 828 .fields = (VMStateField[]) { 829 VMSTATE_INT32(firstbyte, MenelausState), 830 VMSTATE_UINT8(reg, MenelausState), 831 VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5), 832 VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3), 833 VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8), 834 VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2), 835 VMSTATE_UINT8(osc, MenelausState), 836 VMSTATE_UINT8(detect, MenelausState), 837 VMSTATE_UINT16(mask, MenelausState), 838 VMSTATE_UINT16(status, MenelausState), 839 VMSTATE_UINT8(dir, MenelausState), 840 VMSTATE_UINT8(inputs, MenelausState), 841 VMSTATE_UINT8(outputs, MenelausState), 842 VMSTATE_UINT8(bbsms, MenelausState), 843 VMSTATE_UINT8_ARRAY(pull, MenelausState, 4), 844 VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3), 845 VMSTATE_UINT8(mmc_debounce, MenelausState), 846 VMSTATE_UINT8(rtc.ctrl, MenelausState), 847 VMSTATE_UINT16(rtc.comp, MenelausState), 848 VMSTATE_UINT16(rtc_next_vmstate, MenelausState), 849 VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm, 850 struct tm), 851 VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm, 852 struct tm), 853 VMSTATE_UINT8(pwrbtn_state, MenelausState), 854 VMSTATE_I2C_SLAVE(parent_obj, MenelausState), 855 VMSTATE_END_OF_LIST() 856 } 857 }; 858 859 static void twl92230_realize(DeviceState *dev, Error **errp) 860 { 861 MenelausState *s = TWL92230(dev); 862 863 s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s); 864 /* Three output pins plus one interrupt pin. */ 865 qdev_init_gpio_out(dev, s->out, 4); 866 867 /* Three input pins plus one power-button pin. */ 868 qdev_init_gpio_in(dev, menelaus_gpio_set, 4); 869 870 menelaus_reset(I2C_SLAVE(dev)); 871 } 872 873 static void twl92230_class_init(ObjectClass *klass, void *data) 874 { 875 DeviceClass *dc = DEVICE_CLASS(klass); 876 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass); 877 878 dc->realize = twl92230_realize; 879 sc->event = menelaus_event; 880 sc->recv = menelaus_rx; 881 sc->send = menelaus_tx; 882 dc->vmsd = &vmstate_menelaus; 883 } 884 885 static const TypeInfo twl92230_info = { 886 .name = TYPE_TWL92230, 887 .parent = TYPE_I2C_SLAVE, 888 .instance_size = sizeof(MenelausState), 889 .class_init = twl92230_class_init, 890 }; 891 892 static void twl92230_register_types(void) 893 { 894 type_register_static(&twl92230_info); 895 } 896 897 type_init(twl92230_register_types) 898