1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/pci/pci_device.h" 32 #include "smbios_build.h" 33 34 /* legacy structures and constants for <= 2.0 machines */ 35 struct smbios_header { 36 uint16_t length; 37 uint8_t type; 38 } QEMU_PACKED; 39 40 struct smbios_field { 41 struct smbios_header header; 42 uint8_t type; 43 uint16_t offset; 44 uint8_t data[]; 45 } QEMU_PACKED; 46 47 struct smbios_table { 48 struct smbios_header header; 49 uint8_t data[]; 50 } QEMU_PACKED; 51 52 #define SMBIOS_FIELD_ENTRY 0 53 #define SMBIOS_TABLE_ENTRY 1 54 55 static uint8_t *smbios_entries; 56 static size_t smbios_entries_len; 57 static bool smbios_legacy = true; 58 static bool smbios_uuid_encoded = true; 59 /* end: legacy structures & constants for <= 2.0 machines */ 60 61 62 uint8_t *smbios_tables; 63 size_t smbios_tables_len; 64 unsigned smbios_table_max; 65 unsigned smbios_table_cnt; 66 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 67 68 static SmbiosEntryPoint ep; 69 70 static int smbios_type4_count = 0; 71 static bool smbios_immutable; 72 static bool smbios_have_defaults; 73 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets; 74 75 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 76 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 77 78 static struct { 79 const char *vendor, *version, *date; 80 bool have_major_minor, uefi; 81 uint8_t major, minor; 82 } type0; 83 84 static struct { 85 const char *manufacturer, *product, *version, *serial, *sku, *family; 86 /* uuid is in qemu_uuid */ 87 } type1; 88 89 static struct { 90 const char *manufacturer, *product, *version, *serial, *asset, *location; 91 } type2; 92 93 static struct { 94 const char *manufacturer, *version, *serial, *asset, *sku; 95 } type3; 96 97 /* 98 * SVVP requires max_speed and current_speed to be set and not being 99 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 100 * default value to 2000MHz as we did before. 101 */ 102 #define DEFAULT_CPU_SPEED 2000 103 104 static struct { 105 uint16_t processor_family; 106 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 107 uint64_t max_speed; 108 uint64_t current_speed; 109 uint64_t processor_id; 110 } type4 = { 111 .max_speed = DEFAULT_CPU_SPEED, 112 .current_speed = DEFAULT_CPU_SPEED, 113 .processor_id = 0, 114 .processor_family = 0x01, /* Other */ 115 }; 116 117 struct type8_instance { 118 const char *internal_reference, *external_reference; 119 uint8_t connector_type, port_type; 120 QTAILQ_ENTRY(type8_instance) next; 121 }; 122 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 123 124 /* type 9 instance for parsing */ 125 struct type9_instance { 126 const char *slot_designation, *pcidev; 127 uint8_t slot_type, slot_data_bus_width, current_usage, slot_length, 128 slot_characteristics1, slot_characteristics2; 129 uint16_t slot_id; 130 QTAILQ_ENTRY(type9_instance) next; 131 }; 132 static QTAILQ_HEAD(, type9_instance) type9 = QTAILQ_HEAD_INITIALIZER(type9); 133 134 static struct { 135 size_t nvalues; 136 char **values; 137 } type11; 138 139 static struct { 140 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 141 uint16_t speed; 142 } type17; 143 144 static QEnumLookup type41_kind_lookup = { 145 .array = (const char *const[]) { 146 "other", 147 "unknown", 148 "video", 149 "scsi", 150 "ethernet", 151 "tokenring", 152 "sound", 153 "pata", 154 "sata", 155 "sas", 156 }, 157 .size = 10 158 }; 159 struct type41_instance { 160 const char *designation, *pcidev; 161 uint8_t instance, kind; 162 QTAILQ_ENTRY(type41_instance) next; 163 }; 164 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 165 166 static QemuOptsList qemu_smbios_opts = { 167 .name = "smbios", 168 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 169 .desc = { 170 /* 171 * no elements => accept any params 172 * validation will happen later 173 */ 174 { /* end of list */ } 175 } 176 }; 177 178 static const QemuOptDesc qemu_smbios_file_opts[] = { 179 { 180 .name = "file", 181 .type = QEMU_OPT_STRING, 182 .help = "binary file containing an SMBIOS element", 183 }, 184 { /* end of list */ } 185 }; 186 187 static const QemuOptDesc qemu_smbios_type0_opts[] = { 188 { 189 .name = "type", 190 .type = QEMU_OPT_NUMBER, 191 .help = "SMBIOS element type", 192 },{ 193 .name = "vendor", 194 .type = QEMU_OPT_STRING, 195 .help = "vendor name", 196 },{ 197 .name = "version", 198 .type = QEMU_OPT_STRING, 199 .help = "version number", 200 },{ 201 .name = "date", 202 .type = QEMU_OPT_STRING, 203 .help = "release date", 204 },{ 205 .name = "release", 206 .type = QEMU_OPT_STRING, 207 .help = "revision number", 208 },{ 209 .name = "uefi", 210 .type = QEMU_OPT_BOOL, 211 .help = "uefi support", 212 }, 213 { /* end of list */ } 214 }; 215 216 static const QemuOptDesc qemu_smbios_type1_opts[] = { 217 { 218 .name = "type", 219 .type = QEMU_OPT_NUMBER, 220 .help = "SMBIOS element type", 221 },{ 222 .name = "manufacturer", 223 .type = QEMU_OPT_STRING, 224 .help = "manufacturer name", 225 },{ 226 .name = "product", 227 .type = QEMU_OPT_STRING, 228 .help = "product name", 229 },{ 230 .name = "version", 231 .type = QEMU_OPT_STRING, 232 .help = "version number", 233 },{ 234 .name = "serial", 235 .type = QEMU_OPT_STRING, 236 .help = "serial number", 237 },{ 238 .name = "uuid", 239 .type = QEMU_OPT_STRING, 240 .help = "UUID", 241 },{ 242 .name = "sku", 243 .type = QEMU_OPT_STRING, 244 .help = "SKU number", 245 },{ 246 .name = "family", 247 .type = QEMU_OPT_STRING, 248 .help = "family name", 249 }, 250 { /* end of list */ } 251 }; 252 253 static const QemuOptDesc qemu_smbios_type2_opts[] = { 254 { 255 .name = "type", 256 .type = QEMU_OPT_NUMBER, 257 .help = "SMBIOS element type", 258 },{ 259 .name = "manufacturer", 260 .type = QEMU_OPT_STRING, 261 .help = "manufacturer name", 262 },{ 263 .name = "product", 264 .type = QEMU_OPT_STRING, 265 .help = "product name", 266 },{ 267 .name = "version", 268 .type = QEMU_OPT_STRING, 269 .help = "version number", 270 },{ 271 .name = "serial", 272 .type = QEMU_OPT_STRING, 273 .help = "serial number", 274 },{ 275 .name = "asset", 276 .type = QEMU_OPT_STRING, 277 .help = "asset tag number", 278 },{ 279 .name = "location", 280 .type = QEMU_OPT_STRING, 281 .help = "location in chassis", 282 }, 283 { /* end of list */ } 284 }; 285 286 static const QemuOptDesc qemu_smbios_type3_opts[] = { 287 { 288 .name = "type", 289 .type = QEMU_OPT_NUMBER, 290 .help = "SMBIOS element type", 291 },{ 292 .name = "manufacturer", 293 .type = QEMU_OPT_STRING, 294 .help = "manufacturer name", 295 },{ 296 .name = "version", 297 .type = QEMU_OPT_STRING, 298 .help = "version number", 299 },{ 300 .name = "serial", 301 .type = QEMU_OPT_STRING, 302 .help = "serial number", 303 },{ 304 .name = "asset", 305 .type = QEMU_OPT_STRING, 306 .help = "asset tag number", 307 },{ 308 .name = "sku", 309 .type = QEMU_OPT_STRING, 310 .help = "SKU number", 311 }, 312 { /* end of list */ } 313 }; 314 315 static const QemuOptDesc qemu_smbios_type4_opts[] = { 316 { 317 .name = "type", 318 .type = QEMU_OPT_NUMBER, 319 .help = "SMBIOS element type", 320 },{ 321 .name = "sock_pfx", 322 .type = QEMU_OPT_STRING, 323 .help = "socket designation string prefix", 324 },{ 325 .name = "manufacturer", 326 .type = QEMU_OPT_STRING, 327 .help = "manufacturer name", 328 },{ 329 .name = "version", 330 .type = QEMU_OPT_STRING, 331 .help = "version number", 332 },{ 333 .name = "max-speed", 334 .type = QEMU_OPT_NUMBER, 335 .help = "max speed in MHz", 336 },{ 337 .name = "current-speed", 338 .type = QEMU_OPT_NUMBER, 339 .help = "speed at system boot in MHz", 340 },{ 341 .name = "serial", 342 .type = QEMU_OPT_STRING, 343 .help = "serial number", 344 },{ 345 .name = "asset", 346 .type = QEMU_OPT_STRING, 347 .help = "asset tag number", 348 },{ 349 .name = "part", 350 .type = QEMU_OPT_STRING, 351 .help = "part number", 352 }, { 353 .name = "processor-family", 354 .type = QEMU_OPT_NUMBER, 355 .help = "processor family", 356 }, { 357 .name = "processor-id", 358 .type = QEMU_OPT_NUMBER, 359 .help = "processor id", 360 }, 361 { /* end of list */ } 362 }; 363 364 static const QemuOptDesc qemu_smbios_type8_opts[] = { 365 { 366 .name = "type", 367 .type = QEMU_OPT_NUMBER, 368 .help = "SMBIOS element type", 369 }, 370 { 371 .name = "internal_reference", 372 .type = QEMU_OPT_STRING, 373 .help = "internal reference designator", 374 }, 375 { 376 .name = "external_reference", 377 .type = QEMU_OPT_STRING, 378 .help = "external reference designator", 379 }, 380 { 381 .name = "connector_type", 382 .type = QEMU_OPT_NUMBER, 383 .help = "connector type", 384 }, 385 { 386 .name = "port_type", 387 .type = QEMU_OPT_NUMBER, 388 .help = "port type", 389 }, 390 { /* end of list */ } 391 }; 392 393 static const QemuOptDesc qemu_smbios_type9_opts[] = { 394 { 395 .name = "type", 396 .type = QEMU_OPT_NUMBER, 397 .help = "SMBIOS element type", 398 }, 399 { 400 .name = "slot_designation", 401 .type = QEMU_OPT_STRING, 402 .help = "string number for reference designation", 403 }, 404 { 405 .name = "slot_type", 406 .type = QEMU_OPT_NUMBER, 407 .help = "connector type", 408 }, 409 { 410 .name = "slot_data_bus_width", 411 .type = QEMU_OPT_NUMBER, 412 .help = "port type", 413 }, 414 { 415 .name = "current_usage", 416 .type = QEMU_OPT_NUMBER, 417 .help = "current usage", 418 }, 419 { 420 .name = "slot_length", 421 .type = QEMU_OPT_NUMBER, 422 .help = "system slot length", 423 }, 424 { 425 .name = "slot_id", 426 .type = QEMU_OPT_NUMBER, 427 .help = "system slot id", 428 }, 429 { 430 .name = "slot_characteristics1", 431 .type = QEMU_OPT_NUMBER, 432 .help = "slot characteristics1, see the spec", 433 }, 434 { 435 .name = "slot_characteristics2", 436 .type = QEMU_OPT_NUMBER, 437 .help = "slot characteristics2, see the spec", 438 }, 439 { 440 .name = "pci_device", 441 .type = QEMU_OPT_STRING, 442 .help = "PCI device, if provided." 443 } 444 }; 445 446 static const QemuOptDesc qemu_smbios_type11_opts[] = { 447 { 448 .name = "type", 449 .type = QEMU_OPT_NUMBER, 450 .help = "SMBIOS element type", 451 }, 452 { 453 .name = "value", 454 .type = QEMU_OPT_STRING, 455 .help = "OEM string data", 456 }, 457 { 458 .name = "path", 459 .type = QEMU_OPT_STRING, 460 .help = "OEM string data from file", 461 }, 462 { /* end of list */ } 463 }; 464 465 static const QemuOptDesc qemu_smbios_type17_opts[] = { 466 { 467 .name = "type", 468 .type = QEMU_OPT_NUMBER, 469 .help = "SMBIOS element type", 470 },{ 471 .name = "loc_pfx", 472 .type = QEMU_OPT_STRING, 473 .help = "device locator string prefix", 474 },{ 475 .name = "bank", 476 .type = QEMU_OPT_STRING, 477 .help = "bank locator string", 478 },{ 479 .name = "manufacturer", 480 .type = QEMU_OPT_STRING, 481 .help = "manufacturer name", 482 },{ 483 .name = "serial", 484 .type = QEMU_OPT_STRING, 485 .help = "serial number", 486 },{ 487 .name = "asset", 488 .type = QEMU_OPT_STRING, 489 .help = "asset tag number", 490 },{ 491 .name = "part", 492 .type = QEMU_OPT_STRING, 493 .help = "part number", 494 },{ 495 .name = "speed", 496 .type = QEMU_OPT_NUMBER, 497 .help = "maximum capable speed", 498 }, 499 { /* end of list */ } 500 }; 501 502 static const QemuOptDesc qemu_smbios_type41_opts[] = { 503 { 504 .name = "type", 505 .type = QEMU_OPT_NUMBER, 506 .help = "SMBIOS element type", 507 },{ 508 .name = "designation", 509 .type = QEMU_OPT_STRING, 510 .help = "reference designation string", 511 },{ 512 .name = "kind", 513 .type = QEMU_OPT_STRING, 514 .help = "device type", 515 .def_value_str = "other", 516 },{ 517 .name = "instance", 518 .type = QEMU_OPT_NUMBER, 519 .help = "device type instance", 520 },{ 521 .name = "pcidev", 522 .type = QEMU_OPT_STRING, 523 .help = "PCI device", 524 }, 525 { /* end of list */ } 526 }; 527 528 static void smbios_register_config(void) 529 { 530 qemu_add_opts(&qemu_smbios_opts); 531 } 532 533 opts_init(smbios_register_config); 534 535 /* 536 * The SMBIOS 2.1 "structure table length" field in the 537 * entry point uses a 16-bit integer, so we're limited 538 * in total table size 539 */ 540 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 541 542 static void smbios_validate_table(MachineState *ms) 543 { 544 uint32_t expect_t4_count = smbios_legacy ? 545 ms->smp.cpus : smbios_smp_sockets; 546 547 if (smbios_type4_count && smbios_type4_count != expect_t4_count) { 548 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 549 expect_t4_count, smbios_type4_count); 550 exit(1); 551 } 552 553 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 554 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 555 error_report("SMBIOS 2.1 table length %zu exceeds %d", 556 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 557 exit(1); 558 } 559 } 560 561 562 /* legacy setup functions for <= 2.0 machines */ 563 static void smbios_add_field(int type, int offset, const void *data, size_t len) 564 { 565 struct smbios_field *field; 566 567 if (!smbios_entries) { 568 smbios_entries_len = sizeof(uint16_t); 569 smbios_entries = g_malloc0(smbios_entries_len); 570 } 571 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 572 sizeof(*field) + len); 573 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 574 field->header.type = SMBIOS_FIELD_ENTRY; 575 field->header.length = cpu_to_le16(sizeof(*field) + len); 576 577 field->type = type; 578 field->offset = cpu_to_le16(offset); 579 memcpy(field->data, data, len); 580 581 smbios_entries_len += sizeof(*field) + len; 582 (*(uint16_t *)smbios_entries) = 583 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 584 } 585 586 static void smbios_maybe_add_str(int type, int offset, const char *data) 587 { 588 if (data) { 589 smbios_add_field(type, offset, data, strlen(data) + 1); 590 } 591 } 592 593 static void smbios_build_type_0_fields(void) 594 { 595 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 596 type0.vendor); 597 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 598 type0.version); 599 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 600 bios_release_date_str), 601 type0.date); 602 if (type0.have_major_minor) { 603 smbios_add_field(0, offsetof(struct smbios_type_0, 604 system_bios_major_release), 605 &type0.major, 1); 606 smbios_add_field(0, offsetof(struct smbios_type_0, 607 system_bios_minor_release), 608 &type0.minor, 1); 609 } 610 } 611 612 static void smbios_build_type_1_fields(void) 613 { 614 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 615 type1.manufacturer); 616 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 617 type1.product); 618 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 619 type1.version); 620 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 621 type1.serial); 622 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 623 type1.sku); 624 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 625 type1.family); 626 if (qemu_uuid_set) { 627 /* We don't encode the UUID in the "wire format" here because this 628 * function is for legacy mode and needs to keep the guest ABI, and 629 * because we don't know what's the SMBIOS version advertised by the 630 * BIOS. 631 */ 632 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 633 &qemu_uuid, 16); 634 } 635 } 636 637 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length) 638 { 639 if (!smbios_legacy) { 640 *length = 0; 641 return NULL; 642 } 643 644 if (!smbios_immutable) { 645 smbios_build_type_0_fields(); 646 smbios_build_type_1_fields(); 647 smbios_validate_table(ms); 648 smbios_immutable = true; 649 } 650 *length = smbios_entries_len; 651 return smbios_entries; 652 } 653 /* end: legacy setup functions for <= 2.0 machines */ 654 655 656 bool smbios_skip_table(uint8_t type, bool required_table) 657 { 658 if (test_bit(type, have_binfile_bitmap)) { 659 return true; /* user provided their own binary blob(s) */ 660 } 661 if (test_bit(type, have_fields_bitmap)) { 662 return false; /* user provided fields via command line */ 663 } 664 if (smbios_have_defaults && required_table) { 665 return false; /* we're building tables, and this one's required */ 666 } 667 return true; 668 } 669 670 #define T0_BASE 0x000 671 #define T1_BASE 0x100 672 #define T2_BASE 0x200 673 #define T3_BASE 0x300 674 #define T4_BASE 0x400 675 #define T9_BASE 0x900 676 #define T11_BASE 0xe00 677 678 #define T16_BASE 0x1000 679 #define T17_BASE 0x1100 680 #define T19_BASE 0x1300 681 #define T32_BASE 0x2000 682 #define T41_BASE 0x2900 683 #define T127_BASE 0x7F00 684 685 static void smbios_build_type_0_table(void) 686 { 687 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 688 689 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 690 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 691 692 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 693 694 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 695 696 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 697 698 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 699 t->bios_characteristics_extension_bytes[0] = 0; 700 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 701 if (type0.uefi) { 702 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 703 } 704 705 if (type0.have_major_minor) { 706 t->system_bios_major_release = type0.major; 707 t->system_bios_minor_release = type0.minor; 708 } else { 709 t->system_bios_major_release = 0; 710 t->system_bios_minor_release = 0; 711 } 712 713 /* hardcoded in SeaBIOS */ 714 t->embedded_controller_major_release = 0xFF; 715 t->embedded_controller_minor_release = 0xFF; 716 717 SMBIOS_BUILD_TABLE_POST; 718 } 719 720 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 721 * format specified by SMBIOS version 2.6. 722 */ 723 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 724 { 725 memcpy(uuid, in, 16); 726 if (smbios_uuid_encoded) { 727 uuid->time_low = bswap32(uuid->time_low); 728 uuid->time_mid = bswap16(uuid->time_mid); 729 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 730 } 731 } 732 733 static void smbios_build_type_1_table(void) 734 { 735 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 736 737 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 738 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 739 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 740 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 741 if (qemu_uuid_set) { 742 smbios_encode_uuid(&t->uuid, &qemu_uuid); 743 } else { 744 memset(&t->uuid, 0, 16); 745 } 746 t->wake_up_type = 0x06; /* power switch */ 747 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 748 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 749 750 SMBIOS_BUILD_TABLE_POST; 751 } 752 753 static void smbios_build_type_2_table(void) 754 { 755 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 756 757 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 758 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 759 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 760 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 761 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 762 t->feature_flags = 0x01; /* Motherboard */ 763 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 764 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 765 t->board_type = 0x0A; /* Motherboard */ 766 t->contained_element_count = 0; 767 768 SMBIOS_BUILD_TABLE_POST; 769 } 770 771 static void smbios_build_type_3_table(void) 772 { 773 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 774 775 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 776 t->type = 0x01; /* Other */ 777 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 778 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 779 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 780 t->boot_up_state = 0x03; /* Safe */ 781 t->power_supply_state = 0x03; /* Safe */ 782 t->thermal_state = 0x03; /* Safe */ 783 t->security_status = 0x02; /* Unknown */ 784 t->oem_defined = cpu_to_le32(0); 785 t->height = 0; 786 t->number_of_power_cords = 0; 787 t->contained_element_count = 0; 788 t->contained_element_record_length = 0; 789 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 790 791 SMBIOS_BUILD_TABLE_POST; 792 } 793 794 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 795 { 796 char sock_str[128]; 797 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 798 unsigned threads_per_socket; 799 unsigned cores_per_socket; 800 801 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 802 tbl_len = SMBIOS_TYPE_4_LEN_V30; 803 } 804 805 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 806 true, tbl_len); /* required */ 807 808 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 809 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 810 t->processor_type = 0x03; /* CPU */ 811 t->processor_family = 0xfe; /* use Processor Family 2 field */ 812 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 813 if (type4.processor_id == 0) { 814 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 815 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 816 } else { 817 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 818 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 819 } 820 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 821 t->voltage = 0; 822 t->external_clock = cpu_to_le16(0); /* Unknown */ 823 t->max_speed = cpu_to_le16(type4.max_speed); 824 t->current_speed = cpu_to_le16(type4.current_speed); 825 t->status = 0x41; /* Socket populated, CPU enabled */ 826 t->processor_upgrade = 0x01; /* Other */ 827 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 828 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 829 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 830 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 831 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 832 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 833 834 threads_per_socket = machine_topo_get_threads_per_socket(ms); 835 cores_per_socket = machine_topo_get_cores_per_socket(ms); 836 837 t->core_count = (cores_per_socket > 255) ? 0xFF : cores_per_socket; 838 t->core_enabled = t->core_count; 839 840 t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; 841 842 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 843 t->processor_family2 = cpu_to_le16(type4.processor_family); 844 845 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { 846 t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); 847 t->thread_count2 = cpu_to_le16(threads_per_socket); 848 } 849 850 SMBIOS_BUILD_TABLE_POST; 851 smbios_type4_count++; 852 } 853 854 static void smbios_build_type_8_table(void) 855 { 856 unsigned instance = 0; 857 struct type8_instance *t8; 858 859 QTAILQ_FOREACH(t8, &type8, next) { 860 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 861 862 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 863 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 864 /* most vendors seem to set this to None */ 865 t->internal_connector_type = 0x0; 866 t->external_connector_type = t8->connector_type; 867 t->port_type = t8->port_type; 868 869 SMBIOS_BUILD_TABLE_POST; 870 instance++; 871 } 872 } 873 874 static void smbios_build_type_9_table(Error **errp) 875 { 876 unsigned instance = 0; 877 struct type9_instance *t9; 878 879 QTAILQ_FOREACH(t9, &type9, next) { 880 SMBIOS_BUILD_TABLE_PRE(9, T9_BASE + instance, true); 881 882 SMBIOS_TABLE_SET_STR(9, slot_designation, t9->slot_designation); 883 t->slot_type = t9->slot_type; 884 t->slot_data_bus_width = t9->slot_data_bus_width; 885 t->current_usage = t9->current_usage; 886 t->slot_length = t9->slot_length; 887 t->slot_id = t9->slot_id; 888 t->slot_characteristics1 = t9->slot_characteristics1; 889 t->slot_characteristics2 = t9->slot_characteristics2; 890 891 if (t9->pcidev) { 892 PCIDevice *pdev = NULL; 893 int rc = pci_qdev_find_device(t9->pcidev, &pdev); 894 if (rc != 0) { 895 error_setg(errp, 896 "No PCI device %s for SMBIOS type 9 entry %s", 897 t9->pcidev, t9->slot_designation); 898 return; 899 } 900 /* 901 * We only handle the case were the device is attached to 902 * the PCI root bus. The general case is more complex as 903 * bridges are enumerated later and the table would need 904 * to be updated at this moment. 905 */ 906 if (!pci_bus_is_root(pci_get_bus(pdev))) { 907 error_setg(errp, 908 "Cannot create type 9 entry for PCI device %s: " 909 "not attached to the root bus", 910 t9->pcidev); 911 return; 912 } 913 t->segment_group_number = cpu_to_le16(0); 914 t->bus_number = pci_dev_bus_num(pdev); 915 t->device_number = pdev->devfn; 916 } else { 917 /* 918 * Per SMBIOS spec, For slots that are not of the PCI, AGP, PCI-X, 919 * or PCI-Express type that do not have bus/device/function 920 * information, 0FFh should be populated in the fields of Segment 921 * Group Number, Bus Number, Device/Function Number. 922 */ 923 t->segment_group_number = 0xff; 924 t->bus_number = 0xff; 925 t->device_number = 0xff; 926 } 927 928 SMBIOS_BUILD_TABLE_POST; 929 instance++; 930 } 931 } 932 933 static void smbios_build_type_11_table(void) 934 { 935 char count_str[128]; 936 size_t i; 937 938 if (type11.nvalues == 0) { 939 return; 940 } 941 942 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 943 944 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 945 t->count = type11.nvalues; 946 947 for (i = 0; i < type11.nvalues; i++) { 948 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 949 g_free(type11.values[i]); 950 type11.values[i] = NULL; 951 } 952 953 SMBIOS_BUILD_TABLE_POST; 954 } 955 956 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 957 958 static void smbios_build_type_16_table(unsigned dimm_cnt) 959 { 960 uint64_t size_kb; 961 962 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 963 964 t->location = 0x01; /* Other */ 965 t->use = 0x03; /* System memory */ 966 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 967 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 968 if (size_kb < MAX_T16_STD_SZ) { 969 t->maximum_capacity = cpu_to_le32(size_kb); 970 t->extended_maximum_capacity = cpu_to_le64(0); 971 } else { 972 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 973 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 974 } 975 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 976 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 977 978 SMBIOS_BUILD_TABLE_POST; 979 } 980 981 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 982 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 983 984 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 985 { 986 char loc_str[128]; 987 uint64_t size_mb; 988 989 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 990 991 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 992 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 993 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 994 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 995 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 996 if (size_mb < MAX_T17_STD_SZ) { 997 t->size = cpu_to_le16(size_mb); 998 t->extended_size = cpu_to_le32(0); 999 } else { 1000 assert(size_mb < MAX_T17_EXT_SZ); 1001 t->size = cpu_to_le16(MAX_T17_STD_SZ); 1002 t->extended_size = cpu_to_le32(size_mb); 1003 } 1004 t->form_factor = 0x09; /* DIMM */ 1005 t->device_set = 0; /* Not in a set */ 1006 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 1007 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 1008 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 1009 t->memory_type = 0x07; /* RAM */ 1010 t->type_detail = cpu_to_le16(0x02); /* Other */ 1011 t->speed = cpu_to_le16(type17.speed); 1012 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 1013 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 1014 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 1015 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 1016 t->attributes = 0; /* Unknown */ 1017 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 1018 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 1019 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 1020 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 1021 1022 SMBIOS_BUILD_TABLE_POST; 1023 } 1024 1025 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 1026 uint64_t start, uint64_t size) 1027 { 1028 uint64_t end, start_kb, end_kb; 1029 1030 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 1031 true); /* required */ 1032 1033 end = start + size - 1; 1034 assert(end > start); 1035 start_kb = start / KiB; 1036 end_kb = end / KiB; 1037 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 1038 t->starting_address = cpu_to_le32(start_kb); 1039 t->ending_address = cpu_to_le32(end_kb); 1040 t->extended_starting_address = 1041 t->extended_ending_address = cpu_to_le64(0); 1042 } else { 1043 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 1044 t->extended_starting_address = cpu_to_le64(start); 1045 t->extended_ending_address = cpu_to_le64(end); 1046 } 1047 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 1048 t->partition_width = 1; /* One device per row */ 1049 1050 SMBIOS_BUILD_TABLE_POST; 1051 } 1052 1053 static void smbios_build_type_32_table(void) 1054 { 1055 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 1056 1057 memset(t->reserved, 0, 6); 1058 t->boot_status = 0; /* No errors detected */ 1059 1060 SMBIOS_BUILD_TABLE_POST; 1061 } 1062 1063 static void smbios_build_type_41_table(Error **errp) 1064 { 1065 unsigned instance = 0; 1066 struct type41_instance *t41; 1067 1068 QTAILQ_FOREACH(t41, &type41, next) { 1069 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 1070 1071 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 1072 t->device_type = t41->kind; 1073 t->device_type_instance = t41->instance; 1074 t->segment_group_number = cpu_to_le16(0); 1075 t->bus_number = 0; 1076 t->device_number = 0; 1077 1078 if (t41->pcidev) { 1079 PCIDevice *pdev = NULL; 1080 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 1081 if (rc != 0) { 1082 error_setg(errp, 1083 "No PCI device %s for SMBIOS type 41 entry %s", 1084 t41->pcidev, t41->designation); 1085 return; 1086 } 1087 /* 1088 * We only handle the case were the device is attached to 1089 * the PCI root bus. The general case is more complex as 1090 * bridges are enumerated later and the table would need 1091 * to be updated at this moment. 1092 */ 1093 if (!pci_bus_is_root(pci_get_bus(pdev))) { 1094 error_setg(errp, 1095 "Cannot create type 41 entry for PCI device %s: " 1096 "not attached to the root bus", 1097 t41->pcidev); 1098 return; 1099 } 1100 t->segment_group_number = cpu_to_le16(0); 1101 t->bus_number = pci_dev_bus_num(pdev); 1102 t->device_number = pdev->devfn; 1103 } 1104 1105 SMBIOS_BUILD_TABLE_POST; 1106 instance++; 1107 } 1108 } 1109 1110 static void smbios_build_type_127_table(void) 1111 { 1112 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 1113 SMBIOS_BUILD_TABLE_POST; 1114 } 1115 1116 void smbios_set_cpuid(uint32_t version, uint32_t features) 1117 { 1118 smbios_cpuid_version = version; 1119 smbios_cpuid_features = features; 1120 } 1121 1122 #define SMBIOS_SET_DEFAULT(field, value) \ 1123 if (!field) { \ 1124 field = value; \ 1125 } 1126 1127 void smbios_set_default_processor_family(uint16_t processor_family) 1128 { 1129 if (type4.processor_family <= 0x01) { 1130 type4.processor_family = processor_family; 1131 } 1132 } 1133 1134 void smbios_set_defaults(const char *manufacturer, const char *product, 1135 const char *version, bool legacy_mode, 1136 bool uuid_encoded, SmbiosEntryPointType ep_type) 1137 { 1138 smbios_have_defaults = true; 1139 smbios_legacy = legacy_mode; 1140 smbios_uuid_encoded = uuid_encoded; 1141 smbios_ep_type = ep_type; 1142 1143 /* drop unwanted version of command-line file blob(s) */ 1144 if (smbios_legacy) { 1145 g_free(smbios_tables); 1146 /* in legacy mode, also complain if fields were given for types > 1 */ 1147 if (find_next_bit(have_fields_bitmap, 1148 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) { 1149 error_report("can't process fields for smbios " 1150 "types > 1 on machine versions < 2.1!"); 1151 exit(1); 1152 } 1153 } else { 1154 g_free(smbios_entries); 1155 } 1156 1157 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1158 SMBIOS_SET_DEFAULT(type1.product, product); 1159 SMBIOS_SET_DEFAULT(type1.version, version); 1160 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1161 SMBIOS_SET_DEFAULT(type2.product, product); 1162 SMBIOS_SET_DEFAULT(type2.version, version); 1163 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1164 SMBIOS_SET_DEFAULT(type3.version, version); 1165 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1166 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1167 SMBIOS_SET_DEFAULT(type4.version, version); 1168 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1169 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1170 } 1171 1172 static void smbios_entry_point_setup(void) 1173 { 1174 switch (smbios_ep_type) { 1175 case SMBIOS_ENTRY_POINT_TYPE_32: 1176 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1177 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1178 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1179 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1180 memset(ep.ep21.formatted_area, 0, 5); 1181 1182 /* compliant with smbios spec v2.8 */ 1183 ep.ep21.smbios_major_version = 2; 1184 ep.ep21.smbios_minor_version = 8; 1185 ep.ep21.smbios_bcd_revision = 0x28; 1186 1187 /* set during table construction, but BIOS may override: */ 1188 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1189 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1190 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1191 1192 /* BIOS must recalculate */ 1193 ep.ep21.checksum = 0; 1194 ep.ep21.intermediate_checksum = 0; 1195 ep.ep21.structure_table_address = cpu_to_le32(0); 1196 1197 break; 1198 case SMBIOS_ENTRY_POINT_TYPE_64: 1199 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1200 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1201 ep.ep30.entry_point_revision = 1; 1202 ep.ep30.reserved = 0; 1203 1204 /* compliant with smbios spec 3.0 */ 1205 ep.ep30.smbios_major_version = 3; 1206 ep.ep30.smbios_minor_version = 0; 1207 ep.ep30.smbios_doc_rev = 0; 1208 1209 /* set during table construct, but BIOS might override */ 1210 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1211 1212 /* BIOS must recalculate */ 1213 ep.ep30.checksum = 0; 1214 ep.ep30.structure_table_address = cpu_to_le64(0); 1215 1216 break; 1217 default: 1218 abort(); 1219 break; 1220 } 1221 } 1222 1223 void smbios_get_tables(MachineState *ms, 1224 const struct smbios_phys_mem_area *mem_array, 1225 const unsigned int mem_array_size, 1226 uint8_t **tables, size_t *tables_len, 1227 uint8_t **anchor, size_t *anchor_len, 1228 Error **errp) 1229 { 1230 unsigned i, dimm_cnt, offset; 1231 1232 if (smbios_legacy) { 1233 *tables = *anchor = NULL; 1234 *tables_len = *anchor_len = 0; 1235 return; 1236 } 1237 1238 if (!smbios_immutable) { 1239 smbios_build_type_0_table(); 1240 smbios_build_type_1_table(); 1241 smbios_build_type_2_table(); 1242 smbios_build_type_3_table(); 1243 1244 smbios_smp_sockets = ms->smp.sockets; 1245 assert(smbios_smp_sockets >= 1); 1246 1247 for (i = 0; i < smbios_smp_sockets; i++) { 1248 smbios_build_type_4_table(ms, i); 1249 } 1250 1251 smbios_build_type_8_table(); 1252 smbios_build_type_9_table(errp); 1253 smbios_build_type_11_table(); 1254 1255 #define MAX_DIMM_SZ (16 * GiB) 1256 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1257 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1258 1259 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1260 1261 /* 1262 * The offset determines if we need to keep additional space between 1263 * table 17 and table 19 header handle numbers so that they do 1264 * not overlap. For example, for a VM with larger than 8 TB guest 1265 * memory and DIMM like chunks of 16 GiB, the default space between 1266 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1267 */ 1268 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1269 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1270 1271 smbios_build_type_16_table(dimm_cnt); 1272 1273 for (i = 0; i < dimm_cnt; i++) { 1274 smbios_build_type_17_table(i, GET_DIMM_SZ); 1275 } 1276 1277 for (i = 0; i < mem_array_size; i++) { 1278 smbios_build_type_19_table(i, offset, mem_array[i].address, 1279 mem_array[i].length); 1280 } 1281 1282 /* 1283 * make sure 16 bit handle numbers in the headers of tables 19 1284 * and 32 do not overlap. 1285 */ 1286 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1287 1288 smbios_build_type_32_table(); 1289 smbios_build_type_38_table(); 1290 smbios_build_type_41_table(errp); 1291 smbios_build_type_127_table(); 1292 1293 smbios_validate_table(ms); 1294 smbios_entry_point_setup(); 1295 smbios_immutable = true; 1296 } 1297 1298 /* return tables blob and entry point (anchor), and their sizes */ 1299 *tables = smbios_tables; 1300 *tables_len = smbios_tables_len; 1301 *anchor = (uint8_t *)&ep; 1302 1303 /* calculate length based on anchor string */ 1304 if (!strncmp((char *)&ep, "_SM_", 4)) { 1305 *anchor_len = sizeof(struct smbios_21_entry_point); 1306 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1307 *anchor_len = sizeof(struct smbios_30_entry_point); 1308 } else { 1309 abort(); 1310 } 1311 } 1312 1313 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1314 { 1315 const char *val = qemu_opt_get(opts, name); 1316 1317 if (val) { 1318 *dest = val; 1319 } 1320 } 1321 1322 1323 struct opt_list { 1324 size_t *ndest; 1325 char ***dest; 1326 }; 1327 1328 static int save_opt_one(void *opaque, 1329 const char *name, const char *value, 1330 Error **errp) 1331 { 1332 struct opt_list *opt = opaque; 1333 1334 if (g_str_equal(name, "path")) { 1335 g_autoptr(GByteArray) data = g_byte_array_new(); 1336 g_autofree char *buf = g_new(char, 4096); 1337 ssize_t ret; 1338 int fd = qemu_open(value, O_RDONLY, errp); 1339 if (fd < 0) { 1340 return -1; 1341 } 1342 1343 while (1) { 1344 ret = read(fd, buf, 4096); 1345 if (ret == 0) { 1346 break; 1347 } 1348 if (ret < 0) { 1349 error_setg(errp, "Unable to read from %s: %s", 1350 value, strerror(errno)); 1351 qemu_close(fd); 1352 return -1; 1353 } 1354 if (memchr(buf, '\0', ret)) { 1355 error_setg(errp, "NUL in OEM strings value in %s", value); 1356 qemu_close(fd); 1357 return -1; 1358 } 1359 g_byte_array_append(data, (guint8 *)buf, ret); 1360 } 1361 1362 qemu_close(fd); 1363 1364 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1365 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1366 (*opt->ndest)++; 1367 data = NULL; 1368 } else if (g_str_equal(name, "value")) { 1369 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1370 (*opt->dest)[*opt->ndest] = g_strdup(value); 1371 (*opt->ndest)++; 1372 } else if (!g_str_equal(name, "type")) { 1373 error_setg(errp, "Unexpected option %s", name); 1374 return -1; 1375 } 1376 1377 return 0; 1378 } 1379 1380 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1381 Error **errp) 1382 { 1383 struct opt_list opt = { 1384 ndest, dest, 1385 }; 1386 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1387 return false; 1388 } 1389 return true; 1390 } 1391 1392 void smbios_entry_add(QemuOpts *opts, Error **errp) 1393 { 1394 const char *val; 1395 1396 assert(!smbios_immutable); 1397 1398 val = qemu_opt_get(opts, "file"); 1399 if (val) { 1400 struct smbios_structure_header *header; 1401 int size; 1402 struct smbios_table *table; /* legacy mode only */ 1403 1404 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1405 return; 1406 } 1407 1408 size = get_image_size(val); 1409 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1410 error_setg(errp, "Cannot read SMBIOS file %s", val); 1411 return; 1412 } 1413 1414 /* 1415 * NOTE: standard double '\0' terminator expected, per smbios spec. 1416 * (except in legacy mode, where the second '\0' is implicit and 1417 * will be inserted by the BIOS). 1418 */ 1419 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1420 header = (struct smbios_structure_header *)(smbios_tables + 1421 smbios_tables_len); 1422 1423 if (load_image_size(val, (uint8_t *)header, size) != size) { 1424 error_setg(errp, "Failed to load SMBIOS file %s", val); 1425 return; 1426 } 1427 1428 if (header->type <= SMBIOS_MAX_TYPE) { 1429 if (test_bit(header->type, have_fields_bitmap)) { 1430 error_setg(errp, 1431 "can't load type %d struct, fields already specified!", 1432 header->type); 1433 return; 1434 } 1435 set_bit(header->type, have_binfile_bitmap); 1436 } 1437 1438 if (header->type == 4) { 1439 smbios_type4_count++; 1440 } 1441 1442 smbios_tables_len += size; 1443 if (size > smbios_table_max) { 1444 smbios_table_max = size; 1445 } 1446 smbios_table_cnt++; 1447 1448 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1449 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1450 * yet know which mode (legacy vs. aggregate-table) will be 1451 * required. We therefore add the binary blob to both legacy 1452 * (smbios_entries) and aggregate (smbios_tables) tables, and 1453 * delete the one we don't need from smbios_set_defaults(), 1454 * once we know which machine version has been requested. 1455 */ 1456 if (!smbios_entries) { 1457 smbios_entries_len = sizeof(uint16_t); 1458 smbios_entries = g_malloc0(smbios_entries_len); 1459 } 1460 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1461 size + sizeof(*table)); 1462 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1463 table->header.type = SMBIOS_TABLE_ENTRY; 1464 table->header.length = cpu_to_le16(sizeof(*table) + size); 1465 memcpy(table->data, header, size); 1466 smbios_entries_len += sizeof(*table) + size; 1467 (*(uint16_t *)smbios_entries) = 1468 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1469 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1470 1471 return; 1472 } 1473 1474 val = qemu_opt_get(opts, "type"); 1475 if (val) { 1476 unsigned long type = strtoul(val, NULL, 0); 1477 1478 if (type > SMBIOS_MAX_TYPE) { 1479 error_setg(errp, "out of range!"); 1480 return; 1481 } 1482 1483 if (test_bit(type, have_binfile_bitmap)) { 1484 error_setg(errp, "can't add fields, binary file already loaded!"); 1485 return; 1486 } 1487 set_bit(type, have_fields_bitmap); 1488 1489 switch (type) { 1490 case 0: 1491 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1492 return; 1493 } 1494 save_opt(&type0.vendor, opts, "vendor"); 1495 save_opt(&type0.version, opts, "version"); 1496 save_opt(&type0.date, opts, "date"); 1497 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1498 1499 val = qemu_opt_get(opts, "release"); 1500 if (val) { 1501 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1502 error_setg(errp, "Invalid release"); 1503 return; 1504 } 1505 type0.have_major_minor = true; 1506 } 1507 return; 1508 case 1: 1509 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1510 return; 1511 } 1512 save_opt(&type1.manufacturer, opts, "manufacturer"); 1513 save_opt(&type1.product, opts, "product"); 1514 save_opt(&type1.version, opts, "version"); 1515 save_opt(&type1.serial, opts, "serial"); 1516 save_opt(&type1.sku, opts, "sku"); 1517 save_opt(&type1.family, opts, "family"); 1518 1519 val = qemu_opt_get(opts, "uuid"); 1520 if (val) { 1521 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1522 error_setg(errp, "Invalid UUID"); 1523 return; 1524 } 1525 qemu_uuid_set = true; 1526 } 1527 return; 1528 case 2: 1529 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1530 return; 1531 } 1532 save_opt(&type2.manufacturer, opts, "manufacturer"); 1533 save_opt(&type2.product, opts, "product"); 1534 save_opt(&type2.version, opts, "version"); 1535 save_opt(&type2.serial, opts, "serial"); 1536 save_opt(&type2.asset, opts, "asset"); 1537 save_opt(&type2.location, opts, "location"); 1538 return; 1539 case 3: 1540 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1541 return; 1542 } 1543 save_opt(&type3.manufacturer, opts, "manufacturer"); 1544 save_opt(&type3.version, opts, "version"); 1545 save_opt(&type3.serial, opts, "serial"); 1546 save_opt(&type3.asset, opts, "asset"); 1547 save_opt(&type3.sku, opts, "sku"); 1548 return; 1549 case 4: 1550 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1551 return; 1552 } 1553 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1554 type4.processor_family = qemu_opt_get_number(opts, 1555 "processor-family", 1556 0x01 /* Other */); 1557 save_opt(&type4.manufacturer, opts, "manufacturer"); 1558 save_opt(&type4.version, opts, "version"); 1559 save_opt(&type4.serial, opts, "serial"); 1560 save_opt(&type4.asset, opts, "asset"); 1561 save_opt(&type4.part, opts, "part"); 1562 /* If the value is 0, it will take the value from the CPU model. */ 1563 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1564 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1565 DEFAULT_CPU_SPEED); 1566 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1567 DEFAULT_CPU_SPEED); 1568 if (type4.max_speed > UINT16_MAX || 1569 type4.current_speed > UINT16_MAX) { 1570 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1571 UINT16_MAX); 1572 } 1573 return; 1574 case 8: 1575 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1576 return; 1577 } 1578 struct type8_instance *t8_i; 1579 t8_i = g_new0(struct type8_instance, 1); 1580 save_opt(&t8_i->internal_reference, opts, "internal_reference"); 1581 save_opt(&t8_i->external_reference, opts, "external_reference"); 1582 t8_i->connector_type = qemu_opt_get_number(opts, 1583 "connector_type", 0); 1584 t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0); 1585 QTAILQ_INSERT_TAIL(&type8, t8_i, next); 1586 return; 1587 case 9: { 1588 if (!qemu_opts_validate(opts, qemu_smbios_type9_opts, errp)) { 1589 return; 1590 } 1591 struct type9_instance *t; 1592 t = g_new0(struct type9_instance, 1); 1593 save_opt(&t->slot_designation, opts, "slot_designation"); 1594 t->slot_type = qemu_opt_get_number(opts, "slot_type", 0); 1595 t->slot_data_bus_width = qemu_opt_get_number(opts, "slot_data_bus_width", 0); 1596 t->current_usage = qemu_opt_get_number(opts, "current_usage", 0); 1597 t->slot_length = qemu_opt_get_number(opts, "slot_length", 0); 1598 t->slot_id = qemu_opt_get_number(opts, "slot_id", 0); 1599 t->slot_characteristics1 = qemu_opt_get_number(opts, "slot_characteristics1", 0); 1600 t->slot_characteristics2 = qemu_opt_get_number(opts, "slot_characteristics2", 0); 1601 save_opt(&t->pcidev, opts, "pcidev"); 1602 QTAILQ_INSERT_TAIL(&type9, t, next); 1603 return; 1604 } 1605 case 11: 1606 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1607 return; 1608 } 1609 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1610 return; 1611 } 1612 return; 1613 case 17: 1614 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1615 return; 1616 } 1617 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1618 save_opt(&type17.bank, opts, "bank"); 1619 save_opt(&type17.manufacturer, opts, "manufacturer"); 1620 save_opt(&type17.serial, opts, "serial"); 1621 save_opt(&type17.asset, opts, "asset"); 1622 save_opt(&type17.part, opts, "part"); 1623 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1624 return; 1625 case 41: { 1626 struct type41_instance *t41_i; 1627 Error *local_err = NULL; 1628 1629 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1630 return; 1631 } 1632 t41_i = g_new0(struct type41_instance, 1); 1633 save_opt(&t41_i->designation, opts, "designation"); 1634 t41_i->kind = qapi_enum_parse(&type41_kind_lookup, 1635 qemu_opt_get(opts, "kind"), 1636 0, &local_err) + 1; 1637 t41_i->kind |= 0x80; /* enabled */ 1638 if (local_err != NULL) { 1639 error_propagate(errp, local_err); 1640 g_free(t41_i); 1641 return; 1642 } 1643 t41_i->instance = qemu_opt_get_number(opts, "instance", 1); 1644 save_opt(&t41_i->pcidev, opts, "pcidev"); 1645 1646 QTAILQ_INSERT_TAIL(&type41, t41_i, next); 1647 return; 1648 } 1649 default: 1650 error_setg(errp, 1651 "Don't know how to build fields for SMBIOS type %ld", 1652 type); 1653 return; 1654 } 1655 } 1656 1657 error_setg(errp, "Must specify type= or file="); 1658 } 1659