1 /* 2 * QEMU USB EHCI Emulation 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2 of the License, or(at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "hw/usb/hcd-ehci.h" 20 #include "qemu/range.h" 21 22 typedef struct EHCIPCIInfo { 23 const char *name; 24 uint16_t vendor_id; 25 uint16_t device_id; 26 uint8_t revision; 27 bool companion; 28 } EHCIPCIInfo; 29 30 static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp) 31 { 32 EHCIPCIState *i = PCI_EHCI(dev); 33 EHCIState *s = &i->ehci; 34 uint8_t *pci_conf = dev->config; 35 36 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 37 38 /* capabilities pointer */ 39 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 40 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */ 41 42 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 43 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 44 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 45 46 /* pci_conf[0x50] = 0x01; *//* power management caps */ 47 48 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */ 49 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */ 50 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */ 51 52 pci_conf[0x64] = 0x00; 53 pci_conf[0x65] = 0x00; 54 pci_conf[0x66] = 0x00; 55 pci_conf[0x67] = 0x00; 56 pci_conf[0x68] = 0x01; 57 pci_conf[0x69] = 0x00; 58 pci_conf[0x6a] = 0x00; 59 pci_conf[0x6b] = 0x00; /* USBLEGSUP */ 60 pci_conf[0x6c] = 0x00; 61 pci_conf[0x6d] = 0x00; 62 pci_conf[0x6e] = 0x00; 63 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */ 64 65 s->irq = pci_allocate_irq(dev); 66 s->as = pci_get_address_space(dev); 67 68 usb_ehci_realize(s, DEVICE(dev), NULL); 69 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 70 } 71 72 static void usb_ehci_pci_init(Object *obj) 73 { 74 DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE); 75 EHCIPCIState *i = PCI_EHCI(obj); 76 EHCIState *s = &i->ehci; 77 78 s->caps[0x09] = 0x68; /* EECP */ 79 80 s->capsbase = 0x00; 81 s->opregbase = 0x20; 82 s->portscbase = 0x44; 83 s->portnr = NB_PORTS; 84 85 if (!dc->hotpluggable) { 86 s->companion_enable = true; 87 } 88 89 usb_ehci_init(s, DEVICE(obj)); 90 } 91 92 static void usb_ehci_pci_exit(PCIDevice *dev) 93 { 94 EHCIPCIState *i = PCI_EHCI(dev); 95 EHCIState *s = &i->ehci; 96 97 usb_ehci_unrealize(s, DEVICE(dev), NULL); 98 99 g_free(s->irq); 100 s->irq = NULL; 101 } 102 103 static void usb_ehci_pci_reset(DeviceState *dev) 104 { 105 PCIDevice *pci_dev = PCI_DEVICE(dev); 106 EHCIPCIState *i = PCI_EHCI(pci_dev); 107 EHCIState *s = &i->ehci; 108 109 ehci_reset(s); 110 } 111 112 static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr, 113 uint32_t val, int l) 114 { 115 EHCIPCIState *i = PCI_EHCI(dev); 116 bool busmaster; 117 118 pci_default_write_config(dev, addr, val, l); 119 120 if (!range_covers_byte(addr, l, PCI_COMMAND)) { 121 return; 122 } 123 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER; 124 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory; 125 } 126 127 static Property ehci_pci_properties[] = { 128 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), 129 DEFINE_PROP_END_OF_LIST(), 130 }; 131 132 static const VMStateDescription vmstate_ehci_pci = { 133 .name = "ehci", 134 .version_id = 2, 135 .minimum_version_id = 1, 136 .fields = (VMStateField[]) { 137 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState), 138 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState), 139 VMSTATE_END_OF_LIST() 140 } 141 }; 142 143 static void ehci_class_init(ObjectClass *klass, void *data) 144 { 145 DeviceClass *dc = DEVICE_CLASS(klass); 146 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 147 148 k->realize = usb_ehci_pci_realize; 149 k->exit = usb_ehci_pci_exit; 150 k->class_id = PCI_CLASS_SERIAL_USB; 151 k->config_write = usb_ehci_pci_write_config; 152 dc->vmsd = &vmstate_ehci_pci; 153 dc->props = ehci_pci_properties; 154 dc->reset = usb_ehci_pci_reset; 155 } 156 157 static const TypeInfo ehci_pci_type_info = { 158 .name = TYPE_PCI_EHCI, 159 .parent = TYPE_PCI_DEVICE, 160 .instance_size = sizeof(EHCIPCIState), 161 .instance_init = usb_ehci_pci_init, 162 .abstract = true, 163 .class_init = ehci_class_init, 164 }; 165 166 static void ehci_data_class_init(ObjectClass *klass, void *data) 167 { 168 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 169 DeviceClass *dc = DEVICE_CLASS(klass); 170 EHCIPCIInfo *i = data; 171 172 k->vendor_id = i->vendor_id; 173 k->device_id = i->device_id; 174 k->revision = i->revision; 175 set_bit(DEVICE_CATEGORY_USB, dc->categories); 176 if (i->companion) { 177 dc->hotpluggable = false; 178 } 179 } 180 181 static struct EHCIPCIInfo ehci_pci_info[] = { 182 { 183 .name = "usb-ehci", 184 .vendor_id = PCI_VENDOR_ID_INTEL, 185 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */ 186 .revision = 0x10, 187 },{ 188 .name = "ich9-usb-ehci1", /* 00:1d.7 */ 189 .vendor_id = PCI_VENDOR_ID_INTEL, 190 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1, 191 .revision = 0x03, 192 .companion = true, 193 },{ 194 .name = "ich9-usb-ehci2", /* 00:1a.7 */ 195 .vendor_id = PCI_VENDOR_ID_INTEL, 196 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2, 197 .revision = 0x03, 198 .companion = true, 199 } 200 }; 201 202 static void ehci_pci_register_types(void) 203 { 204 TypeInfo ehci_type_info = { 205 .parent = TYPE_PCI_EHCI, 206 .class_init = ehci_data_class_init, 207 }; 208 int i; 209 210 type_register_static(&ehci_pci_type_info); 211 212 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) { 213 ehci_type_info.name = ehci_pci_info[i].name; 214 ehci_type_info.class_data = ehci_pci_info + i; 215 type_register(&ehci_type_info); 216 } 217 } 218 219 type_init(ehci_pci_register_types) 220 221 struct ehci_companions { 222 const char *name; 223 int func; 224 int port; 225 }; 226 227 static const struct ehci_companions ich9_1d[] = { 228 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 }, 229 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 }, 230 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 }, 231 }; 232 233 static const struct ehci_companions ich9_1a[] = { 234 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 }, 235 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 }, 236 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 }, 237 }; 238 239 int ehci_create_ich9_with_companions(PCIBus *bus, int slot) 240 { 241 const struct ehci_companions *comp; 242 PCIDevice *ehci, *uhci; 243 BusState *usbbus; 244 const char *name; 245 int i; 246 247 switch (slot) { 248 case 0x1d: 249 name = "ich9-usb-ehci1"; 250 comp = ich9_1d; 251 break; 252 case 0x1a: 253 name = "ich9-usb-ehci2"; 254 comp = ich9_1a; 255 break; 256 default: 257 return -1; 258 } 259 260 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); 261 qdev_init_nofail(&ehci->qdev); 262 usbbus = QLIST_FIRST(&ehci->qdev.child_bus); 263 264 for (i = 0; i < 3; i++) { 265 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), 266 true, comp[i].name); 267 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); 268 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); 269 qdev_init_nofail(&uhci->qdev); 270 } 271 return 0; 272 } 273