1 /* 2 * QEMU USB EHCI Emulation 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2 of the License, or(at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "hw/usb/hcd-ehci.h" 19 #include "qemu/range.h" 20 21 typedef struct EHCIPCIInfo { 22 const char *name; 23 uint16_t vendor_id; 24 uint16_t device_id; 25 uint8_t revision; 26 bool companion; 27 } EHCIPCIInfo; 28 29 static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp) 30 { 31 EHCIPCIState *i = PCI_EHCI(dev); 32 EHCIState *s = &i->ehci; 33 uint8_t *pci_conf = dev->config; 34 35 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 36 37 /* capabilities pointer */ 38 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 39 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */ 40 41 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 42 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 43 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 44 45 /* pci_conf[0x50] = 0x01; *//* power management caps */ 46 47 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */ 48 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */ 49 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */ 50 51 pci_conf[0x64] = 0x00; 52 pci_conf[0x65] = 0x00; 53 pci_conf[0x66] = 0x00; 54 pci_conf[0x67] = 0x00; 55 pci_conf[0x68] = 0x01; 56 pci_conf[0x69] = 0x00; 57 pci_conf[0x6a] = 0x00; 58 pci_conf[0x6b] = 0x00; /* USBLEGSUP */ 59 pci_conf[0x6c] = 0x00; 60 pci_conf[0x6d] = 0x00; 61 pci_conf[0x6e] = 0x00; 62 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */ 63 64 s->irq = pci_allocate_irq(dev); 65 s->as = pci_get_address_space(dev); 66 67 usb_ehci_realize(s, DEVICE(dev), NULL); 68 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 69 } 70 71 static void usb_ehci_pci_init(Object *obj) 72 { 73 DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE); 74 EHCIPCIState *i = PCI_EHCI(obj); 75 EHCIState *s = &i->ehci; 76 77 s->caps[0x09] = 0x68; /* EECP */ 78 79 s->capsbase = 0x00; 80 s->opregbase = 0x20; 81 s->portscbase = 0x44; 82 s->portnr = NB_PORTS; 83 84 if (!dc->hotpluggable) { 85 s->companion_enable = true; 86 } 87 88 usb_ehci_init(s, DEVICE(obj)); 89 } 90 91 static void usb_ehci_pci_exit(PCIDevice *dev) 92 { 93 EHCIPCIState *i = PCI_EHCI(dev); 94 EHCIState *s = &i->ehci; 95 96 usb_ehci_unrealize(s, DEVICE(dev), NULL); 97 98 if (s->irq) { 99 g_free(s->irq); 100 s->irq = NULL; 101 } 102 } 103 104 static void usb_ehci_pci_reset(DeviceState *dev) 105 { 106 PCIDevice *pci_dev = PCI_DEVICE(dev); 107 EHCIPCIState *i = PCI_EHCI(pci_dev); 108 EHCIState *s = &i->ehci; 109 110 ehci_reset(s); 111 } 112 113 static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr, 114 uint32_t val, int l) 115 { 116 EHCIPCIState *i = PCI_EHCI(dev); 117 bool busmaster; 118 119 pci_default_write_config(dev, addr, val, l); 120 121 if (!range_covers_byte(addr, l, PCI_COMMAND)) { 122 return; 123 } 124 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER; 125 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory; 126 } 127 128 static Property ehci_pci_properties[] = { 129 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), 130 DEFINE_PROP_END_OF_LIST(), 131 }; 132 133 static const VMStateDescription vmstate_ehci_pci = { 134 .name = "ehci", 135 .version_id = 2, 136 .minimum_version_id = 1, 137 .fields = (VMStateField[]) { 138 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState), 139 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState), 140 VMSTATE_END_OF_LIST() 141 } 142 }; 143 144 static void ehci_class_init(ObjectClass *klass, void *data) 145 { 146 DeviceClass *dc = DEVICE_CLASS(klass); 147 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 148 149 k->realize = usb_ehci_pci_realize; 150 k->exit = usb_ehci_pci_exit; 151 k->class_id = PCI_CLASS_SERIAL_USB; 152 k->config_write = usb_ehci_pci_write_config; 153 dc->vmsd = &vmstate_ehci_pci; 154 dc->props = ehci_pci_properties; 155 dc->reset = usb_ehci_pci_reset; 156 } 157 158 static const TypeInfo ehci_pci_type_info = { 159 .name = TYPE_PCI_EHCI, 160 .parent = TYPE_PCI_DEVICE, 161 .instance_size = sizeof(EHCIPCIState), 162 .instance_init = usb_ehci_pci_init, 163 .abstract = true, 164 .class_init = ehci_class_init, 165 }; 166 167 static void ehci_data_class_init(ObjectClass *klass, void *data) 168 { 169 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 170 DeviceClass *dc = DEVICE_CLASS(klass); 171 EHCIPCIInfo *i = data; 172 173 k->vendor_id = i->vendor_id; 174 k->device_id = i->device_id; 175 k->revision = i->revision; 176 set_bit(DEVICE_CATEGORY_USB, dc->categories); 177 if (i->companion) { 178 dc->hotpluggable = false; 179 } 180 } 181 182 static struct EHCIPCIInfo ehci_pci_info[] = { 183 { 184 .name = "usb-ehci", 185 .vendor_id = PCI_VENDOR_ID_INTEL, 186 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */ 187 .revision = 0x10, 188 },{ 189 .name = "ich9-usb-ehci1", /* 00:1d.7 */ 190 .vendor_id = PCI_VENDOR_ID_INTEL, 191 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1, 192 .revision = 0x03, 193 .companion = true, 194 },{ 195 .name = "ich9-usb-ehci2", /* 00:1a.7 */ 196 .vendor_id = PCI_VENDOR_ID_INTEL, 197 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2, 198 .revision = 0x03, 199 .companion = true, 200 } 201 }; 202 203 static void ehci_pci_register_types(void) 204 { 205 TypeInfo ehci_type_info = { 206 .parent = TYPE_PCI_EHCI, 207 .class_init = ehci_data_class_init, 208 }; 209 int i; 210 211 type_register_static(&ehci_pci_type_info); 212 213 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) { 214 ehci_type_info.name = ehci_pci_info[i].name; 215 ehci_type_info.class_data = ehci_pci_info + i; 216 type_register(&ehci_type_info); 217 } 218 } 219 220 type_init(ehci_pci_register_types) 221 222 struct ehci_companions { 223 const char *name; 224 int func; 225 int port; 226 }; 227 228 static const struct ehci_companions ich9_1d[] = { 229 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 }, 230 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 }, 231 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 }, 232 }; 233 234 static const struct ehci_companions ich9_1a[] = { 235 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 }, 236 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 }, 237 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 }, 238 }; 239 240 int ehci_create_ich9_with_companions(PCIBus *bus, int slot) 241 { 242 const struct ehci_companions *comp; 243 PCIDevice *ehci, *uhci; 244 BusState *usbbus; 245 const char *name; 246 int i; 247 248 switch (slot) { 249 case 0x1d: 250 name = "ich9-usb-ehci1"; 251 comp = ich9_1d; 252 break; 253 case 0x1a: 254 name = "ich9-usb-ehci2"; 255 comp = ich9_1a; 256 break; 257 default: 258 return -1; 259 } 260 261 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); 262 qdev_init_nofail(&ehci->qdev); 263 usbbus = QLIST_FIRST(&ehci->qdev.child_bus); 264 265 for (i = 0; i < 3; i++) { 266 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), 267 true, comp[i].name); 268 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); 269 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); 270 qdev_init_nofail(&uhci->qdev); 271 } 272 return 0; 273 } 274