1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * USB xHCI controller emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright (c) 2011 Securiforest 5f1ae32a1SGerd Hoffmann * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6f1ae32a1SGerd Hoffmann * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7f1ae32a1SGerd Hoffmann * 8f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 9f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 10f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 11f1ae32a1SGerd Hoffmann * version 2 of the License, or (at your option) any later version. 12f1ae32a1SGerd Hoffmann * 13f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 14f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 17f1ae32a1SGerd Hoffmann * 18f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU Lesser General Public 19f1ae32a1SGerd Hoffmann * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20f1ae32a1SGerd Hoffmann */ 21f1ae32a1SGerd Hoffmann #include "hw/hw.h" 22f1ae32a1SGerd Hoffmann #include "qemu-timer.h" 23f1ae32a1SGerd Hoffmann #include "hw/usb.h" 24f1ae32a1SGerd Hoffmann #include "hw/pci.h" 25f1ae32a1SGerd Hoffmann #include "hw/msi.h" 264c47f800SGerd Hoffmann #include "hw/msix.h" 272d754a10SGerd Hoffmann #include "trace.h" 28f1ae32a1SGerd Hoffmann 29f1ae32a1SGerd Hoffmann //#define DEBUG_XHCI 30f1ae32a1SGerd Hoffmann //#define DEBUG_DATA 31f1ae32a1SGerd Hoffmann 32f1ae32a1SGerd Hoffmann #ifdef DEBUG_XHCI 33f1ae32a1SGerd Hoffmann #define DPRINTF(...) fprintf(stderr, __VA_ARGS__) 34f1ae32a1SGerd Hoffmann #else 35f1ae32a1SGerd Hoffmann #define DPRINTF(...) do {} while (0) 36f1ae32a1SGerd Hoffmann #endif 37f1ae32a1SGerd Hoffmann #define FIXME() do { fprintf(stderr, "FIXME %s:%d\n", \ 38f1ae32a1SGerd Hoffmann __func__, __LINE__); abort(); } while (0) 39f1ae32a1SGerd Hoffmann 400846e635SGerd Hoffmann #define MAXPORTS_2 8 410846e635SGerd Hoffmann #define MAXPORTS_3 8 42f1ae32a1SGerd Hoffmann 430846e635SGerd Hoffmann #define MAXPORTS (MAXPORTS_2+MAXPORTS_3) 44106b214cSGerd Hoffmann #define MAXSLOTS MAXPORTS 45106b214cSGerd Hoffmann #define MAXINTRS 1 /* MAXPORTS */ 46f1ae32a1SGerd Hoffmann 47f1ae32a1SGerd Hoffmann #define TD_QUEUE 24 48f1ae32a1SGerd Hoffmann 49f1ae32a1SGerd Hoffmann /* Very pessimistic, let's hope it's enough for all cases */ 50f1ae32a1SGerd Hoffmann #define EV_QUEUE (((3*TD_QUEUE)+16)*MAXSLOTS) 51f1ae32a1SGerd Hoffmann /* Do not deliver ER Full events. NEC's driver does some things not bound 52f1ae32a1SGerd Hoffmann * to the specs when it gets them */ 53f1ae32a1SGerd Hoffmann #define ER_FULL_HACK 54f1ae32a1SGerd Hoffmann 55f1ae32a1SGerd Hoffmann #define LEN_CAP 0x40 56f1ae32a1SGerd Hoffmann #define LEN_OPER (0x400 + 0x10 * MAXPORTS) 57106b214cSGerd Hoffmann #define LEN_RUNTIME ((MAXINTRS + 1) * 0x20) 58f1ae32a1SGerd Hoffmann #define LEN_DOORBELL ((MAXSLOTS + 1) * 0x20) 59f1ae32a1SGerd Hoffmann 60106b214cSGerd Hoffmann #define OFF_OPER LEN_CAP 61106b214cSGerd Hoffmann #define OFF_RUNTIME 0x1000 62106b214cSGerd Hoffmann #define OFF_DOORBELL 0x2000 634c47f800SGerd Hoffmann #define OFF_MSIX_TABLE 0x3000 644c47f800SGerd Hoffmann #define OFF_MSIX_PBA 0x3800 65f1ae32a1SGerd Hoffmann /* must be power of 2 */ 66106b214cSGerd Hoffmann #define LEN_REGS 0x4000 67f1ae32a1SGerd Hoffmann 68106b214cSGerd Hoffmann #if (OFF_OPER + LEN_OPER) > OFF_RUNTIME 69106b214cSGerd Hoffmann #error Increase OFF_RUNTIME 70106b214cSGerd Hoffmann #endif 71106b214cSGerd Hoffmann #if (OFF_RUNTIME + LEN_RUNTIME) > OFF_DOORBELL 72106b214cSGerd Hoffmann #error Increase OFF_DOORBELL 73106b214cSGerd Hoffmann #endif 74f1ae32a1SGerd Hoffmann #if (OFF_DOORBELL + LEN_DOORBELL) > LEN_REGS 75f1ae32a1SGerd Hoffmann # error Increase LEN_REGS 76f1ae32a1SGerd Hoffmann #endif 77f1ae32a1SGerd Hoffmann 78f1ae32a1SGerd Hoffmann #if MAXINTRS > 1 79f1ae32a1SGerd Hoffmann # error TODO: only one interrupter supported 80f1ae32a1SGerd Hoffmann #endif 81f1ae32a1SGerd Hoffmann 82f1ae32a1SGerd Hoffmann /* bit definitions */ 83f1ae32a1SGerd Hoffmann #define USBCMD_RS (1<<0) 84f1ae32a1SGerd Hoffmann #define USBCMD_HCRST (1<<1) 85f1ae32a1SGerd Hoffmann #define USBCMD_INTE (1<<2) 86f1ae32a1SGerd Hoffmann #define USBCMD_HSEE (1<<3) 87f1ae32a1SGerd Hoffmann #define USBCMD_LHCRST (1<<7) 88f1ae32a1SGerd Hoffmann #define USBCMD_CSS (1<<8) 89f1ae32a1SGerd Hoffmann #define USBCMD_CRS (1<<9) 90f1ae32a1SGerd Hoffmann #define USBCMD_EWE (1<<10) 91f1ae32a1SGerd Hoffmann #define USBCMD_EU3S (1<<11) 92f1ae32a1SGerd Hoffmann 93f1ae32a1SGerd Hoffmann #define USBSTS_HCH (1<<0) 94f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1<<2) 95f1ae32a1SGerd Hoffmann #define USBSTS_EINT (1<<3) 96f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1<<4) 97f1ae32a1SGerd Hoffmann #define USBSTS_SSS (1<<8) 98f1ae32a1SGerd Hoffmann #define USBSTS_RSS (1<<9) 99f1ae32a1SGerd Hoffmann #define USBSTS_SRE (1<<10) 100f1ae32a1SGerd Hoffmann #define USBSTS_CNR (1<<11) 101f1ae32a1SGerd Hoffmann #define USBSTS_HCE (1<<12) 102f1ae32a1SGerd Hoffmann 103f1ae32a1SGerd Hoffmann 104f1ae32a1SGerd Hoffmann #define PORTSC_CCS (1<<0) 105f1ae32a1SGerd Hoffmann #define PORTSC_PED (1<<1) 106f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1<<3) 107f1ae32a1SGerd Hoffmann #define PORTSC_PR (1<<4) 108f1ae32a1SGerd Hoffmann #define PORTSC_PLS_SHIFT 5 109f1ae32a1SGerd Hoffmann #define PORTSC_PLS_MASK 0xf 110f1ae32a1SGerd Hoffmann #define PORTSC_PP (1<<9) 111f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SHIFT 10 112f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_MASK 0xf 113f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_FULL (1<<10) 114f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_LOW (2<<10) 115f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_HIGH (3<<10) 116f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SUPER (4<<10) 117f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SHIFT 14 118f1ae32a1SGerd Hoffmann #define PORTSC_PIC_MASK 0x3 119f1ae32a1SGerd Hoffmann #define PORTSC_LWS (1<<16) 120f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1<<17) 121f1ae32a1SGerd Hoffmann #define PORTSC_PEC (1<<18) 122f1ae32a1SGerd Hoffmann #define PORTSC_WRC (1<<19) 123f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1<<20) 124f1ae32a1SGerd Hoffmann #define PORTSC_PRC (1<<21) 125f1ae32a1SGerd Hoffmann #define PORTSC_PLC (1<<22) 126f1ae32a1SGerd Hoffmann #define PORTSC_CEC (1<<23) 127f1ae32a1SGerd Hoffmann #define PORTSC_CAS (1<<24) 128f1ae32a1SGerd Hoffmann #define PORTSC_WCE (1<<25) 129f1ae32a1SGerd Hoffmann #define PORTSC_WDE (1<<26) 130f1ae32a1SGerd Hoffmann #define PORTSC_WOE (1<<27) 131f1ae32a1SGerd Hoffmann #define PORTSC_DR (1<<30) 132f1ae32a1SGerd Hoffmann #define PORTSC_WPR (1<<31) 133f1ae32a1SGerd Hoffmann 134f1ae32a1SGerd Hoffmann #define CRCR_RCS (1<<0) 135f1ae32a1SGerd Hoffmann #define CRCR_CS (1<<1) 136f1ae32a1SGerd Hoffmann #define CRCR_CA (1<<2) 137f1ae32a1SGerd Hoffmann #define CRCR_CRR (1<<3) 138f1ae32a1SGerd Hoffmann 139f1ae32a1SGerd Hoffmann #define IMAN_IP (1<<0) 140f1ae32a1SGerd Hoffmann #define IMAN_IE (1<<1) 141f1ae32a1SGerd Hoffmann 142f1ae32a1SGerd Hoffmann #define ERDP_EHB (1<<3) 143f1ae32a1SGerd Hoffmann 144f1ae32a1SGerd Hoffmann #define TRB_SIZE 16 145f1ae32a1SGerd Hoffmann typedef struct XHCITRB { 146f1ae32a1SGerd Hoffmann uint64_t parameter; 147f1ae32a1SGerd Hoffmann uint32_t status; 148f1ae32a1SGerd Hoffmann uint32_t control; 14959a70ccdSDavid Gibson dma_addr_t addr; 150f1ae32a1SGerd Hoffmann bool ccs; 151f1ae32a1SGerd Hoffmann } XHCITRB; 152f1ae32a1SGerd Hoffmann 153f1ae32a1SGerd Hoffmann 154f1ae32a1SGerd Hoffmann typedef enum TRBType { 155f1ae32a1SGerd Hoffmann TRB_RESERVED = 0, 156f1ae32a1SGerd Hoffmann TR_NORMAL, 157f1ae32a1SGerd Hoffmann TR_SETUP, 158f1ae32a1SGerd Hoffmann TR_DATA, 159f1ae32a1SGerd Hoffmann TR_STATUS, 160f1ae32a1SGerd Hoffmann TR_ISOCH, 161f1ae32a1SGerd Hoffmann TR_LINK, 162f1ae32a1SGerd Hoffmann TR_EVDATA, 163f1ae32a1SGerd Hoffmann TR_NOOP, 164f1ae32a1SGerd Hoffmann CR_ENABLE_SLOT, 165f1ae32a1SGerd Hoffmann CR_DISABLE_SLOT, 166f1ae32a1SGerd Hoffmann CR_ADDRESS_DEVICE, 167f1ae32a1SGerd Hoffmann CR_CONFIGURE_ENDPOINT, 168f1ae32a1SGerd Hoffmann CR_EVALUATE_CONTEXT, 169f1ae32a1SGerd Hoffmann CR_RESET_ENDPOINT, 170f1ae32a1SGerd Hoffmann CR_STOP_ENDPOINT, 171f1ae32a1SGerd Hoffmann CR_SET_TR_DEQUEUE, 172f1ae32a1SGerd Hoffmann CR_RESET_DEVICE, 173f1ae32a1SGerd Hoffmann CR_FORCE_EVENT, 174f1ae32a1SGerd Hoffmann CR_NEGOTIATE_BW, 175f1ae32a1SGerd Hoffmann CR_SET_LATENCY_TOLERANCE, 176f1ae32a1SGerd Hoffmann CR_GET_PORT_BANDWIDTH, 177f1ae32a1SGerd Hoffmann CR_FORCE_HEADER, 178f1ae32a1SGerd Hoffmann CR_NOOP, 179f1ae32a1SGerd Hoffmann ER_TRANSFER = 32, 180f1ae32a1SGerd Hoffmann ER_COMMAND_COMPLETE, 181f1ae32a1SGerd Hoffmann ER_PORT_STATUS_CHANGE, 182f1ae32a1SGerd Hoffmann ER_BANDWIDTH_REQUEST, 183f1ae32a1SGerd Hoffmann ER_DOORBELL, 184f1ae32a1SGerd Hoffmann ER_HOST_CONTROLLER, 185f1ae32a1SGerd Hoffmann ER_DEVICE_NOTIFICATION, 186f1ae32a1SGerd Hoffmann ER_MFINDEX_WRAP, 187f1ae32a1SGerd Hoffmann /* vendor specific bits */ 188f1ae32a1SGerd Hoffmann CR_VENDOR_VIA_CHALLENGE_RESPONSE = 48, 189f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 190f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 191f1ae32a1SGerd Hoffmann } TRBType; 192f1ae32a1SGerd Hoffmann 193f1ae32a1SGerd Hoffmann #define CR_LINK TR_LINK 194f1ae32a1SGerd Hoffmann 195f1ae32a1SGerd Hoffmann typedef enum TRBCCode { 196f1ae32a1SGerd Hoffmann CC_INVALID = 0, 197f1ae32a1SGerd Hoffmann CC_SUCCESS, 198f1ae32a1SGerd Hoffmann CC_DATA_BUFFER_ERROR, 199f1ae32a1SGerd Hoffmann CC_BABBLE_DETECTED, 200f1ae32a1SGerd Hoffmann CC_USB_TRANSACTION_ERROR, 201f1ae32a1SGerd Hoffmann CC_TRB_ERROR, 202f1ae32a1SGerd Hoffmann CC_STALL_ERROR, 203f1ae32a1SGerd Hoffmann CC_RESOURCE_ERROR, 204f1ae32a1SGerd Hoffmann CC_BANDWIDTH_ERROR, 205f1ae32a1SGerd Hoffmann CC_NO_SLOTS_ERROR, 206f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_TYPE_ERROR, 207f1ae32a1SGerd Hoffmann CC_SLOT_NOT_ENABLED_ERROR, 208f1ae32a1SGerd Hoffmann CC_EP_NOT_ENABLED_ERROR, 209f1ae32a1SGerd Hoffmann CC_SHORT_PACKET, 210f1ae32a1SGerd Hoffmann CC_RING_UNDERRUN, 211f1ae32a1SGerd Hoffmann CC_RING_OVERRUN, 212f1ae32a1SGerd Hoffmann CC_VF_ER_FULL, 213f1ae32a1SGerd Hoffmann CC_PARAMETER_ERROR, 214f1ae32a1SGerd Hoffmann CC_BANDWIDTH_OVERRUN, 215f1ae32a1SGerd Hoffmann CC_CONTEXT_STATE_ERROR, 216f1ae32a1SGerd Hoffmann CC_NO_PING_RESPONSE_ERROR, 217f1ae32a1SGerd Hoffmann CC_EVENT_RING_FULL_ERROR, 218f1ae32a1SGerd Hoffmann CC_INCOMPATIBLE_DEVICE_ERROR, 219f1ae32a1SGerd Hoffmann CC_MISSED_SERVICE_ERROR, 220f1ae32a1SGerd Hoffmann CC_COMMAND_RING_STOPPED, 221f1ae32a1SGerd Hoffmann CC_COMMAND_ABORTED, 222f1ae32a1SGerd Hoffmann CC_STOPPED, 223f1ae32a1SGerd Hoffmann CC_STOPPED_LENGTH_INVALID, 224f1ae32a1SGerd Hoffmann CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 225f1ae32a1SGerd Hoffmann CC_ISOCH_BUFFER_OVERRUN = 31, 226f1ae32a1SGerd Hoffmann CC_EVENT_LOST_ERROR, 227f1ae32a1SGerd Hoffmann CC_UNDEFINED_ERROR, 228f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_ID_ERROR, 229f1ae32a1SGerd Hoffmann CC_SECONDARY_BANDWIDTH_ERROR, 230f1ae32a1SGerd Hoffmann CC_SPLIT_TRANSACTION_ERROR 231f1ae32a1SGerd Hoffmann } TRBCCode; 232f1ae32a1SGerd Hoffmann 233f1ae32a1SGerd Hoffmann #define TRB_C (1<<0) 234f1ae32a1SGerd Hoffmann #define TRB_TYPE_SHIFT 10 235f1ae32a1SGerd Hoffmann #define TRB_TYPE_MASK 0x3f 236f1ae32a1SGerd Hoffmann #define TRB_TYPE(t) (((t).control >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK) 237f1ae32a1SGerd Hoffmann 238f1ae32a1SGerd Hoffmann #define TRB_EV_ED (1<<2) 239f1ae32a1SGerd Hoffmann 240f1ae32a1SGerd Hoffmann #define TRB_TR_ENT (1<<1) 241f1ae32a1SGerd Hoffmann #define TRB_TR_ISP (1<<2) 242f1ae32a1SGerd Hoffmann #define TRB_TR_NS (1<<3) 243f1ae32a1SGerd Hoffmann #define TRB_TR_CH (1<<4) 244f1ae32a1SGerd Hoffmann #define TRB_TR_IOC (1<<5) 245f1ae32a1SGerd Hoffmann #define TRB_TR_IDT (1<<6) 246f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_SHIFT 7 247f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_MASK 0x3 248f1ae32a1SGerd Hoffmann #define TRB_TR_BEI (1<<9) 249f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_SHIFT 16 250f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_MASK 0xf 251f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_SHIFT 20 252f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_MASK 0x7ff 253f1ae32a1SGerd Hoffmann #define TRB_TR_SIA (1<<31) 254f1ae32a1SGerd Hoffmann 255f1ae32a1SGerd Hoffmann #define TRB_TR_DIR (1<<16) 256f1ae32a1SGerd Hoffmann 257f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_SHIFT 24 258f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_MASK 0xff 259f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_SHIFT 16 260f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_MASK 0x1f 261f1ae32a1SGerd Hoffmann 262f1ae32a1SGerd Hoffmann #define TRB_CR_BSR (1<<9) 263f1ae32a1SGerd Hoffmann #define TRB_CR_DC (1<<9) 264f1ae32a1SGerd Hoffmann 265f1ae32a1SGerd Hoffmann #define TRB_LK_TC (1<<1) 266f1ae32a1SGerd Hoffmann 267f1ae32a1SGerd Hoffmann #define EP_TYPE_MASK 0x7 268f1ae32a1SGerd Hoffmann #define EP_TYPE_SHIFT 3 269f1ae32a1SGerd Hoffmann 270f1ae32a1SGerd Hoffmann #define EP_STATE_MASK 0x7 271f1ae32a1SGerd Hoffmann #define EP_DISABLED (0<<0) 272f1ae32a1SGerd Hoffmann #define EP_RUNNING (1<<0) 273f1ae32a1SGerd Hoffmann #define EP_HALTED (2<<0) 274f1ae32a1SGerd Hoffmann #define EP_STOPPED (3<<0) 275f1ae32a1SGerd Hoffmann #define EP_ERROR (4<<0) 276f1ae32a1SGerd Hoffmann 277f1ae32a1SGerd Hoffmann #define SLOT_STATE_MASK 0x1f 278f1ae32a1SGerd Hoffmann #define SLOT_STATE_SHIFT 27 279f1ae32a1SGerd Hoffmann #define SLOT_STATE(s) (((s)>>SLOT_STATE_SHIFT)&SLOT_STATE_MASK) 280f1ae32a1SGerd Hoffmann #define SLOT_ENABLED 0 281f1ae32a1SGerd Hoffmann #define SLOT_DEFAULT 1 282f1ae32a1SGerd Hoffmann #define SLOT_ADDRESSED 2 283f1ae32a1SGerd Hoffmann #define SLOT_CONFIGURED 3 284f1ae32a1SGerd Hoffmann 285f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_MASK 0x1f 286f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_SHIFT 27 287f1ae32a1SGerd Hoffmann 288f1ae32a1SGerd Hoffmann typedef enum EPType { 289f1ae32a1SGerd Hoffmann ET_INVALID = 0, 290f1ae32a1SGerd Hoffmann ET_ISO_OUT, 291f1ae32a1SGerd Hoffmann ET_BULK_OUT, 292f1ae32a1SGerd Hoffmann ET_INTR_OUT, 293f1ae32a1SGerd Hoffmann ET_CONTROL, 294f1ae32a1SGerd Hoffmann ET_ISO_IN, 295f1ae32a1SGerd Hoffmann ET_BULK_IN, 296f1ae32a1SGerd Hoffmann ET_INTR_IN, 297f1ae32a1SGerd Hoffmann } EPType; 298f1ae32a1SGerd Hoffmann 299f1ae32a1SGerd Hoffmann typedef struct XHCIRing { 30059a70ccdSDavid Gibson dma_addr_t base; 30159a70ccdSDavid Gibson dma_addr_t dequeue; 302f1ae32a1SGerd Hoffmann bool ccs; 303f1ae32a1SGerd Hoffmann } XHCIRing; 304f1ae32a1SGerd Hoffmann 305f1ae32a1SGerd Hoffmann typedef struct XHCIPort { 306f1ae32a1SGerd Hoffmann uint32_t portsc; 3070846e635SGerd Hoffmann uint32_t portnr; 3080846e635SGerd Hoffmann USBPort *uport; 3090846e635SGerd Hoffmann uint32_t speedmask; 310f1ae32a1SGerd Hoffmann } XHCIPort; 311f1ae32a1SGerd Hoffmann 312f1ae32a1SGerd Hoffmann struct XHCIState; 313f1ae32a1SGerd Hoffmann typedef struct XHCIState XHCIState; 314f1ae32a1SGerd Hoffmann 315f1ae32a1SGerd Hoffmann typedef struct XHCITransfer { 316f1ae32a1SGerd Hoffmann XHCIState *xhci; 317f1ae32a1SGerd Hoffmann USBPacket packet; 318d5a15814SGerd Hoffmann QEMUSGList sgl; 319f1ae32a1SGerd Hoffmann bool running_async; 320f1ae32a1SGerd Hoffmann bool running_retry; 321f1ae32a1SGerd Hoffmann bool cancelled; 322f1ae32a1SGerd Hoffmann bool complete; 323f1ae32a1SGerd Hoffmann unsigned int iso_pkts; 324f1ae32a1SGerd Hoffmann unsigned int slotid; 325f1ae32a1SGerd Hoffmann unsigned int epid; 326f1ae32a1SGerd Hoffmann bool in_xfer; 327f1ae32a1SGerd Hoffmann bool iso_xfer; 328f1ae32a1SGerd Hoffmann 329f1ae32a1SGerd Hoffmann unsigned int trb_count; 330f1ae32a1SGerd Hoffmann unsigned int trb_alloced; 331f1ae32a1SGerd Hoffmann XHCITRB *trbs; 332f1ae32a1SGerd Hoffmann 333f1ae32a1SGerd Hoffmann TRBCCode status; 334f1ae32a1SGerd Hoffmann 335f1ae32a1SGerd Hoffmann unsigned int pkts; 336f1ae32a1SGerd Hoffmann unsigned int pktsize; 337f1ae32a1SGerd Hoffmann unsigned int cur_pkt; 3383d139684SGerd Hoffmann 3393d139684SGerd Hoffmann uint64_t mfindex_kick; 340f1ae32a1SGerd Hoffmann } XHCITransfer; 341f1ae32a1SGerd Hoffmann 342f1ae32a1SGerd Hoffmann typedef struct XHCIEPContext { 3433d139684SGerd Hoffmann XHCIState *xhci; 3443d139684SGerd Hoffmann unsigned int slotid; 3453d139684SGerd Hoffmann unsigned int epid; 3463d139684SGerd Hoffmann 347f1ae32a1SGerd Hoffmann XHCIRing ring; 348f1ae32a1SGerd Hoffmann unsigned int next_xfer; 349f1ae32a1SGerd Hoffmann unsigned int comp_xfer; 350f1ae32a1SGerd Hoffmann XHCITransfer transfers[TD_QUEUE]; 351f1ae32a1SGerd Hoffmann XHCITransfer *retry; 352f1ae32a1SGerd Hoffmann EPType type; 35359a70ccdSDavid Gibson dma_addr_t pctx; 354f1ae32a1SGerd Hoffmann unsigned int max_psize; 355f1ae32a1SGerd Hoffmann uint32_t state; 3563d139684SGerd Hoffmann 3573d139684SGerd Hoffmann /* iso xfer scheduling */ 3583d139684SGerd Hoffmann unsigned int interval; 3593d139684SGerd Hoffmann int64_t mfindex_last; 3603d139684SGerd Hoffmann QEMUTimer *kick_timer; 361f1ae32a1SGerd Hoffmann } XHCIEPContext; 362f1ae32a1SGerd Hoffmann 363f1ae32a1SGerd Hoffmann typedef struct XHCISlot { 364f1ae32a1SGerd Hoffmann bool enabled; 36559a70ccdSDavid Gibson dma_addr_t ctx; 366f1ae32a1SGerd Hoffmann unsigned int port; 367f1ae32a1SGerd Hoffmann unsigned int devaddr; 368f1ae32a1SGerd Hoffmann XHCIEPContext * eps[31]; 369f1ae32a1SGerd Hoffmann } XHCISlot; 370f1ae32a1SGerd Hoffmann 371f1ae32a1SGerd Hoffmann typedef struct XHCIEvent { 372f1ae32a1SGerd Hoffmann TRBType type; 373f1ae32a1SGerd Hoffmann TRBCCode ccode; 374f1ae32a1SGerd Hoffmann uint64_t ptr; 375f1ae32a1SGerd Hoffmann uint32_t length; 376f1ae32a1SGerd Hoffmann uint32_t flags; 377f1ae32a1SGerd Hoffmann uint8_t slotid; 378f1ae32a1SGerd Hoffmann uint8_t epid; 379f1ae32a1SGerd Hoffmann } XHCIEvent; 380f1ae32a1SGerd Hoffmann 381*962d11e1SGerd Hoffmann typedef struct XHCIInterrupter { 382*962d11e1SGerd Hoffmann uint32_t iman; 383*962d11e1SGerd Hoffmann uint32_t imod; 384*962d11e1SGerd Hoffmann uint32_t erstsz; 385*962d11e1SGerd Hoffmann uint32_t erstba_low; 386*962d11e1SGerd Hoffmann uint32_t erstba_high; 387*962d11e1SGerd Hoffmann uint32_t erdp_low; 388*962d11e1SGerd Hoffmann uint32_t erdp_high; 389*962d11e1SGerd Hoffmann 390*962d11e1SGerd Hoffmann bool msix_used, er_pcs, er_full; 391*962d11e1SGerd Hoffmann 392*962d11e1SGerd Hoffmann dma_addr_t er_start; 393*962d11e1SGerd Hoffmann uint32_t er_size; 394*962d11e1SGerd Hoffmann unsigned int er_ep_idx; 395*962d11e1SGerd Hoffmann 396*962d11e1SGerd Hoffmann XHCIEvent ev_buffer[EV_QUEUE]; 397*962d11e1SGerd Hoffmann unsigned int ev_buffer_put; 398*962d11e1SGerd Hoffmann unsigned int ev_buffer_get; 399*962d11e1SGerd Hoffmann 400*962d11e1SGerd Hoffmann } XHCIInterrupter; 401*962d11e1SGerd Hoffmann 402f1ae32a1SGerd Hoffmann struct XHCIState { 403f1ae32a1SGerd Hoffmann PCIDevice pci_dev; 404f1ae32a1SGerd Hoffmann USBBus bus; 405f1ae32a1SGerd Hoffmann qemu_irq irq; 406f1ae32a1SGerd Hoffmann MemoryRegion mem; 407f1ae32a1SGerd Hoffmann const char *name; 408f1ae32a1SGerd Hoffmann unsigned int devaddr; 409f1ae32a1SGerd Hoffmann 4100846e635SGerd Hoffmann /* properties */ 4110846e635SGerd Hoffmann uint32_t numports_2; 4120846e635SGerd Hoffmann uint32_t numports_3; 413c5e9b02dSGerd Hoffmann uint32_t flags; 4140846e635SGerd Hoffmann 415f1ae32a1SGerd Hoffmann /* Operational Registers */ 416f1ae32a1SGerd Hoffmann uint32_t usbcmd; 417f1ae32a1SGerd Hoffmann uint32_t usbsts; 418f1ae32a1SGerd Hoffmann uint32_t dnctrl; 419f1ae32a1SGerd Hoffmann uint32_t crcr_low; 420f1ae32a1SGerd Hoffmann uint32_t crcr_high; 421f1ae32a1SGerd Hoffmann uint32_t dcbaap_low; 422f1ae32a1SGerd Hoffmann uint32_t dcbaap_high; 423f1ae32a1SGerd Hoffmann uint32_t config; 424f1ae32a1SGerd Hoffmann 4250846e635SGerd Hoffmann USBPort uports[MAX(MAXPORTS_2, MAXPORTS_3)]; 426f1ae32a1SGerd Hoffmann XHCIPort ports[MAXPORTS]; 427f1ae32a1SGerd Hoffmann XHCISlot slots[MAXSLOTS]; 4280846e635SGerd Hoffmann uint32_t numports; 429f1ae32a1SGerd Hoffmann 430f1ae32a1SGerd Hoffmann /* Runtime Registers */ 43101546fa6SGerd Hoffmann int64_t mfindex_start; 43201546fa6SGerd Hoffmann QEMUTimer *mfwrap_timer; 433*962d11e1SGerd Hoffmann XHCIInterrupter intr[MAXINTRS]; 434f1ae32a1SGerd Hoffmann 435f1ae32a1SGerd Hoffmann XHCIRing cmd_ring; 436f1ae32a1SGerd Hoffmann }; 437f1ae32a1SGerd Hoffmann 438f1ae32a1SGerd Hoffmann typedef struct XHCIEvRingSeg { 439f1ae32a1SGerd Hoffmann uint32_t addr_low; 440f1ae32a1SGerd Hoffmann uint32_t addr_high; 441f1ae32a1SGerd Hoffmann uint32_t size; 442f1ae32a1SGerd Hoffmann uint32_t rsvd; 443f1ae32a1SGerd Hoffmann } XHCIEvRingSeg; 444f1ae32a1SGerd Hoffmann 445c5e9b02dSGerd Hoffmann enum xhci_flags { 446c5e9b02dSGerd Hoffmann XHCI_FLAG_USE_MSI = 1, 4474c47f800SGerd Hoffmann XHCI_FLAG_USE_MSI_X, 448c5e9b02dSGerd Hoffmann }; 449c5e9b02dSGerd Hoffmann 45001546fa6SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, 45101546fa6SGerd Hoffmann unsigned int epid); 452*962d11e1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v); 453*962d11e1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v); 45401546fa6SGerd Hoffmann 455f1ae32a1SGerd Hoffmann static const char *TRBType_names[] = { 456f1ae32a1SGerd Hoffmann [TRB_RESERVED] = "TRB_RESERVED", 457f1ae32a1SGerd Hoffmann [TR_NORMAL] = "TR_NORMAL", 458f1ae32a1SGerd Hoffmann [TR_SETUP] = "TR_SETUP", 459f1ae32a1SGerd Hoffmann [TR_DATA] = "TR_DATA", 460f1ae32a1SGerd Hoffmann [TR_STATUS] = "TR_STATUS", 461f1ae32a1SGerd Hoffmann [TR_ISOCH] = "TR_ISOCH", 462f1ae32a1SGerd Hoffmann [TR_LINK] = "TR_LINK", 463f1ae32a1SGerd Hoffmann [TR_EVDATA] = "TR_EVDATA", 464f1ae32a1SGerd Hoffmann [TR_NOOP] = "TR_NOOP", 465f1ae32a1SGerd Hoffmann [CR_ENABLE_SLOT] = "CR_ENABLE_SLOT", 466f1ae32a1SGerd Hoffmann [CR_DISABLE_SLOT] = "CR_DISABLE_SLOT", 467f1ae32a1SGerd Hoffmann [CR_ADDRESS_DEVICE] = "CR_ADDRESS_DEVICE", 468f1ae32a1SGerd Hoffmann [CR_CONFIGURE_ENDPOINT] = "CR_CONFIGURE_ENDPOINT", 469f1ae32a1SGerd Hoffmann [CR_EVALUATE_CONTEXT] = "CR_EVALUATE_CONTEXT", 470f1ae32a1SGerd Hoffmann [CR_RESET_ENDPOINT] = "CR_RESET_ENDPOINT", 471f1ae32a1SGerd Hoffmann [CR_STOP_ENDPOINT] = "CR_STOP_ENDPOINT", 472f1ae32a1SGerd Hoffmann [CR_SET_TR_DEQUEUE] = "CR_SET_TR_DEQUEUE", 473f1ae32a1SGerd Hoffmann [CR_RESET_DEVICE] = "CR_RESET_DEVICE", 474f1ae32a1SGerd Hoffmann [CR_FORCE_EVENT] = "CR_FORCE_EVENT", 475f1ae32a1SGerd Hoffmann [CR_NEGOTIATE_BW] = "CR_NEGOTIATE_BW", 476f1ae32a1SGerd Hoffmann [CR_SET_LATENCY_TOLERANCE] = "CR_SET_LATENCY_TOLERANCE", 477f1ae32a1SGerd Hoffmann [CR_GET_PORT_BANDWIDTH] = "CR_GET_PORT_BANDWIDTH", 478f1ae32a1SGerd Hoffmann [CR_FORCE_HEADER] = "CR_FORCE_HEADER", 479f1ae32a1SGerd Hoffmann [CR_NOOP] = "CR_NOOP", 480f1ae32a1SGerd Hoffmann [ER_TRANSFER] = "ER_TRANSFER", 481f1ae32a1SGerd Hoffmann [ER_COMMAND_COMPLETE] = "ER_COMMAND_COMPLETE", 482f1ae32a1SGerd Hoffmann [ER_PORT_STATUS_CHANGE] = "ER_PORT_STATUS_CHANGE", 483f1ae32a1SGerd Hoffmann [ER_BANDWIDTH_REQUEST] = "ER_BANDWIDTH_REQUEST", 484f1ae32a1SGerd Hoffmann [ER_DOORBELL] = "ER_DOORBELL", 485f1ae32a1SGerd Hoffmann [ER_HOST_CONTROLLER] = "ER_HOST_CONTROLLER", 486f1ae32a1SGerd Hoffmann [ER_DEVICE_NOTIFICATION] = "ER_DEVICE_NOTIFICATION", 487f1ae32a1SGerd Hoffmann [ER_MFINDEX_WRAP] = "ER_MFINDEX_WRAP", 488f1ae32a1SGerd Hoffmann [CR_VENDOR_VIA_CHALLENGE_RESPONSE] = "CR_VENDOR_VIA_CHALLENGE_RESPONSE", 489f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_FIRMWARE_REVISION] = "CR_VENDOR_NEC_FIRMWARE_REVISION", 490f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_CHALLENGE_RESPONSE] = "CR_VENDOR_NEC_CHALLENGE_RESPONSE", 491f1ae32a1SGerd Hoffmann }; 492f1ae32a1SGerd Hoffmann 493873123feSGerd Hoffmann static const char *TRBCCode_names[] = { 494873123feSGerd Hoffmann [CC_INVALID] = "CC_INVALID", 495873123feSGerd Hoffmann [CC_SUCCESS] = "CC_SUCCESS", 496873123feSGerd Hoffmann [CC_DATA_BUFFER_ERROR] = "CC_DATA_BUFFER_ERROR", 497873123feSGerd Hoffmann [CC_BABBLE_DETECTED] = "CC_BABBLE_DETECTED", 498873123feSGerd Hoffmann [CC_USB_TRANSACTION_ERROR] = "CC_USB_TRANSACTION_ERROR", 499873123feSGerd Hoffmann [CC_TRB_ERROR] = "CC_TRB_ERROR", 500873123feSGerd Hoffmann [CC_STALL_ERROR] = "CC_STALL_ERROR", 501873123feSGerd Hoffmann [CC_RESOURCE_ERROR] = "CC_RESOURCE_ERROR", 502873123feSGerd Hoffmann [CC_BANDWIDTH_ERROR] = "CC_BANDWIDTH_ERROR", 503873123feSGerd Hoffmann [CC_NO_SLOTS_ERROR] = "CC_NO_SLOTS_ERROR", 504873123feSGerd Hoffmann [CC_INVALID_STREAM_TYPE_ERROR] = "CC_INVALID_STREAM_TYPE_ERROR", 505873123feSGerd Hoffmann [CC_SLOT_NOT_ENABLED_ERROR] = "CC_SLOT_NOT_ENABLED_ERROR", 506873123feSGerd Hoffmann [CC_EP_NOT_ENABLED_ERROR] = "CC_EP_NOT_ENABLED_ERROR", 507873123feSGerd Hoffmann [CC_SHORT_PACKET] = "CC_SHORT_PACKET", 508873123feSGerd Hoffmann [CC_RING_UNDERRUN] = "CC_RING_UNDERRUN", 509873123feSGerd Hoffmann [CC_RING_OVERRUN] = "CC_RING_OVERRUN", 510873123feSGerd Hoffmann [CC_VF_ER_FULL] = "CC_VF_ER_FULL", 511873123feSGerd Hoffmann [CC_PARAMETER_ERROR] = "CC_PARAMETER_ERROR", 512873123feSGerd Hoffmann [CC_BANDWIDTH_OVERRUN] = "CC_BANDWIDTH_OVERRUN", 513873123feSGerd Hoffmann [CC_CONTEXT_STATE_ERROR] = "CC_CONTEXT_STATE_ERROR", 514873123feSGerd Hoffmann [CC_NO_PING_RESPONSE_ERROR] = "CC_NO_PING_RESPONSE_ERROR", 515873123feSGerd Hoffmann [CC_EVENT_RING_FULL_ERROR] = "CC_EVENT_RING_FULL_ERROR", 516873123feSGerd Hoffmann [CC_INCOMPATIBLE_DEVICE_ERROR] = "CC_INCOMPATIBLE_DEVICE_ERROR", 517873123feSGerd Hoffmann [CC_MISSED_SERVICE_ERROR] = "CC_MISSED_SERVICE_ERROR", 518873123feSGerd Hoffmann [CC_COMMAND_RING_STOPPED] = "CC_COMMAND_RING_STOPPED", 519873123feSGerd Hoffmann [CC_COMMAND_ABORTED] = "CC_COMMAND_ABORTED", 520873123feSGerd Hoffmann [CC_STOPPED] = "CC_STOPPED", 521873123feSGerd Hoffmann [CC_STOPPED_LENGTH_INVALID] = "CC_STOPPED_LENGTH_INVALID", 522873123feSGerd Hoffmann [CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR] 523873123feSGerd Hoffmann = "CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR", 524873123feSGerd Hoffmann [CC_ISOCH_BUFFER_OVERRUN] = "CC_ISOCH_BUFFER_OVERRUN", 525873123feSGerd Hoffmann [CC_EVENT_LOST_ERROR] = "CC_EVENT_LOST_ERROR", 526873123feSGerd Hoffmann [CC_UNDEFINED_ERROR] = "CC_UNDEFINED_ERROR", 527873123feSGerd Hoffmann [CC_INVALID_STREAM_ID_ERROR] = "CC_INVALID_STREAM_ID_ERROR", 528873123feSGerd Hoffmann [CC_SECONDARY_BANDWIDTH_ERROR] = "CC_SECONDARY_BANDWIDTH_ERROR", 529873123feSGerd Hoffmann [CC_SPLIT_TRANSACTION_ERROR] = "CC_SPLIT_TRANSACTION_ERROR", 530873123feSGerd Hoffmann }; 531873123feSGerd Hoffmann 532f1ae32a1SGerd Hoffmann static const char *lookup_name(uint32_t index, const char **list, uint32_t llen) 533f1ae32a1SGerd Hoffmann { 534f1ae32a1SGerd Hoffmann if (index >= llen || list[index] == NULL) { 535f1ae32a1SGerd Hoffmann return "???"; 536f1ae32a1SGerd Hoffmann } 537f1ae32a1SGerd Hoffmann return list[index]; 538f1ae32a1SGerd Hoffmann } 539f1ae32a1SGerd Hoffmann 540f1ae32a1SGerd Hoffmann static const char *trb_name(XHCITRB *trb) 541f1ae32a1SGerd Hoffmann { 542f1ae32a1SGerd Hoffmann return lookup_name(TRB_TYPE(*trb), TRBType_names, 543f1ae32a1SGerd Hoffmann ARRAY_SIZE(TRBType_names)); 544f1ae32a1SGerd Hoffmann } 545f1ae32a1SGerd Hoffmann 546873123feSGerd Hoffmann static const char *event_name(XHCIEvent *event) 547873123feSGerd Hoffmann { 548873123feSGerd Hoffmann return lookup_name(event->ccode, TRBCCode_names, 549873123feSGerd Hoffmann ARRAY_SIZE(TRBCCode_names)); 550873123feSGerd Hoffmann } 551873123feSGerd Hoffmann 55201546fa6SGerd Hoffmann static uint64_t xhci_mfindex_get(XHCIState *xhci) 55301546fa6SGerd Hoffmann { 55401546fa6SGerd Hoffmann int64_t now = qemu_get_clock_ns(vm_clock); 55501546fa6SGerd Hoffmann return (now - xhci->mfindex_start) / 125000; 55601546fa6SGerd Hoffmann } 55701546fa6SGerd Hoffmann 55801546fa6SGerd Hoffmann static void xhci_mfwrap_update(XHCIState *xhci) 55901546fa6SGerd Hoffmann { 56001546fa6SGerd Hoffmann const uint32_t bits = USBCMD_RS | USBCMD_EWE; 56101546fa6SGerd Hoffmann uint32_t mfindex, left; 56201546fa6SGerd Hoffmann int64_t now; 56301546fa6SGerd Hoffmann 56401546fa6SGerd Hoffmann if ((xhci->usbcmd & bits) == bits) { 56501546fa6SGerd Hoffmann now = qemu_get_clock_ns(vm_clock); 56601546fa6SGerd Hoffmann mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff; 56701546fa6SGerd Hoffmann left = 0x4000 - mfindex; 56801546fa6SGerd Hoffmann qemu_mod_timer(xhci->mfwrap_timer, now + left * 125000); 56901546fa6SGerd Hoffmann } else { 57001546fa6SGerd Hoffmann qemu_del_timer(xhci->mfwrap_timer); 57101546fa6SGerd Hoffmann } 57201546fa6SGerd Hoffmann } 57301546fa6SGerd Hoffmann 57401546fa6SGerd Hoffmann static void xhci_mfwrap_timer(void *opaque) 57501546fa6SGerd Hoffmann { 57601546fa6SGerd Hoffmann XHCIState *xhci = opaque; 57701546fa6SGerd Hoffmann XHCIEvent wrap = { ER_MFINDEX_WRAP, CC_SUCCESS }; 57801546fa6SGerd Hoffmann 579*962d11e1SGerd Hoffmann xhci_event(xhci, &wrap, 0); 58001546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 58101546fa6SGerd Hoffmann } 582f1ae32a1SGerd Hoffmann 58359a70ccdSDavid Gibson static inline dma_addr_t xhci_addr64(uint32_t low, uint32_t high) 584f1ae32a1SGerd Hoffmann { 58559a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 586f1ae32a1SGerd Hoffmann return low; 58759a70ccdSDavid Gibson } else { 58859a70ccdSDavid Gibson return low | (((dma_addr_t)high << 16) << 16); 58959a70ccdSDavid Gibson } 590f1ae32a1SGerd Hoffmann } 591f1ae32a1SGerd Hoffmann 59259a70ccdSDavid Gibson static inline dma_addr_t xhci_mask64(uint64_t addr) 593f1ae32a1SGerd Hoffmann { 59459a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 595f1ae32a1SGerd Hoffmann return addr & 0xffffffff; 59659a70ccdSDavid Gibson } else { 59759a70ccdSDavid Gibson return addr; 59859a70ccdSDavid Gibson } 599f1ae32a1SGerd Hoffmann } 600f1ae32a1SGerd Hoffmann 6010846e635SGerd Hoffmann static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) 6020846e635SGerd Hoffmann { 6030846e635SGerd Hoffmann int index; 6040846e635SGerd Hoffmann 6050846e635SGerd Hoffmann if (!uport->dev) { 6060846e635SGerd Hoffmann return NULL; 6070846e635SGerd Hoffmann } 6080846e635SGerd Hoffmann switch (uport->dev->speed) { 6090846e635SGerd Hoffmann case USB_SPEED_LOW: 6100846e635SGerd Hoffmann case USB_SPEED_FULL: 6110846e635SGerd Hoffmann case USB_SPEED_HIGH: 6120846e635SGerd Hoffmann index = uport->index; 6130846e635SGerd Hoffmann break; 6140846e635SGerd Hoffmann case USB_SPEED_SUPER: 6150846e635SGerd Hoffmann index = uport->index + xhci->numports_2; 6160846e635SGerd Hoffmann break; 6170846e635SGerd Hoffmann default: 6180846e635SGerd Hoffmann return NULL; 6190846e635SGerd Hoffmann } 6200846e635SGerd Hoffmann return &xhci->ports[index]; 6210846e635SGerd Hoffmann } 6220846e635SGerd Hoffmann 6234c4abe7cSGerd Hoffmann static void xhci_intx_update(XHCIState *xhci) 624f1ae32a1SGerd Hoffmann { 625f1ae32a1SGerd Hoffmann int level = 0; 626f1ae32a1SGerd Hoffmann 6274c47f800SGerd Hoffmann if (msix_enabled(&xhci->pci_dev) || 6284c47f800SGerd Hoffmann msi_enabled(&xhci->pci_dev)) { 6294c4abe7cSGerd Hoffmann return; 6304c4abe7cSGerd Hoffmann } 6314c4abe7cSGerd Hoffmann 632*962d11e1SGerd Hoffmann if (xhci->intr[0].iman & IMAN_IP && 633*962d11e1SGerd Hoffmann xhci->intr[0].iman & IMAN_IE && 634215bff17SLai Jiangshan xhci->usbcmd & USBCMD_INTE) { 635f1ae32a1SGerd Hoffmann level = 1; 636f1ae32a1SGerd Hoffmann } 637f1ae32a1SGerd Hoffmann 6387acd279fSGerd Hoffmann trace_usb_xhci_irq_intx(level); 639f1ae32a1SGerd Hoffmann qemu_set_irq(xhci->irq, level); 640f1ae32a1SGerd Hoffmann } 6414c4abe7cSGerd Hoffmann 642*962d11e1SGerd Hoffmann static void xhci_msix_update(XHCIState *xhci, int v) 6434c47f800SGerd Hoffmann { 6444c47f800SGerd Hoffmann bool enabled; 6454c47f800SGerd Hoffmann 6464c47f800SGerd Hoffmann if (!msix_enabled(&xhci->pci_dev)) { 6474c47f800SGerd Hoffmann return; 6484c47f800SGerd Hoffmann } 6494c47f800SGerd Hoffmann 650*962d11e1SGerd Hoffmann enabled = xhci->intr[v].iman & IMAN_IE; 651*962d11e1SGerd Hoffmann if (enabled == xhci->intr[v].msix_used) { 6524c47f800SGerd Hoffmann return; 6534c47f800SGerd Hoffmann } 6544c47f800SGerd Hoffmann 6554c47f800SGerd Hoffmann if (enabled) { 656*962d11e1SGerd Hoffmann trace_usb_xhci_irq_msix_use(v); 657*962d11e1SGerd Hoffmann msix_vector_use(&xhci->pci_dev, v); 658*962d11e1SGerd Hoffmann xhci->intr[v].msix_used = true; 6594c47f800SGerd Hoffmann } else { 660*962d11e1SGerd Hoffmann trace_usb_xhci_irq_msix_unuse(v); 661*962d11e1SGerd Hoffmann msix_vector_unuse(&xhci->pci_dev, v); 662*962d11e1SGerd Hoffmann xhci->intr[v].msix_used = false; 6634c47f800SGerd Hoffmann } 6644c47f800SGerd Hoffmann } 6654c47f800SGerd Hoffmann 666*962d11e1SGerd Hoffmann static void xhci_intr_raise(XHCIState *xhci, int v) 6674c4abe7cSGerd Hoffmann { 668*962d11e1SGerd Hoffmann xhci->intr[v].erdp_low |= ERDP_EHB; 669*962d11e1SGerd Hoffmann xhci->intr[v].iman |= IMAN_IP; 6702cae4119SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 6712cae4119SGerd Hoffmann 672*962d11e1SGerd Hoffmann if (!(xhci->intr[v].iman & IMAN_IE)) { 6734c4abe7cSGerd Hoffmann return; 6744c4abe7cSGerd Hoffmann } 6754c4abe7cSGerd Hoffmann 6764c4abe7cSGerd Hoffmann if (!(xhci->usbcmd & USBCMD_INTE)) { 6774c4abe7cSGerd Hoffmann return; 6784c4abe7cSGerd Hoffmann } 6794c4abe7cSGerd Hoffmann 6804c47f800SGerd Hoffmann if (msix_enabled(&xhci->pci_dev)) { 681*962d11e1SGerd Hoffmann trace_usb_xhci_irq_msix(v); 682*962d11e1SGerd Hoffmann msix_notify(&xhci->pci_dev, v); 6834c47f800SGerd Hoffmann return; 6844c47f800SGerd Hoffmann } 6854c47f800SGerd Hoffmann 6864c4abe7cSGerd Hoffmann if (msi_enabled(&xhci->pci_dev)) { 687*962d11e1SGerd Hoffmann trace_usb_xhci_irq_msi(v); 688*962d11e1SGerd Hoffmann msi_notify(&xhci->pci_dev, v); 6894c4abe7cSGerd Hoffmann return; 6904c4abe7cSGerd Hoffmann } 6914c4abe7cSGerd Hoffmann 692*962d11e1SGerd Hoffmann if (v == 0) { 6934c4abe7cSGerd Hoffmann trace_usb_xhci_irq_intx(1); 6944c4abe7cSGerd Hoffmann qemu_set_irq(xhci->irq, 1); 695f1ae32a1SGerd Hoffmann } 696*962d11e1SGerd Hoffmann } 697f1ae32a1SGerd Hoffmann 698f1ae32a1SGerd Hoffmann static inline int xhci_running(XHCIState *xhci) 699f1ae32a1SGerd Hoffmann { 700*962d11e1SGerd Hoffmann return !(xhci->usbsts & USBSTS_HCH) && !xhci->intr[0].er_full; 701f1ae32a1SGerd Hoffmann } 702f1ae32a1SGerd Hoffmann 703f1ae32a1SGerd Hoffmann static void xhci_die(XHCIState *xhci) 704f1ae32a1SGerd Hoffmann { 705f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCE; 706f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: asserted controller error\n"); 707f1ae32a1SGerd Hoffmann } 708f1ae32a1SGerd Hoffmann 709*962d11e1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) 710f1ae32a1SGerd Hoffmann { 711*962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 712f1ae32a1SGerd Hoffmann XHCITRB ev_trb; 71359a70ccdSDavid Gibson dma_addr_t addr; 714f1ae32a1SGerd Hoffmann 715f1ae32a1SGerd Hoffmann ev_trb.parameter = cpu_to_le64(event->ptr); 716f1ae32a1SGerd Hoffmann ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24)); 717f1ae32a1SGerd Hoffmann ev_trb.control = (event->slotid << 24) | (event->epid << 16) | 718f1ae32a1SGerd Hoffmann event->flags | (event->type << TRB_TYPE_SHIFT); 719*962d11e1SGerd Hoffmann if (intr->er_pcs) { 720f1ae32a1SGerd Hoffmann ev_trb.control |= TRB_C; 721f1ae32a1SGerd Hoffmann } 722f1ae32a1SGerd Hoffmann ev_trb.control = cpu_to_le32(ev_trb.control); 723f1ae32a1SGerd Hoffmann 724*962d11e1SGerd Hoffmann trace_usb_xhci_queue_event(v, intr->er_ep_idx, trb_name(&ev_trb), 725873123feSGerd Hoffmann event_name(event), ev_trb.parameter, 726873123feSGerd Hoffmann ev_trb.status, ev_trb.control); 727f1ae32a1SGerd Hoffmann 728*962d11e1SGerd Hoffmann addr = intr->er_start + TRB_SIZE*intr->er_ep_idx; 72959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, addr, &ev_trb, TRB_SIZE); 730f1ae32a1SGerd Hoffmann 731*962d11e1SGerd Hoffmann intr->er_ep_idx++; 732*962d11e1SGerd Hoffmann if (intr->er_ep_idx >= intr->er_size) { 733*962d11e1SGerd Hoffmann intr->er_ep_idx = 0; 734*962d11e1SGerd Hoffmann intr->er_pcs = !intr->er_pcs; 735f1ae32a1SGerd Hoffmann } 736f1ae32a1SGerd Hoffmann } 737f1ae32a1SGerd Hoffmann 738*962d11e1SGerd Hoffmann static void xhci_events_update(XHCIState *xhci, int v) 739f1ae32a1SGerd Hoffmann { 740*962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 74159a70ccdSDavid Gibson dma_addr_t erdp; 742f1ae32a1SGerd Hoffmann unsigned int dp_idx; 743f1ae32a1SGerd Hoffmann bool do_irq = 0; 744f1ae32a1SGerd Hoffmann 745f1ae32a1SGerd Hoffmann if (xhci->usbsts & USBSTS_HCH) { 746f1ae32a1SGerd Hoffmann return; 747f1ae32a1SGerd Hoffmann } 748f1ae32a1SGerd Hoffmann 749*962d11e1SGerd Hoffmann erdp = xhci_addr64(intr->erdp_low, intr->erdp_high); 750*962d11e1SGerd Hoffmann if (erdp < intr->er_start || 751*962d11e1SGerd Hoffmann erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) { 75259a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 753*962d11e1SGerd Hoffmann fprintf(stderr, "xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n", 754*962d11e1SGerd Hoffmann v, intr->er_start, intr->er_size); 755f1ae32a1SGerd Hoffmann xhci_die(xhci); 756f1ae32a1SGerd Hoffmann return; 757f1ae32a1SGerd Hoffmann } 758*962d11e1SGerd Hoffmann dp_idx = (erdp - intr->er_start) / TRB_SIZE; 759*962d11e1SGerd Hoffmann assert(dp_idx < intr->er_size); 760f1ae32a1SGerd Hoffmann 761f1ae32a1SGerd Hoffmann /* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus 762f1ae32a1SGerd Hoffmann * deadlocks when the ER is full. Hack it by holding off events until 763f1ae32a1SGerd Hoffmann * the driver decides to free at least half of the ring */ 764*962d11e1SGerd Hoffmann if (intr->er_full) { 765*962d11e1SGerd Hoffmann int er_free = dp_idx - intr->er_ep_idx; 766f1ae32a1SGerd Hoffmann if (er_free <= 0) { 767*962d11e1SGerd Hoffmann er_free += intr->er_size; 768f1ae32a1SGerd Hoffmann } 769*962d11e1SGerd Hoffmann if (er_free < (intr->er_size/2)) { 770f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring still " 771f1ae32a1SGerd Hoffmann "more than half full (hack)\n"); 772f1ae32a1SGerd Hoffmann return; 773f1ae32a1SGerd Hoffmann } 774f1ae32a1SGerd Hoffmann } 775f1ae32a1SGerd Hoffmann 776*962d11e1SGerd Hoffmann while (intr->ev_buffer_put != intr->ev_buffer_get) { 777*962d11e1SGerd Hoffmann assert(intr->er_full); 778*962d11e1SGerd Hoffmann if (((intr->er_ep_idx+1) % intr->er_size) == dp_idx) { 779f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring full again\n"); 780f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 781f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 782*962d11e1SGerd Hoffmann xhci_write_event(xhci, &full, v); 783f1ae32a1SGerd Hoffmann #endif 784f1ae32a1SGerd Hoffmann do_irq = 1; 785f1ae32a1SGerd Hoffmann break; 786f1ae32a1SGerd Hoffmann } 787*962d11e1SGerd Hoffmann XHCIEvent *event = &intr->ev_buffer[intr->ev_buffer_get]; 788*962d11e1SGerd Hoffmann xhci_write_event(xhci, event, v); 789*962d11e1SGerd Hoffmann intr->ev_buffer_get++; 790f1ae32a1SGerd Hoffmann do_irq = 1; 791*962d11e1SGerd Hoffmann if (intr->ev_buffer_get == EV_QUEUE) { 792*962d11e1SGerd Hoffmann intr->ev_buffer_get = 0; 793f1ae32a1SGerd Hoffmann } 794f1ae32a1SGerd Hoffmann } 795f1ae32a1SGerd Hoffmann 796f1ae32a1SGerd Hoffmann if (do_irq) { 797*962d11e1SGerd Hoffmann xhci_intr_raise(xhci, v); 798f1ae32a1SGerd Hoffmann } 799f1ae32a1SGerd Hoffmann 800*962d11e1SGerd Hoffmann if (intr->er_full && intr->ev_buffer_put == intr->ev_buffer_get) { 801f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring no longer full\n"); 802*962d11e1SGerd Hoffmann intr->er_full = 0; 803f1ae32a1SGerd Hoffmann } 804f1ae32a1SGerd Hoffmann return; 805f1ae32a1SGerd Hoffmann } 806f1ae32a1SGerd Hoffmann 807*962d11e1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v) 808f1ae32a1SGerd Hoffmann { 809*962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 81059a70ccdSDavid Gibson dma_addr_t erdp; 811f1ae32a1SGerd Hoffmann unsigned int dp_idx; 812f1ae32a1SGerd Hoffmann 813*962d11e1SGerd Hoffmann if (intr->er_full) { 814f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 815*962d11e1SGerd Hoffmann if (((intr->ev_buffer_put+1) % EV_QUEUE) == intr->ev_buffer_get) { 816f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 817f1ae32a1SGerd Hoffmann return; 818f1ae32a1SGerd Hoffmann } 819*962d11e1SGerd Hoffmann intr->ev_buffer[intr->ev_buffer_put++] = *event; 820*962d11e1SGerd Hoffmann if (intr->ev_buffer_put == EV_QUEUE) { 821*962d11e1SGerd Hoffmann intr->ev_buffer_put = 0; 822f1ae32a1SGerd Hoffmann } 823f1ae32a1SGerd Hoffmann return; 824f1ae32a1SGerd Hoffmann } 825f1ae32a1SGerd Hoffmann 826*962d11e1SGerd Hoffmann erdp = xhci_addr64(intr->erdp_low, intr->erdp_high); 827*962d11e1SGerd Hoffmann if (erdp < intr->er_start || 828*962d11e1SGerd Hoffmann erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) { 82959a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 830*962d11e1SGerd Hoffmann fprintf(stderr, "xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n", 831*962d11e1SGerd Hoffmann v, intr->er_start, intr->er_size); 832f1ae32a1SGerd Hoffmann xhci_die(xhci); 833f1ae32a1SGerd Hoffmann return; 834f1ae32a1SGerd Hoffmann } 835f1ae32a1SGerd Hoffmann 836*962d11e1SGerd Hoffmann dp_idx = (erdp - intr->er_start) / TRB_SIZE; 837*962d11e1SGerd Hoffmann assert(dp_idx < intr->er_size); 838f1ae32a1SGerd Hoffmann 839*962d11e1SGerd Hoffmann if ((intr->er_ep_idx+1) % intr->er_size == dp_idx) { 840f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 841f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 842f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 843f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 844f1ae32a1SGerd Hoffmann #endif 845*962d11e1SGerd Hoffmann intr->er_full = 1; 846*962d11e1SGerd Hoffmann if (((intr->ev_buffer_put+1) % EV_QUEUE) == intr->ev_buffer_get) { 847f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 848f1ae32a1SGerd Hoffmann return; 849f1ae32a1SGerd Hoffmann } 850*962d11e1SGerd Hoffmann intr->ev_buffer[intr->ev_buffer_put++] = *event; 851*962d11e1SGerd Hoffmann if (intr->ev_buffer_put == EV_QUEUE) { 852*962d11e1SGerd Hoffmann intr->ev_buffer_put = 0; 853f1ae32a1SGerd Hoffmann } 854f1ae32a1SGerd Hoffmann } else { 855*962d11e1SGerd Hoffmann xhci_write_event(xhci, event, v); 856f1ae32a1SGerd Hoffmann } 857f1ae32a1SGerd Hoffmann 858*962d11e1SGerd Hoffmann xhci_intr_raise(xhci, v); 859f1ae32a1SGerd Hoffmann } 860f1ae32a1SGerd Hoffmann 861f1ae32a1SGerd Hoffmann static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, 86259a70ccdSDavid Gibson dma_addr_t base) 863f1ae32a1SGerd Hoffmann { 864f1ae32a1SGerd Hoffmann ring->base = base; 865f1ae32a1SGerd Hoffmann ring->dequeue = base; 866f1ae32a1SGerd Hoffmann ring->ccs = 1; 867f1ae32a1SGerd Hoffmann } 868f1ae32a1SGerd Hoffmann 869f1ae32a1SGerd Hoffmann static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, 87059a70ccdSDavid Gibson dma_addr_t *addr) 871f1ae32a1SGerd Hoffmann { 872f1ae32a1SGerd Hoffmann while (1) { 873f1ae32a1SGerd Hoffmann TRBType type; 87459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ring->dequeue, trb, TRB_SIZE); 875f1ae32a1SGerd Hoffmann trb->addr = ring->dequeue; 876f1ae32a1SGerd Hoffmann trb->ccs = ring->ccs; 877f1ae32a1SGerd Hoffmann le64_to_cpus(&trb->parameter); 878f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->status); 879f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->control); 880f1ae32a1SGerd Hoffmann 8810703a4a7SGerd Hoffmann trace_usb_xhci_fetch_trb(ring->dequeue, trb_name(trb), 8820703a4a7SGerd Hoffmann trb->parameter, trb->status, trb->control); 883f1ae32a1SGerd Hoffmann 884f1ae32a1SGerd Hoffmann if ((trb->control & TRB_C) != ring->ccs) { 885f1ae32a1SGerd Hoffmann return 0; 886f1ae32a1SGerd Hoffmann } 887f1ae32a1SGerd Hoffmann 888f1ae32a1SGerd Hoffmann type = TRB_TYPE(*trb); 889f1ae32a1SGerd Hoffmann 890f1ae32a1SGerd Hoffmann if (type != TR_LINK) { 891f1ae32a1SGerd Hoffmann if (addr) { 892f1ae32a1SGerd Hoffmann *addr = ring->dequeue; 893f1ae32a1SGerd Hoffmann } 894f1ae32a1SGerd Hoffmann ring->dequeue += TRB_SIZE; 895f1ae32a1SGerd Hoffmann return type; 896f1ae32a1SGerd Hoffmann } else { 897f1ae32a1SGerd Hoffmann ring->dequeue = xhci_mask64(trb->parameter); 898f1ae32a1SGerd Hoffmann if (trb->control & TRB_LK_TC) { 899f1ae32a1SGerd Hoffmann ring->ccs = !ring->ccs; 900f1ae32a1SGerd Hoffmann } 901f1ae32a1SGerd Hoffmann } 902f1ae32a1SGerd Hoffmann } 903f1ae32a1SGerd Hoffmann } 904f1ae32a1SGerd Hoffmann 905f1ae32a1SGerd Hoffmann static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) 906f1ae32a1SGerd Hoffmann { 907f1ae32a1SGerd Hoffmann XHCITRB trb; 908f1ae32a1SGerd Hoffmann int length = 0; 90959a70ccdSDavid Gibson dma_addr_t dequeue = ring->dequeue; 910f1ae32a1SGerd Hoffmann bool ccs = ring->ccs; 911f1ae32a1SGerd Hoffmann /* hack to bundle together the two/three TDs that make a setup transfer */ 912f1ae32a1SGerd Hoffmann bool control_td_set = 0; 913f1ae32a1SGerd Hoffmann 914f1ae32a1SGerd Hoffmann while (1) { 915f1ae32a1SGerd Hoffmann TRBType type; 91659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dequeue, &trb, TRB_SIZE); 917f1ae32a1SGerd Hoffmann le64_to_cpus(&trb.parameter); 918f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.status); 919f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.control); 920f1ae32a1SGerd Hoffmann 921f1ae32a1SGerd Hoffmann if ((trb.control & TRB_C) != ccs) { 922f1ae32a1SGerd Hoffmann return -length; 923f1ae32a1SGerd Hoffmann } 924f1ae32a1SGerd Hoffmann 925f1ae32a1SGerd Hoffmann type = TRB_TYPE(trb); 926f1ae32a1SGerd Hoffmann 927f1ae32a1SGerd Hoffmann if (type == TR_LINK) { 928f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(trb.parameter); 929f1ae32a1SGerd Hoffmann if (trb.control & TRB_LK_TC) { 930f1ae32a1SGerd Hoffmann ccs = !ccs; 931f1ae32a1SGerd Hoffmann } 932f1ae32a1SGerd Hoffmann continue; 933f1ae32a1SGerd Hoffmann } 934f1ae32a1SGerd Hoffmann 935f1ae32a1SGerd Hoffmann length += 1; 936f1ae32a1SGerd Hoffmann dequeue += TRB_SIZE; 937f1ae32a1SGerd Hoffmann 938f1ae32a1SGerd Hoffmann if (type == TR_SETUP) { 939f1ae32a1SGerd Hoffmann control_td_set = 1; 940f1ae32a1SGerd Hoffmann } else if (type == TR_STATUS) { 941f1ae32a1SGerd Hoffmann control_td_set = 0; 942f1ae32a1SGerd Hoffmann } 943f1ae32a1SGerd Hoffmann 944f1ae32a1SGerd Hoffmann if (!control_td_set && !(trb.control & TRB_TR_CH)) { 945f1ae32a1SGerd Hoffmann return length; 946f1ae32a1SGerd Hoffmann } 947f1ae32a1SGerd Hoffmann } 948f1ae32a1SGerd Hoffmann } 949f1ae32a1SGerd Hoffmann 950*962d11e1SGerd Hoffmann static void xhci_er_reset(XHCIState *xhci, int v) 951f1ae32a1SGerd Hoffmann { 952*962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 953f1ae32a1SGerd Hoffmann XHCIEvRingSeg seg; 954f1ae32a1SGerd Hoffmann 955f1ae32a1SGerd Hoffmann /* cache the (sole) event ring segment location */ 956*962d11e1SGerd Hoffmann if (intr->erstsz != 1) { 957*962d11e1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", intr->erstsz); 958f1ae32a1SGerd Hoffmann xhci_die(xhci); 959f1ae32a1SGerd Hoffmann return; 960f1ae32a1SGerd Hoffmann } 961*962d11e1SGerd Hoffmann dma_addr_t erstba = xhci_addr64(intr->erstba_low, intr->erstba_high); 96259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, erstba, &seg, sizeof(seg)); 963f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_low); 964f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_high); 965f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.size); 966f1ae32a1SGerd Hoffmann if (seg.size < 16 || seg.size > 4096) { 967f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for segment size: %d\n", seg.size); 968f1ae32a1SGerd Hoffmann xhci_die(xhci); 969f1ae32a1SGerd Hoffmann return; 970f1ae32a1SGerd Hoffmann } 971*962d11e1SGerd Hoffmann intr->er_start = xhci_addr64(seg.addr_low, seg.addr_high); 972*962d11e1SGerd Hoffmann intr->er_size = seg.size; 973f1ae32a1SGerd Hoffmann 974*962d11e1SGerd Hoffmann intr->er_ep_idx = 0; 975*962d11e1SGerd Hoffmann intr->er_pcs = 1; 976*962d11e1SGerd Hoffmann intr->er_full = 0; 977f1ae32a1SGerd Hoffmann 978*962d11e1SGerd Hoffmann DPRINTF("xhci: event ring[%d]:" DMA_ADDR_FMT " [%d]\n", 979*962d11e1SGerd Hoffmann v, intr->er_start, intr->er_size); 980f1ae32a1SGerd Hoffmann } 981f1ae32a1SGerd Hoffmann 982f1ae32a1SGerd Hoffmann static void xhci_run(XHCIState *xhci) 983f1ae32a1SGerd Hoffmann { 984fc0ddacaSGerd Hoffmann trace_usb_xhci_run(); 985f1ae32a1SGerd Hoffmann xhci->usbsts &= ~USBSTS_HCH; 98601546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 987f1ae32a1SGerd Hoffmann } 988f1ae32a1SGerd Hoffmann 989f1ae32a1SGerd Hoffmann static void xhci_stop(XHCIState *xhci) 990f1ae32a1SGerd Hoffmann { 991fc0ddacaSGerd Hoffmann trace_usb_xhci_stop(); 992f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCH; 993f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 994f1ae32a1SGerd Hoffmann } 995f1ae32a1SGerd Hoffmann 996f1ae32a1SGerd Hoffmann static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx, 997f1ae32a1SGerd Hoffmann uint32_t state) 998f1ae32a1SGerd Hoffmann { 999f1ae32a1SGerd Hoffmann uint32_t ctx[5]; 1000f1ae32a1SGerd Hoffmann if (epctx->state == state) { 1001f1ae32a1SGerd Hoffmann return; 1002f1ae32a1SGerd Hoffmann } 1003f1ae32a1SGerd Hoffmann 100459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 1005f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 1006f1ae32a1SGerd Hoffmann ctx[0] |= state; 1007f1ae32a1SGerd Hoffmann ctx[2] = epctx->ring.dequeue | epctx->ring.ccs; 1008f1ae32a1SGerd Hoffmann ctx[3] = (epctx->ring.dequeue >> 16) >> 16; 100959a70ccdSDavid Gibson DPRINTF("xhci: set epctx: " DMA_ADDR_FMT " state=%d dequeue=%08x%08x\n", 1010f1ae32a1SGerd Hoffmann epctx->pctx, state, ctx[3], ctx[2]); 101159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 1012f1ae32a1SGerd Hoffmann epctx->state = state; 1013f1ae32a1SGerd Hoffmann } 1014f1ae32a1SGerd Hoffmann 10153d139684SGerd Hoffmann static void xhci_ep_kick_timer(void *opaque) 10163d139684SGerd Hoffmann { 10173d139684SGerd Hoffmann XHCIEPContext *epctx = opaque; 10183d139684SGerd Hoffmann xhci_kick_ep(epctx->xhci, epctx->slotid, epctx->epid); 10193d139684SGerd Hoffmann } 10203d139684SGerd Hoffmann 1021f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid, 102259a70ccdSDavid Gibson unsigned int epid, dma_addr_t pctx, 1023f1ae32a1SGerd Hoffmann uint32_t *ctx) 1024f1ae32a1SGerd Hoffmann { 1025f1ae32a1SGerd Hoffmann XHCISlot *slot; 1026f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 102759a70ccdSDavid Gibson dma_addr_t dequeue; 1028f1ae32a1SGerd Hoffmann int i; 1029f1ae32a1SGerd Hoffmann 1030c1f6b493SGerd Hoffmann trace_usb_xhci_ep_enable(slotid, epid); 1031f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1032f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1033f1ae32a1SGerd Hoffmann 1034f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1035f1ae32a1SGerd Hoffmann if (slot->eps[epid-1]) { 1036f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot %d ep %d already enabled!\n", slotid, epid); 1037f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1038f1ae32a1SGerd Hoffmann } 1039f1ae32a1SGerd Hoffmann 1040f1ae32a1SGerd Hoffmann epctx = g_malloc(sizeof(XHCIEPContext)); 1041f1ae32a1SGerd Hoffmann memset(epctx, 0, sizeof(XHCIEPContext)); 10423d139684SGerd Hoffmann epctx->xhci = xhci; 10433d139684SGerd Hoffmann epctx->slotid = slotid; 10443d139684SGerd Hoffmann epctx->epid = epid; 1045f1ae32a1SGerd Hoffmann 1046f1ae32a1SGerd Hoffmann slot->eps[epid-1] = epctx; 1047f1ae32a1SGerd Hoffmann 1048f1ae32a1SGerd Hoffmann dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]); 1049f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue); 1050f1ae32a1SGerd Hoffmann epctx->ring.ccs = ctx[2] & 1; 1051f1ae32a1SGerd Hoffmann 1052f1ae32a1SGerd Hoffmann epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK; 1053f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d type is %d\n", epid/2, epid%2, epctx->type); 1054f1ae32a1SGerd Hoffmann epctx->pctx = pctx; 1055f1ae32a1SGerd Hoffmann epctx->max_psize = ctx[1]>>16; 1056f1ae32a1SGerd Hoffmann epctx->max_psize *= 1+((ctx[1]>>8)&0xff); 1057f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d max transaction (burst) size is %d\n", 1058f1ae32a1SGerd Hoffmann epid/2, epid%2, epctx->max_psize); 1059f1ae32a1SGerd Hoffmann for (i = 0; i < ARRAY_SIZE(epctx->transfers); i++) { 1060f1ae32a1SGerd Hoffmann usb_packet_init(&epctx->transfers[i].packet); 1061f1ae32a1SGerd Hoffmann } 1062f1ae32a1SGerd Hoffmann 10633d139684SGerd Hoffmann epctx->interval = 1 << (ctx[0] >> 16) & 0xff; 10643d139684SGerd Hoffmann epctx->mfindex_last = 0; 10653d139684SGerd Hoffmann epctx->kick_timer = qemu_new_timer_ns(vm_clock, xhci_ep_kick_timer, epctx); 10663d139684SGerd Hoffmann 1067f1ae32a1SGerd Hoffmann epctx->state = EP_RUNNING; 1068f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 1069f1ae32a1SGerd Hoffmann ctx[0] |= EP_RUNNING; 1070f1ae32a1SGerd Hoffmann 1071f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1072f1ae32a1SGerd Hoffmann } 1073f1ae32a1SGerd Hoffmann 1074f1ae32a1SGerd Hoffmann static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid, 1075f1ae32a1SGerd Hoffmann unsigned int epid) 1076f1ae32a1SGerd Hoffmann { 1077f1ae32a1SGerd Hoffmann XHCISlot *slot; 1078f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1079f1ae32a1SGerd Hoffmann int i, xferi, killed = 0; 1080f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1081f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1082f1ae32a1SGerd Hoffmann 1083f1ae32a1SGerd Hoffmann DPRINTF("xhci_ep_nuke_xfers(%d, %d)\n", slotid, epid); 1084f1ae32a1SGerd Hoffmann 1085f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1086f1ae32a1SGerd Hoffmann 1087f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1088f1ae32a1SGerd Hoffmann return 0; 1089f1ae32a1SGerd Hoffmann } 1090f1ae32a1SGerd Hoffmann 1091f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1092f1ae32a1SGerd Hoffmann 1093f1ae32a1SGerd Hoffmann xferi = epctx->next_xfer; 1094f1ae32a1SGerd Hoffmann for (i = 0; i < TD_QUEUE; i++) { 1095f1ae32a1SGerd Hoffmann XHCITransfer *t = &epctx->transfers[xferi]; 1096f1ae32a1SGerd Hoffmann if (t->running_async) { 1097f1ae32a1SGerd Hoffmann usb_cancel_packet(&t->packet); 1098f1ae32a1SGerd Hoffmann t->running_async = 0; 1099f1ae32a1SGerd Hoffmann t->cancelled = 1; 1100f1ae32a1SGerd Hoffmann DPRINTF("xhci: cancelling transfer %d, waiting for it to complete...\n", i); 1101f1ae32a1SGerd Hoffmann killed++; 1102f1ae32a1SGerd Hoffmann } 1103f1ae32a1SGerd Hoffmann if (t->running_retry) { 1104f1ae32a1SGerd Hoffmann t->running_retry = 0; 1105f1ae32a1SGerd Hoffmann epctx->retry = NULL; 11063d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 1107f1ae32a1SGerd Hoffmann } 1108f1ae32a1SGerd Hoffmann if (t->trbs) { 1109f1ae32a1SGerd Hoffmann g_free(t->trbs); 1110f1ae32a1SGerd Hoffmann } 1111f1ae32a1SGerd Hoffmann 1112f1ae32a1SGerd Hoffmann t->trbs = NULL; 1113f1ae32a1SGerd Hoffmann t->trb_count = t->trb_alloced = 0; 1114f1ae32a1SGerd Hoffmann xferi = (xferi + 1) % TD_QUEUE; 1115f1ae32a1SGerd Hoffmann } 1116f1ae32a1SGerd Hoffmann return killed; 1117f1ae32a1SGerd Hoffmann } 1118f1ae32a1SGerd Hoffmann 1119f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, 1120f1ae32a1SGerd Hoffmann unsigned int epid) 1121f1ae32a1SGerd Hoffmann { 1122f1ae32a1SGerd Hoffmann XHCISlot *slot; 1123f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1124f1ae32a1SGerd Hoffmann 1125c1f6b493SGerd Hoffmann trace_usb_xhci_ep_disable(slotid, epid); 1126f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1127f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1128f1ae32a1SGerd Hoffmann 1129f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1130f1ae32a1SGerd Hoffmann 1131f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1132f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d already disabled\n", slotid, epid); 1133f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1134f1ae32a1SGerd Hoffmann } 1135f1ae32a1SGerd Hoffmann 1136f1ae32a1SGerd Hoffmann xhci_ep_nuke_xfers(xhci, slotid, epid); 1137f1ae32a1SGerd Hoffmann 1138f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1139f1ae32a1SGerd Hoffmann 1140f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_DISABLED); 1141f1ae32a1SGerd Hoffmann 11423d139684SGerd Hoffmann qemu_free_timer(epctx->kick_timer); 1143f1ae32a1SGerd Hoffmann g_free(epctx); 1144f1ae32a1SGerd Hoffmann slot->eps[epid-1] = NULL; 1145f1ae32a1SGerd Hoffmann 1146f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1147f1ae32a1SGerd Hoffmann } 1148f1ae32a1SGerd Hoffmann 1149f1ae32a1SGerd Hoffmann static TRBCCode xhci_stop_ep(XHCIState *xhci, unsigned int slotid, 1150f1ae32a1SGerd Hoffmann unsigned int epid) 1151f1ae32a1SGerd Hoffmann { 1152f1ae32a1SGerd Hoffmann XHCISlot *slot; 1153f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1154f1ae32a1SGerd Hoffmann 1155c1f6b493SGerd Hoffmann trace_usb_xhci_ep_stop(slotid, epid); 1156f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1157f1ae32a1SGerd Hoffmann 1158f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1159f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1160f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1161f1ae32a1SGerd Hoffmann } 1162f1ae32a1SGerd Hoffmann 1163f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1164f1ae32a1SGerd Hoffmann 1165f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1166f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1167f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1168f1ae32a1SGerd Hoffmann } 1169f1ae32a1SGerd Hoffmann 1170f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1171f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint stopped w/ xfers running, " 1172f1ae32a1SGerd Hoffmann "data might be lost\n"); 1173f1ae32a1SGerd Hoffmann } 1174f1ae32a1SGerd Hoffmann 1175f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1176f1ae32a1SGerd Hoffmann 1177f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1178f1ae32a1SGerd Hoffmann 1179f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1180f1ae32a1SGerd Hoffmann } 1181f1ae32a1SGerd Hoffmann 1182f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid, 1183f1ae32a1SGerd Hoffmann unsigned int epid) 1184f1ae32a1SGerd Hoffmann { 1185f1ae32a1SGerd Hoffmann XHCISlot *slot; 1186f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1187f1ae32a1SGerd Hoffmann USBDevice *dev; 1188f1ae32a1SGerd Hoffmann 1189c1f6b493SGerd Hoffmann trace_usb_xhci_ep_reset(slotid, epid); 1190f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1191f1ae32a1SGerd Hoffmann 1192f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1193f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1194f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1195f1ae32a1SGerd Hoffmann } 1196f1ae32a1SGerd Hoffmann 1197f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1198f1ae32a1SGerd Hoffmann 1199f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1200f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1201f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1202f1ae32a1SGerd Hoffmann } 1203f1ae32a1SGerd Hoffmann 1204f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1205f1ae32a1SGerd Hoffmann 1206f1ae32a1SGerd Hoffmann if (epctx->state != EP_HALTED) { 1207f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset EP while EP %d not halted (%d)\n", 1208f1ae32a1SGerd Hoffmann epid, epctx->state); 1209f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1210f1ae32a1SGerd Hoffmann } 1211f1ae32a1SGerd Hoffmann 1212f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1213f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint reset w/ xfers running, " 1214f1ae32a1SGerd Hoffmann "data might be lost\n"); 1215f1ae32a1SGerd Hoffmann } 1216f1ae32a1SGerd Hoffmann 1217f1ae32a1SGerd Hoffmann uint8_t ep = epid>>1; 1218f1ae32a1SGerd Hoffmann 1219f1ae32a1SGerd Hoffmann if (epid & 1) { 1220f1ae32a1SGerd Hoffmann ep |= 0x80; 1221f1ae32a1SGerd Hoffmann } 1222f1ae32a1SGerd Hoffmann 12230846e635SGerd Hoffmann dev = xhci->ports[xhci->slots[slotid-1].port-1].uport->dev; 1224f1ae32a1SGerd Hoffmann if (!dev) { 1225f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1226f1ae32a1SGerd Hoffmann } 1227f1ae32a1SGerd Hoffmann 1228f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1229f1ae32a1SGerd Hoffmann 1230f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1231f1ae32a1SGerd Hoffmann } 1232f1ae32a1SGerd Hoffmann 1233f1ae32a1SGerd Hoffmann static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid, 1234f1ae32a1SGerd Hoffmann unsigned int epid, uint64_t pdequeue) 1235f1ae32a1SGerd Hoffmann { 1236f1ae32a1SGerd Hoffmann XHCISlot *slot; 1237f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 123859a70ccdSDavid Gibson dma_addr_t dequeue; 1239f1ae32a1SGerd Hoffmann 1240f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1241f1ae32a1SGerd Hoffmann 1242f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1243f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1244f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1245f1ae32a1SGerd Hoffmann } 1246f1ae32a1SGerd Hoffmann 1247d829fde9SGerd Hoffmann trace_usb_xhci_ep_set_dequeue(slotid, epid, pdequeue); 1248f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(pdequeue); 1249f1ae32a1SGerd Hoffmann 1250f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1251f1ae32a1SGerd Hoffmann 1252f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1253f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1254f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1255f1ae32a1SGerd Hoffmann } 1256f1ae32a1SGerd Hoffmann 1257f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1258f1ae32a1SGerd Hoffmann 1259f1ae32a1SGerd Hoffmann 1260f1ae32a1SGerd Hoffmann if (epctx->state != EP_STOPPED) { 1261f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: set EP dequeue pointer while EP %d not stopped\n", epid); 1262f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1263f1ae32a1SGerd Hoffmann } 1264f1ae32a1SGerd Hoffmann 1265f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue & ~0xF); 1266f1ae32a1SGerd Hoffmann epctx->ring.ccs = dequeue & 1; 1267f1ae32a1SGerd Hoffmann 1268f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1269f1ae32a1SGerd Hoffmann 1270f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1271f1ae32a1SGerd Hoffmann } 1272f1ae32a1SGerd Hoffmann 1273d5a15814SGerd Hoffmann static int xhci_xfer_map(XHCITransfer *xfer) 1274f1ae32a1SGerd Hoffmann { 1275d5a15814SGerd Hoffmann int in_xfer = (xfer->packet.pid == USB_TOKEN_IN); 1276f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1277d5a15814SGerd Hoffmann int i; 1278f1ae32a1SGerd Hoffmann 1279d5a15814SGerd Hoffmann pci_dma_sglist_init(&xfer->sgl, &xhci->pci_dev, xfer->trb_count); 1280f1ae32a1SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1281f1ae32a1SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 128259a70ccdSDavid Gibson dma_addr_t addr; 1283f1ae32a1SGerd Hoffmann unsigned int chunk = 0; 1284f1ae32a1SGerd Hoffmann 1285f1ae32a1SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1286f1ae32a1SGerd Hoffmann case TR_DATA: 1287f1ae32a1SGerd Hoffmann if ((!(trb->control & TRB_TR_DIR)) != (!in_xfer)) { 1288f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: data direction mismatch for TR_DATA\n"); 1289d5a15814SGerd Hoffmann goto err; 1290f1ae32a1SGerd Hoffmann } 1291f1ae32a1SGerd Hoffmann /* fallthrough */ 1292f1ae32a1SGerd Hoffmann case TR_NORMAL: 1293f1ae32a1SGerd Hoffmann case TR_ISOCH: 1294f1ae32a1SGerd Hoffmann addr = xhci_mask64(trb->parameter); 1295f1ae32a1SGerd Hoffmann chunk = trb->status & 0x1ffff; 1296f1ae32a1SGerd Hoffmann if (trb->control & TRB_TR_IDT) { 1297f1ae32a1SGerd Hoffmann if (chunk > 8 || in_xfer) { 1298f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid immediate data TRB\n"); 1299d5a15814SGerd Hoffmann goto err; 1300d5a15814SGerd Hoffmann } 1301d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, trb->addr, chunk); 1302d5a15814SGerd Hoffmann } else { 1303d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, addr, chunk); 1304d5a15814SGerd Hoffmann } 1305d5a15814SGerd Hoffmann break; 1306d5a15814SGerd Hoffmann } 1307d5a15814SGerd Hoffmann } 1308d5a15814SGerd Hoffmann 1309d5a15814SGerd Hoffmann usb_packet_map(&xfer->packet, &xfer->sgl); 1310d5a15814SGerd Hoffmann return 0; 1311d5a15814SGerd Hoffmann 1312d5a15814SGerd Hoffmann err: 1313d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1314f1ae32a1SGerd Hoffmann xhci_die(xhci); 1315d5a15814SGerd Hoffmann return -1; 1316f1ae32a1SGerd Hoffmann } 1317d5a15814SGerd Hoffmann 1318d5a15814SGerd Hoffmann static void xhci_xfer_unmap(XHCITransfer *xfer) 1319d5a15814SGerd Hoffmann { 1320d5a15814SGerd Hoffmann usb_packet_unmap(&xfer->packet, &xfer->sgl); 1321d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1322f1ae32a1SGerd Hoffmann } 1323d5a15814SGerd Hoffmann 1324d5a15814SGerd Hoffmann static void xhci_xfer_report(XHCITransfer *xfer) 1325d5a15814SGerd Hoffmann { 1326d5a15814SGerd Hoffmann uint32_t edtla = 0; 1327d5a15814SGerd Hoffmann unsigned int left; 1328d5a15814SGerd Hoffmann bool reported = 0; 1329d5a15814SGerd Hoffmann bool shortpkt = 0; 1330d5a15814SGerd Hoffmann XHCIEvent event = {ER_TRANSFER, CC_SUCCESS}; 1331d5a15814SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1332f1ae32a1SGerd Hoffmann int i; 1333d5a15814SGerd Hoffmann 1334d5a15814SGerd Hoffmann left = xfer->packet.result < 0 ? 0 : xfer->packet.result; 1335d5a15814SGerd Hoffmann 1336d5a15814SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1337d5a15814SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 1338d5a15814SGerd Hoffmann unsigned int chunk = 0; 1339d5a15814SGerd Hoffmann 1340d5a15814SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1341d5a15814SGerd Hoffmann case TR_DATA: 1342d5a15814SGerd Hoffmann case TR_NORMAL: 1343d5a15814SGerd Hoffmann case TR_ISOCH: 1344d5a15814SGerd Hoffmann chunk = trb->status & 0x1ffff; 1345d5a15814SGerd Hoffmann if (chunk > left) { 1346d5a15814SGerd Hoffmann chunk = left; 1347d5a15814SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1348d5a15814SGerd Hoffmann shortpkt = 1; 1349f1ae32a1SGerd Hoffmann } 1350f1ae32a1SGerd Hoffmann } 1351f1ae32a1SGerd Hoffmann left -= chunk; 1352f1ae32a1SGerd Hoffmann edtla += chunk; 1353f1ae32a1SGerd Hoffmann break; 1354f1ae32a1SGerd Hoffmann case TR_STATUS: 1355f1ae32a1SGerd Hoffmann reported = 0; 1356f1ae32a1SGerd Hoffmann shortpkt = 0; 1357f1ae32a1SGerd Hoffmann break; 1358f1ae32a1SGerd Hoffmann } 1359f1ae32a1SGerd Hoffmann 1360d5a15814SGerd Hoffmann if (!reported && ((trb->control & TRB_TR_IOC) || 1361d5a15814SGerd Hoffmann (shortpkt && (trb->control & TRB_TR_ISP)) || 1362d5a15814SGerd Hoffmann (xfer->status != CC_SUCCESS))) { 1363f1ae32a1SGerd Hoffmann event.slotid = xfer->slotid; 1364f1ae32a1SGerd Hoffmann event.epid = xfer->epid; 1365f1ae32a1SGerd Hoffmann event.length = (trb->status & 0x1ffff) - chunk; 1366f1ae32a1SGerd Hoffmann event.flags = 0; 1367f1ae32a1SGerd Hoffmann event.ptr = trb->addr; 1368f1ae32a1SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1369f1ae32a1SGerd Hoffmann event.ccode = shortpkt ? CC_SHORT_PACKET : CC_SUCCESS; 1370f1ae32a1SGerd Hoffmann } else { 1371f1ae32a1SGerd Hoffmann event.ccode = xfer->status; 1372f1ae32a1SGerd Hoffmann } 1373f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb) == TR_EVDATA) { 1374f1ae32a1SGerd Hoffmann event.ptr = trb->parameter; 1375f1ae32a1SGerd Hoffmann event.flags |= TRB_EV_ED; 1376f1ae32a1SGerd Hoffmann event.length = edtla & 0xffffff; 1377f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data: EDTLA=%d\n", event.length); 1378f1ae32a1SGerd Hoffmann edtla = 0; 1379f1ae32a1SGerd Hoffmann } 1380*962d11e1SGerd Hoffmann xhci_event(xhci, &event, 0 /* FIXME */); 1381f1ae32a1SGerd Hoffmann reported = 1; 1382d5a15814SGerd Hoffmann if (xfer->status != CC_SUCCESS) { 1383d5a15814SGerd Hoffmann return; 1384f1ae32a1SGerd Hoffmann } 1385f1ae32a1SGerd Hoffmann } 1386d5a15814SGerd Hoffmann } 1387f1ae32a1SGerd Hoffmann } 1388f1ae32a1SGerd Hoffmann 1389f1ae32a1SGerd Hoffmann static void xhci_stall_ep(XHCITransfer *xfer) 1390f1ae32a1SGerd Hoffmann { 1391f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1392f1ae32a1SGerd Hoffmann XHCISlot *slot = &xhci->slots[xfer->slotid-1]; 1393f1ae32a1SGerd Hoffmann XHCIEPContext *epctx = slot->eps[xfer->epid-1]; 1394f1ae32a1SGerd Hoffmann 1395f1ae32a1SGerd Hoffmann epctx->ring.dequeue = xfer->trbs[0].addr; 1396f1ae32a1SGerd Hoffmann epctx->ring.ccs = xfer->trbs[0].ccs; 1397f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_HALTED); 1398f1ae32a1SGerd Hoffmann DPRINTF("xhci: stalled slot %d ep %d\n", xfer->slotid, xfer->epid); 139959a70ccdSDavid Gibson DPRINTF("xhci: will continue at "DMA_ADDR_FMT"\n", epctx->ring.dequeue); 1400f1ae32a1SGerd Hoffmann } 1401f1ae32a1SGerd Hoffmann 1402f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, 1403f1ae32a1SGerd Hoffmann XHCIEPContext *epctx); 1404f1ae32a1SGerd Hoffmann 14055c08106fSGerd Hoffmann static USBDevice *xhci_find_device(XHCIPort *port, uint8_t addr) 1406f1ae32a1SGerd Hoffmann { 14075c08106fSGerd Hoffmann if (!(port->portsc & PORTSC_PED)) { 14085c08106fSGerd Hoffmann return NULL; 14095c08106fSGerd Hoffmann } 14100846e635SGerd Hoffmann return usb_find_device(port->uport, addr); 14115c08106fSGerd Hoffmann } 14125c08106fSGerd Hoffmann 14135c08106fSGerd Hoffmann static int xhci_setup_packet(XHCITransfer *xfer) 14145c08106fSGerd Hoffmann { 14155c08106fSGerd Hoffmann XHCIState *xhci = xfer->xhci; 14165c08106fSGerd Hoffmann XHCIPort *port; 14175c08106fSGerd Hoffmann USBDevice *dev; 1418f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1419f1ae32a1SGerd Hoffmann int dir; 1420f1ae32a1SGerd Hoffmann 1421f1ae32a1SGerd Hoffmann dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT; 14225c08106fSGerd Hoffmann 14235c08106fSGerd Hoffmann if (xfer->packet.ep) { 14245c08106fSGerd Hoffmann ep = xfer->packet.ep; 14255c08106fSGerd Hoffmann dev = ep->dev; 14265c08106fSGerd Hoffmann } else { 14275c08106fSGerd Hoffmann port = &xhci->ports[xhci->slots[xfer->slotid-1].port-1]; 14285c08106fSGerd Hoffmann dev = xhci_find_device(port, xhci->slots[xfer->slotid-1].devaddr); 14295c08106fSGerd Hoffmann if (!dev) { 14305c08106fSGerd Hoffmann fprintf(stderr, "xhci: slot %d port %d has no device\n", 14315c08106fSGerd Hoffmann xfer->slotid, xhci->slots[xfer->slotid-1].port); 14325c08106fSGerd Hoffmann return -1; 14335c08106fSGerd Hoffmann } 1434f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, dir, xfer->epid >> 1); 14355c08106fSGerd Hoffmann } 14365c08106fSGerd Hoffmann 1437e983395dSGerd Hoffmann usb_packet_setup(&xfer->packet, dir, ep, xfer->trbs[0].addr); 1438d5a15814SGerd Hoffmann xhci_xfer_map(xfer); 1439f1ae32a1SGerd Hoffmann DPRINTF("xhci: setup packet pid 0x%x addr %d ep %d\n", 1440f1ae32a1SGerd Hoffmann xfer->packet.pid, dev->addr, ep->nr); 1441f1ae32a1SGerd Hoffmann return 0; 1442f1ae32a1SGerd Hoffmann } 1443f1ae32a1SGerd Hoffmann 1444f1ae32a1SGerd Hoffmann static int xhci_complete_packet(XHCITransfer *xfer, int ret) 1445f1ae32a1SGerd Hoffmann { 1446f1ae32a1SGerd Hoffmann if (ret == USB_RET_ASYNC) { 144797df650bSGerd Hoffmann trace_usb_xhci_xfer_async(xfer); 1448f1ae32a1SGerd Hoffmann xfer->running_async = 1; 1449f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1450f1ae32a1SGerd Hoffmann xfer->complete = 0; 1451f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1452f1ae32a1SGerd Hoffmann return 0; 1453f1ae32a1SGerd Hoffmann } else if (ret == USB_RET_NAK) { 145497df650bSGerd Hoffmann trace_usb_xhci_xfer_nak(xfer); 1455f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1456f1ae32a1SGerd Hoffmann xfer->running_retry = 1; 1457f1ae32a1SGerd Hoffmann xfer->complete = 0; 1458f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1459f1ae32a1SGerd Hoffmann return 0; 1460f1ae32a1SGerd Hoffmann } else { 1461f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1462f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1463f1ae32a1SGerd Hoffmann xfer->complete = 1; 1464d5a15814SGerd Hoffmann xhci_xfer_unmap(xfer); 1465f1ae32a1SGerd Hoffmann } 1466f1ae32a1SGerd Hoffmann 1467f1ae32a1SGerd Hoffmann if (ret >= 0) { 146897df650bSGerd Hoffmann trace_usb_xhci_xfer_success(xfer, ret); 1469d5a15814SGerd Hoffmann xfer->status = CC_SUCCESS; 1470d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1471f1ae32a1SGerd Hoffmann return 0; 1472f1ae32a1SGerd Hoffmann } 1473f1ae32a1SGerd Hoffmann 1474f1ae32a1SGerd Hoffmann /* error */ 147597df650bSGerd Hoffmann trace_usb_xhci_xfer_error(xfer, ret); 1476f1ae32a1SGerd Hoffmann switch (ret) { 1477f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1478f1ae32a1SGerd Hoffmann xfer->status = CC_USB_TRANSACTION_ERROR; 1479d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1480f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1481f1ae32a1SGerd Hoffmann break; 1482f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1483f1ae32a1SGerd Hoffmann xfer->status = CC_STALL_ERROR; 1484d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1485f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1486f1ae32a1SGerd Hoffmann break; 1487f1ae32a1SGerd Hoffmann default: 1488f1ae32a1SGerd Hoffmann fprintf(stderr, "%s: FIXME: ret = %d\n", __FUNCTION__, ret); 1489f1ae32a1SGerd Hoffmann FIXME(); 1490f1ae32a1SGerd Hoffmann } 1491f1ae32a1SGerd Hoffmann return 0; 1492f1ae32a1SGerd Hoffmann } 1493f1ae32a1SGerd Hoffmann 1494f1ae32a1SGerd Hoffmann static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer) 1495f1ae32a1SGerd Hoffmann { 1496f1ae32a1SGerd Hoffmann XHCITRB *trb_setup, *trb_status; 1497f1ae32a1SGerd Hoffmann uint8_t bmRequestType; 1498f1ae32a1SGerd Hoffmann int ret; 1499f1ae32a1SGerd Hoffmann 1500f1ae32a1SGerd Hoffmann trb_setup = &xfer->trbs[0]; 1501f1ae32a1SGerd Hoffmann trb_status = &xfer->trbs[xfer->trb_count-1]; 1502f1ae32a1SGerd Hoffmann 1503d5a15814SGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid); 150497df650bSGerd Hoffmann 1505f1ae32a1SGerd Hoffmann /* at most one Event Data TRB allowed after STATUS */ 1506f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) == TR_EVDATA && xfer->trb_count > 2) { 1507f1ae32a1SGerd Hoffmann trb_status--; 1508f1ae32a1SGerd Hoffmann } 1509f1ae32a1SGerd Hoffmann 1510f1ae32a1SGerd Hoffmann /* do some sanity checks */ 1511f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_setup) != TR_SETUP) { 1512f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 first TD not SETUP: %d\n", 1513f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_setup)); 1514f1ae32a1SGerd Hoffmann return -1; 1515f1ae32a1SGerd Hoffmann } 1516f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) != TR_STATUS) { 1517f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 last TD not STATUS: %d\n", 1518f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_status)); 1519f1ae32a1SGerd Hoffmann return -1; 1520f1ae32a1SGerd Hoffmann } 1521f1ae32a1SGerd Hoffmann if (!(trb_setup->control & TRB_TR_IDT)) { 1522f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB doesn't have IDT set\n"); 1523f1ae32a1SGerd Hoffmann return -1; 1524f1ae32a1SGerd Hoffmann } 1525f1ae32a1SGerd Hoffmann if ((trb_setup->status & 0x1ffff) != 8) { 1526f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB has bad length (%d)\n", 1527f1ae32a1SGerd Hoffmann (trb_setup->status & 0x1ffff)); 1528f1ae32a1SGerd Hoffmann return -1; 1529f1ae32a1SGerd Hoffmann } 1530f1ae32a1SGerd Hoffmann 1531f1ae32a1SGerd Hoffmann bmRequestType = trb_setup->parameter; 1532f1ae32a1SGerd Hoffmann 1533f1ae32a1SGerd Hoffmann xfer->in_xfer = bmRequestType & USB_DIR_IN; 1534f1ae32a1SGerd Hoffmann xfer->iso_xfer = false; 1535f1ae32a1SGerd Hoffmann 15365c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 15375c08106fSGerd Hoffmann return -1; 15385c08106fSGerd Hoffmann } 1539f1ae32a1SGerd Hoffmann xfer->packet.parameter = trb_setup->parameter; 1540f1ae32a1SGerd Hoffmann 15415c08106fSGerd Hoffmann ret = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1542f1ae32a1SGerd Hoffmann 1543f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1544f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1545f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1546f1ae32a1SGerd Hoffmann } 1547f1ae32a1SGerd Hoffmann return 0; 1548f1ae32a1SGerd Hoffmann } 1549f1ae32a1SGerd Hoffmann 15503d139684SGerd Hoffmann static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 15513d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 15523d139684SGerd Hoffmann { 15533d139684SGerd Hoffmann if (xfer->trbs[0].control & TRB_TR_SIA) { 15543d139684SGerd Hoffmann uint64_t asap = ((mfindex + epctx->interval - 1) & 15553d139684SGerd Hoffmann ~(epctx->interval-1)); 15563d139684SGerd Hoffmann if (asap >= epctx->mfindex_last && 15573d139684SGerd Hoffmann asap <= epctx->mfindex_last + epctx->interval * 4) { 15583d139684SGerd Hoffmann xfer->mfindex_kick = epctx->mfindex_last + epctx->interval; 15593d139684SGerd Hoffmann } else { 15603d139684SGerd Hoffmann xfer->mfindex_kick = asap; 15613d139684SGerd Hoffmann } 15623d139684SGerd Hoffmann } else { 15633d139684SGerd Hoffmann xfer->mfindex_kick = (xfer->trbs[0].control >> TRB_TR_FRAMEID_SHIFT) 15643d139684SGerd Hoffmann & TRB_TR_FRAMEID_MASK; 15653d139684SGerd Hoffmann xfer->mfindex_kick |= mfindex & ~0x3fff; 15663d139684SGerd Hoffmann if (xfer->mfindex_kick < mfindex) { 15673d139684SGerd Hoffmann xfer->mfindex_kick += 0x4000; 15683d139684SGerd Hoffmann } 15693d139684SGerd Hoffmann } 15703d139684SGerd Hoffmann } 15713d139684SGerd Hoffmann 15723d139684SGerd Hoffmann static void xhci_check_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 15733d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 15743d139684SGerd Hoffmann { 15753d139684SGerd Hoffmann if (xfer->mfindex_kick > mfindex) { 15763d139684SGerd Hoffmann qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock) + 15773d139684SGerd Hoffmann (xfer->mfindex_kick - mfindex) * 125000); 15783d139684SGerd Hoffmann xfer->running_retry = 1; 15793d139684SGerd Hoffmann } else { 15803d139684SGerd Hoffmann epctx->mfindex_last = xfer->mfindex_kick; 15813d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 15823d139684SGerd Hoffmann xfer->running_retry = 0; 15833d139684SGerd Hoffmann } 15843d139684SGerd Hoffmann } 15853d139684SGerd Hoffmann 15863d139684SGerd Hoffmann 1587f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1588f1ae32a1SGerd Hoffmann { 15893d139684SGerd Hoffmann uint64_t mfindex; 1590f1ae32a1SGerd Hoffmann int ret; 1591f1ae32a1SGerd Hoffmann 1592f1ae32a1SGerd Hoffmann DPRINTF("xhci_submit(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); 1593f1ae32a1SGerd Hoffmann 1594f1ae32a1SGerd Hoffmann xfer->in_xfer = epctx->type>>2; 1595f1ae32a1SGerd Hoffmann 1596f1ae32a1SGerd Hoffmann switch(epctx->type) { 1597f1ae32a1SGerd Hoffmann case ET_INTR_OUT: 1598f1ae32a1SGerd Hoffmann case ET_INTR_IN: 1599f1ae32a1SGerd Hoffmann case ET_BULK_OUT: 1600f1ae32a1SGerd Hoffmann case ET_BULK_IN: 16013d139684SGerd Hoffmann xfer->pkts = 0; 16023d139684SGerd Hoffmann xfer->iso_xfer = false; 1603f1ae32a1SGerd Hoffmann break; 1604f1ae32a1SGerd Hoffmann case ET_ISO_OUT: 1605f1ae32a1SGerd Hoffmann case ET_ISO_IN: 16063d139684SGerd Hoffmann xfer->pkts = 1; 16073d139684SGerd Hoffmann xfer->iso_xfer = true; 16083d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 16093d139684SGerd Hoffmann xhci_calc_iso_kick(xhci, xfer, epctx, mfindex); 16103d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 16113d139684SGerd Hoffmann if (xfer->running_retry) { 16123d139684SGerd Hoffmann return -1; 16133d139684SGerd Hoffmann } 1614f1ae32a1SGerd Hoffmann break; 1615f1ae32a1SGerd Hoffmann default: 1616f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unknown or unhandled EP " 1617f1ae32a1SGerd Hoffmann "(type %d, in %d, ep %02x)\n", 1618f1ae32a1SGerd Hoffmann epctx->type, xfer->in_xfer, xfer->epid); 1619f1ae32a1SGerd Hoffmann return -1; 1620f1ae32a1SGerd Hoffmann } 1621f1ae32a1SGerd Hoffmann 16225c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 16235c08106fSGerd Hoffmann return -1; 16245c08106fSGerd Hoffmann } 16255c08106fSGerd Hoffmann ret = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1626f1ae32a1SGerd Hoffmann 1627f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1628f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1629f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1630f1ae32a1SGerd Hoffmann } 1631f1ae32a1SGerd Hoffmann return 0; 1632f1ae32a1SGerd Hoffmann } 1633f1ae32a1SGerd Hoffmann 1634f1ae32a1SGerd Hoffmann static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1635f1ae32a1SGerd Hoffmann { 1636d5a15814SGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid); 1637f1ae32a1SGerd Hoffmann return xhci_submit(xhci, xfer, epctx); 1638f1ae32a1SGerd Hoffmann } 1639f1ae32a1SGerd Hoffmann 1640f1ae32a1SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, unsigned int epid) 1641f1ae32a1SGerd Hoffmann { 1642f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 16433d139684SGerd Hoffmann uint64_t mfindex; 1644f1ae32a1SGerd Hoffmann int length; 1645f1ae32a1SGerd Hoffmann int i; 1646f1ae32a1SGerd Hoffmann 1647c1f6b493SGerd Hoffmann trace_usb_xhci_ep_kick(slotid, epid); 1648f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1649f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1650f1ae32a1SGerd Hoffmann 1651f1ae32a1SGerd Hoffmann if (!xhci->slots[slotid-1].enabled) { 1652f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled slot %d\n", slotid); 1653f1ae32a1SGerd Hoffmann return; 1654f1ae32a1SGerd Hoffmann } 1655f1ae32a1SGerd Hoffmann epctx = xhci->slots[slotid-1].eps[epid-1]; 1656f1ae32a1SGerd Hoffmann if (!epctx) { 1657f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled endpoint %d,%d\n", 1658f1ae32a1SGerd Hoffmann epid, slotid); 1659f1ae32a1SGerd Hoffmann return; 1660f1ae32a1SGerd Hoffmann } 1661f1ae32a1SGerd Hoffmann 1662f1ae32a1SGerd Hoffmann if (epctx->retry) { 1663f1ae32a1SGerd Hoffmann XHCITransfer *xfer = epctx->retry; 1664f1ae32a1SGerd Hoffmann int result; 1665f1ae32a1SGerd Hoffmann 166697df650bSGerd Hoffmann trace_usb_xhci_xfer_retry(xfer); 1667f1ae32a1SGerd Hoffmann assert(xfer->running_retry); 16683d139684SGerd Hoffmann if (xfer->iso_xfer) { 16693d139684SGerd Hoffmann /* retry delayed iso transfer */ 16703d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 16713d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 16723d139684SGerd Hoffmann if (xfer->running_retry) { 16733d139684SGerd Hoffmann return; 16743d139684SGerd Hoffmann } 16753d139684SGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 16763d139684SGerd Hoffmann return; 16773d139684SGerd Hoffmann } 16783d139684SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 16793d139684SGerd Hoffmann assert(result != USB_RET_NAK); 16803d139684SGerd Hoffmann xhci_complete_packet(xfer, result); 16813d139684SGerd Hoffmann } else { 16823d139684SGerd Hoffmann /* retry nak'ed transfer */ 16835c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 16845c08106fSGerd Hoffmann return; 16855c08106fSGerd Hoffmann } 1686f1ae32a1SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1687f1ae32a1SGerd Hoffmann if (result == USB_RET_NAK) { 1688f1ae32a1SGerd Hoffmann return; 1689f1ae32a1SGerd Hoffmann } 1690f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, result); 16913d139684SGerd Hoffmann } 1692f1ae32a1SGerd Hoffmann assert(!xfer->running_retry); 1693f1ae32a1SGerd Hoffmann epctx->retry = NULL; 1694f1ae32a1SGerd Hoffmann } 1695f1ae32a1SGerd Hoffmann 1696f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1697f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep halted, not running schedule\n"); 1698f1ae32a1SGerd Hoffmann return; 1699f1ae32a1SGerd Hoffmann } 1700f1ae32a1SGerd Hoffmann 1701f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_RUNNING); 1702f1ae32a1SGerd Hoffmann 1703f1ae32a1SGerd Hoffmann while (1) { 1704f1ae32a1SGerd Hoffmann XHCITransfer *xfer = &epctx->transfers[epctx->next_xfer]; 1705331e9406SGerd Hoffmann if (xfer->running_async || xfer->running_retry) { 1706f1ae32a1SGerd Hoffmann break; 1707f1ae32a1SGerd Hoffmann } 1708f1ae32a1SGerd Hoffmann length = xhci_ring_chain_length(xhci, &epctx->ring); 1709f1ae32a1SGerd Hoffmann if (length < 0) { 1710f1ae32a1SGerd Hoffmann break; 1711f1ae32a1SGerd Hoffmann } else if (length == 0) { 1712f1ae32a1SGerd Hoffmann break; 1713f1ae32a1SGerd Hoffmann } 1714f1ae32a1SGerd Hoffmann if (xfer->trbs && xfer->trb_alloced < length) { 1715f1ae32a1SGerd Hoffmann xfer->trb_count = 0; 1716f1ae32a1SGerd Hoffmann xfer->trb_alloced = 0; 1717f1ae32a1SGerd Hoffmann g_free(xfer->trbs); 1718f1ae32a1SGerd Hoffmann xfer->trbs = NULL; 1719f1ae32a1SGerd Hoffmann } 1720f1ae32a1SGerd Hoffmann if (!xfer->trbs) { 1721f1ae32a1SGerd Hoffmann xfer->trbs = g_malloc(sizeof(XHCITRB) * length); 1722f1ae32a1SGerd Hoffmann xfer->trb_alloced = length; 1723f1ae32a1SGerd Hoffmann } 1724f1ae32a1SGerd Hoffmann xfer->trb_count = length; 1725f1ae32a1SGerd Hoffmann 1726f1ae32a1SGerd Hoffmann for (i = 0; i < length; i++) { 1727f1ae32a1SGerd Hoffmann assert(xhci_ring_fetch(xhci, &epctx->ring, &xfer->trbs[i], NULL)); 1728f1ae32a1SGerd Hoffmann } 1729f1ae32a1SGerd Hoffmann xfer->xhci = xhci; 1730f1ae32a1SGerd Hoffmann xfer->epid = epid; 1731f1ae32a1SGerd Hoffmann xfer->slotid = slotid; 1732f1ae32a1SGerd Hoffmann 1733f1ae32a1SGerd Hoffmann if (epid == 1) { 1734f1ae32a1SGerd Hoffmann if (xhci_fire_ctl_transfer(xhci, xfer) >= 0) { 1735f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1736f1ae32a1SGerd Hoffmann } else { 1737f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing CTL transfer\n"); 1738f1ae32a1SGerd Hoffmann } 1739f1ae32a1SGerd Hoffmann } else { 1740f1ae32a1SGerd Hoffmann if (xhci_fire_transfer(xhci, xfer, epctx) >= 0) { 1741f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1742f1ae32a1SGerd Hoffmann } else { 17433d139684SGerd Hoffmann if (!xfer->iso_xfer) { 1744f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing data transfer\n"); 1745f1ae32a1SGerd Hoffmann } 1746f1ae32a1SGerd Hoffmann } 17473d139684SGerd Hoffmann } 1748f1ae32a1SGerd Hoffmann 1749f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1750f1ae32a1SGerd Hoffmann break; 1751f1ae32a1SGerd Hoffmann } 1752f1ae32a1SGerd Hoffmann if (xfer->running_retry) { 1753f1ae32a1SGerd Hoffmann DPRINTF("xhci: xfer nacked, stopping schedule\n"); 1754f1ae32a1SGerd Hoffmann epctx->retry = xfer; 1755f1ae32a1SGerd Hoffmann break; 1756f1ae32a1SGerd Hoffmann } 1757f1ae32a1SGerd Hoffmann } 1758f1ae32a1SGerd Hoffmann } 1759f1ae32a1SGerd Hoffmann 1760f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid) 1761f1ae32a1SGerd Hoffmann { 1762348f1037SGerd Hoffmann trace_usb_xhci_slot_enable(slotid); 1763f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1764f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 1; 1765f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].port = 0; 1766f1ae32a1SGerd Hoffmann memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31); 1767f1ae32a1SGerd Hoffmann 1768f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1769f1ae32a1SGerd Hoffmann } 1770f1ae32a1SGerd Hoffmann 1771f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid) 1772f1ae32a1SGerd Hoffmann { 1773f1ae32a1SGerd Hoffmann int i; 1774f1ae32a1SGerd Hoffmann 1775348f1037SGerd Hoffmann trace_usb_xhci_slot_disable(slotid); 1776f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1777f1ae32a1SGerd Hoffmann 1778f1ae32a1SGerd Hoffmann for (i = 1; i <= 31; i++) { 1779f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1780f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1781f1ae32a1SGerd Hoffmann } 1782f1ae32a1SGerd Hoffmann } 1783f1ae32a1SGerd Hoffmann 1784f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 0; 1785f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1786f1ae32a1SGerd Hoffmann } 1787f1ae32a1SGerd Hoffmann 1788f1ae32a1SGerd Hoffmann static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, 1789f1ae32a1SGerd Hoffmann uint64_t pictx, bool bsr) 1790f1ae32a1SGerd Hoffmann { 1791f1ae32a1SGerd Hoffmann XHCISlot *slot; 1792f1ae32a1SGerd Hoffmann USBDevice *dev; 179359a70ccdSDavid Gibson dma_addr_t ictx, octx, dcbaap; 1794f1ae32a1SGerd Hoffmann uint64_t poctx; 1795f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1796f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1797f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1798f1ae32a1SGerd Hoffmann unsigned int port; 1799f1ae32a1SGerd Hoffmann int i; 1800f1ae32a1SGerd Hoffmann TRBCCode res; 1801f1ae32a1SGerd Hoffmann 1802348f1037SGerd Hoffmann trace_usb_xhci_slot_address(slotid); 1803f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1804f1ae32a1SGerd Hoffmann 1805f1ae32a1SGerd Hoffmann dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); 180659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dcbaap + 8*slotid, &poctx, sizeof(poctx)); 1807f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1808f1ae32a1SGerd Hoffmann octx = xhci_mask64(le64_to_cpu(poctx)); 1809f1ae32a1SGerd Hoffmann 181059a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 181159a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1812f1ae32a1SGerd Hoffmann 181359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1814f1ae32a1SGerd Hoffmann 1815f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] != 0x3) { 1816f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1817f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1818f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1819f1ae32a1SGerd Hoffmann } 1820f1ae32a1SGerd Hoffmann 182159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, slot_ctx, sizeof(slot_ctx)); 182259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, ep0_ctx, sizeof(ep0_ctx)); 1823f1ae32a1SGerd Hoffmann 1824f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1825f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1826f1ae32a1SGerd Hoffmann 1827f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 1828f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1829f1ae32a1SGerd Hoffmann 1830f1ae32a1SGerd Hoffmann port = (slot_ctx[1]>>16) & 0xFF; 18310846e635SGerd Hoffmann dev = xhci->ports[port-1].uport->dev; 1832f1ae32a1SGerd Hoffmann 18330846e635SGerd Hoffmann if (port < 1 || port > xhci->numports) { 1834f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad port %d\n", port); 1835f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1836f1ae32a1SGerd Hoffmann } else if (!dev) { 1837f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d not connected\n", port); 1838f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1839f1ae32a1SGerd Hoffmann } 1840f1ae32a1SGerd Hoffmann 1841f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 1842f1ae32a1SGerd Hoffmann if (xhci->slots[i].port == port) { 1843f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d already assigned to slot %d\n", 1844f1ae32a1SGerd Hoffmann port, i+1); 1845f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1846f1ae32a1SGerd Hoffmann } 1847f1ae32a1SGerd Hoffmann } 1848f1ae32a1SGerd Hoffmann 1849f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1850f1ae32a1SGerd Hoffmann slot->port = port; 1851f1ae32a1SGerd Hoffmann slot->ctx = octx; 1852f1ae32a1SGerd Hoffmann 1853f1ae32a1SGerd Hoffmann if (bsr) { 1854f1ae32a1SGerd Hoffmann slot_ctx[3] = SLOT_DEFAULT << SLOT_STATE_SHIFT; 1855f1ae32a1SGerd Hoffmann } else { 1856f1ae32a1SGerd Hoffmann slot->devaddr = xhci->devaddr++; 1857f1ae32a1SGerd Hoffmann slot_ctx[3] = (SLOT_ADDRESSED << SLOT_STATE_SHIFT) | slot->devaddr; 1858f1ae32a1SGerd Hoffmann DPRINTF("xhci: device address is %d\n", slot->devaddr); 1859f1ae32a1SGerd Hoffmann usb_device_handle_control(dev, NULL, 1860f1ae32a1SGerd Hoffmann DeviceOutRequest | USB_REQ_SET_ADDRESS, 1861f1ae32a1SGerd Hoffmann slot->devaddr, 0, 0, NULL); 1862f1ae32a1SGerd Hoffmann } 1863f1ae32a1SGerd Hoffmann 1864f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, 1, octx+32, ep0_ctx); 1865f1ae32a1SGerd Hoffmann 1866f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1867f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1868f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 1869f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1870f1ae32a1SGerd Hoffmann 187159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 187259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1873f1ae32a1SGerd Hoffmann 1874f1ae32a1SGerd Hoffmann return res; 1875f1ae32a1SGerd Hoffmann } 1876f1ae32a1SGerd Hoffmann 1877f1ae32a1SGerd Hoffmann 1878f1ae32a1SGerd Hoffmann static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid, 1879f1ae32a1SGerd Hoffmann uint64_t pictx, bool dc) 1880f1ae32a1SGerd Hoffmann { 188159a70ccdSDavid Gibson dma_addr_t ictx, octx; 1882f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1883f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1884f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1885f1ae32a1SGerd Hoffmann uint32_t ep_ctx[5]; 1886f1ae32a1SGerd Hoffmann int i; 1887f1ae32a1SGerd Hoffmann TRBCCode res; 1888f1ae32a1SGerd Hoffmann 1889348f1037SGerd Hoffmann trace_usb_xhci_slot_configure(slotid); 1890f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1891f1ae32a1SGerd Hoffmann 1892f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1893f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1894f1ae32a1SGerd Hoffmann 189559a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 189659a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1897f1ae32a1SGerd Hoffmann 1898f1ae32a1SGerd Hoffmann if (dc) { 1899f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1900f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1901f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1902f1ae32a1SGerd Hoffmann } 1903f1ae32a1SGerd Hoffmann } 1904f1ae32a1SGerd Hoffmann 190559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1906f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1907f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_ADDRESSED << SLOT_STATE_SHIFT; 1908f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1909f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 191059a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1911f1ae32a1SGerd Hoffmann 1912f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1913f1ae32a1SGerd Hoffmann } 1914f1ae32a1SGerd Hoffmann 191559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1916f1ae32a1SGerd Hoffmann 1917f1ae32a1SGerd Hoffmann if ((ictl_ctx[0] & 0x3) != 0x0 || (ictl_ctx[1] & 0x3) != 0x1) { 1918f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1919f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1920f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1921f1ae32a1SGerd Hoffmann } 1922f1ae32a1SGerd Hoffmann 192359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 192459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1925f1ae32a1SGerd Hoffmann 1926f1ae32a1SGerd Hoffmann if (SLOT_STATE(slot_ctx[3]) < SLOT_ADDRESSED) { 1927f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid slot state %08x\n", slot_ctx[3]); 1928f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1929f1ae32a1SGerd Hoffmann } 1930f1ae32a1SGerd Hoffmann 1931f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1932f1ae32a1SGerd Hoffmann if (ictl_ctx[0] & (1<<i)) { 1933f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1934f1ae32a1SGerd Hoffmann } 1935f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & (1<<i)) { 193659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32+(32*i), ep_ctx, 193759a70ccdSDavid Gibson sizeof(ep_ctx)); 1938f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep%d.%d context: %08x %08x %08x %08x %08x\n", 1939f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1940f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 1941f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1942f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, i, octx+(32*i), ep_ctx); 1943f1ae32a1SGerd Hoffmann if (res != CC_SUCCESS) { 1944f1ae32a1SGerd Hoffmann return res; 1945f1ae32a1SGerd Hoffmann } 1946f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep%d.%d context: %08x %08x %08x %08x %08x\n", 1947f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1948f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 194959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+(32*i), ep_ctx, sizeof(ep_ctx)); 1950f1ae32a1SGerd Hoffmann } 1951f1ae32a1SGerd Hoffmann } 1952f1ae32a1SGerd Hoffmann 1953f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1954f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_CONFIGURED << SLOT_STATE_SHIFT; 1955f1ae32a1SGerd Hoffmann slot_ctx[0] &= ~(SLOT_CONTEXT_ENTRIES_MASK << SLOT_CONTEXT_ENTRIES_SHIFT); 1956f1ae32a1SGerd Hoffmann slot_ctx[0] |= islot_ctx[0] & (SLOT_CONTEXT_ENTRIES_MASK << 1957f1ae32a1SGerd Hoffmann SLOT_CONTEXT_ENTRIES_SHIFT); 1958f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1959f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1960f1ae32a1SGerd Hoffmann 196159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1962f1ae32a1SGerd Hoffmann 1963f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1964f1ae32a1SGerd Hoffmann } 1965f1ae32a1SGerd Hoffmann 1966f1ae32a1SGerd Hoffmann 1967f1ae32a1SGerd Hoffmann static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid, 1968f1ae32a1SGerd Hoffmann uint64_t pictx) 1969f1ae32a1SGerd Hoffmann { 197059a70ccdSDavid Gibson dma_addr_t ictx, octx; 1971f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1972f1ae32a1SGerd Hoffmann uint32_t iep0_ctx[5]; 1973f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1974f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1975f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1976f1ae32a1SGerd Hoffmann 1977348f1037SGerd Hoffmann trace_usb_xhci_slot_evaluate(slotid); 1978f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1979f1ae32a1SGerd Hoffmann 1980f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1981f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1982f1ae32a1SGerd Hoffmann 198359a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 198459a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1985f1ae32a1SGerd Hoffmann 198659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1987f1ae32a1SGerd Hoffmann 1988f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] & ~0x3) { 1989f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1990f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1991f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1992f1ae32a1SGerd Hoffmann } 1993f1ae32a1SGerd Hoffmann 1994f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x1) { 199559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 1996f1ae32a1SGerd Hoffmann 1997f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1998f1ae32a1SGerd Hoffmann islot_ctx[0], islot_ctx[1], islot_ctx[2], islot_ctx[3]); 1999f1ae32a1SGerd Hoffmann 200059a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2001f1ae32a1SGerd Hoffmann 2002f1ae32a1SGerd Hoffmann slot_ctx[1] &= ~0xFFFF; /* max exit latency */ 2003f1ae32a1SGerd Hoffmann slot_ctx[1] |= islot_ctx[1] & 0xFFFF; 2004f1ae32a1SGerd Hoffmann slot_ctx[2] &= ~0xFF00000; /* interrupter target */ 2005f1ae32a1SGerd Hoffmann slot_ctx[2] |= islot_ctx[2] & 0xFF000000; 2006f1ae32a1SGerd Hoffmann 2007f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2008f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2009f1ae32a1SGerd Hoffmann 201059a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2011f1ae32a1SGerd Hoffmann } 2012f1ae32a1SGerd Hoffmann 2013f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x2) { 201459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, iep0_ctx, sizeof(iep0_ctx)); 2015f1ae32a1SGerd Hoffmann 2016f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 2017f1ae32a1SGerd Hoffmann iep0_ctx[0], iep0_ctx[1], iep0_ctx[2], 2018f1ae32a1SGerd Hoffmann iep0_ctx[3], iep0_ctx[4]); 2019f1ae32a1SGerd Hoffmann 202059a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2021f1ae32a1SGerd Hoffmann 2022f1ae32a1SGerd Hoffmann ep0_ctx[1] &= ~0xFFFF0000; /* max packet size*/ 2023f1ae32a1SGerd Hoffmann ep0_ctx[1] |= iep0_ctx[1] & 0xFFFF0000; 2024f1ae32a1SGerd Hoffmann 2025f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 2026f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 2027f1ae32a1SGerd Hoffmann 202859a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2029f1ae32a1SGerd Hoffmann } 2030f1ae32a1SGerd Hoffmann 2031f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2032f1ae32a1SGerd Hoffmann } 2033f1ae32a1SGerd Hoffmann 2034f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid) 2035f1ae32a1SGerd Hoffmann { 2036f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 203759a70ccdSDavid Gibson dma_addr_t octx; 2038f1ae32a1SGerd Hoffmann int i; 2039f1ae32a1SGerd Hoffmann 2040348f1037SGerd Hoffmann trace_usb_xhci_slot_reset(slotid); 2041f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 2042f1ae32a1SGerd Hoffmann 2043f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 2044f1ae32a1SGerd Hoffmann 204559a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 2046f1ae32a1SGerd Hoffmann 2047f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 2048f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 2049f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2050f1ae32a1SGerd Hoffmann } 2051f1ae32a1SGerd Hoffmann } 2052f1ae32a1SGerd Hoffmann 205359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2054f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 2055f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_DEFAULT << SLOT_STATE_SHIFT; 2056f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2057f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 205859a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2059f1ae32a1SGerd Hoffmann 2060f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2061f1ae32a1SGerd Hoffmann } 2062f1ae32a1SGerd Hoffmann 2063f1ae32a1SGerd Hoffmann static unsigned int xhci_get_slot(XHCIState *xhci, XHCIEvent *event, XHCITRB *trb) 2064f1ae32a1SGerd Hoffmann { 2065f1ae32a1SGerd Hoffmann unsigned int slotid; 2066f1ae32a1SGerd Hoffmann slotid = (trb->control >> TRB_CR_SLOTID_SHIFT) & TRB_CR_SLOTID_MASK; 2067f1ae32a1SGerd Hoffmann if (slotid < 1 || slotid > MAXSLOTS) { 2068f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad slot id %d\n", slotid); 2069f1ae32a1SGerd Hoffmann event->ccode = CC_TRB_ERROR; 2070f1ae32a1SGerd Hoffmann return 0; 2071f1ae32a1SGerd Hoffmann } else if (!xhci->slots[slotid-1].enabled) { 2072f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot id %d not enabled\n", slotid); 2073f1ae32a1SGerd Hoffmann event->ccode = CC_SLOT_NOT_ENABLED_ERROR; 2074f1ae32a1SGerd Hoffmann return 0; 2075f1ae32a1SGerd Hoffmann } 2076f1ae32a1SGerd Hoffmann return slotid; 2077f1ae32a1SGerd Hoffmann } 2078f1ae32a1SGerd Hoffmann 2079f1ae32a1SGerd Hoffmann static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) 2080f1ae32a1SGerd Hoffmann { 208159a70ccdSDavid Gibson dma_addr_t ctx; 20820846e635SGerd Hoffmann uint8_t bw_ctx[xhci->numports+1]; 2083f1ae32a1SGerd Hoffmann 2084f1ae32a1SGerd Hoffmann DPRINTF("xhci_get_port_bandwidth()\n"); 2085f1ae32a1SGerd Hoffmann 2086f1ae32a1SGerd Hoffmann ctx = xhci_mask64(pctx); 2087f1ae32a1SGerd Hoffmann 208859a70ccdSDavid Gibson DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx); 2089f1ae32a1SGerd Hoffmann 2090f1ae32a1SGerd Hoffmann /* TODO: actually implement real values here */ 2091f1ae32a1SGerd Hoffmann bw_ctx[0] = 0; 20920846e635SGerd Hoffmann memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ 209359a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, ctx, bw_ctx, sizeof(bw_ctx)); 2094f1ae32a1SGerd Hoffmann 2095f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2096f1ae32a1SGerd Hoffmann } 2097f1ae32a1SGerd Hoffmann 2098f1ae32a1SGerd Hoffmann static uint32_t rotl(uint32_t v, unsigned count) 2099f1ae32a1SGerd Hoffmann { 2100f1ae32a1SGerd Hoffmann count &= 31; 2101f1ae32a1SGerd Hoffmann return (v << count) | (v >> (32 - count)); 2102f1ae32a1SGerd Hoffmann } 2103f1ae32a1SGerd Hoffmann 2104f1ae32a1SGerd Hoffmann 2105f1ae32a1SGerd Hoffmann static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo) 2106f1ae32a1SGerd Hoffmann { 2107f1ae32a1SGerd Hoffmann uint32_t val; 2108f1ae32a1SGerd Hoffmann val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F)); 2109f1ae32a1SGerd Hoffmann val += rotl(lo + 0x49434878, hi & 0x1F); 2110f1ae32a1SGerd Hoffmann val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F); 2111f1ae32a1SGerd Hoffmann return ~val; 2112f1ae32a1SGerd Hoffmann } 2113f1ae32a1SGerd Hoffmann 211459a70ccdSDavid Gibson static void xhci_via_challenge(XHCIState *xhci, uint64_t addr) 2115f1ae32a1SGerd Hoffmann { 2116f1ae32a1SGerd Hoffmann uint32_t buf[8]; 2117f1ae32a1SGerd Hoffmann uint32_t obuf[8]; 211859a70ccdSDavid Gibson dma_addr_t paddr = xhci_mask64(addr); 2119f1ae32a1SGerd Hoffmann 212059a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, paddr, &buf, 32); 2121f1ae32a1SGerd Hoffmann 2122f1ae32a1SGerd Hoffmann memcpy(obuf, buf, sizeof(obuf)); 2123f1ae32a1SGerd Hoffmann 2124f1ae32a1SGerd Hoffmann if ((buf[0] & 0xff) == 2) { 2125f1ae32a1SGerd Hoffmann obuf[0] = 0x49932000 + 0x54dc200 * buf[2] + 0x7429b578 * buf[3]; 2126f1ae32a1SGerd Hoffmann obuf[0] |= (buf[2] * buf[3]) & 0xff; 2127f1ae32a1SGerd Hoffmann obuf[1] = 0x0132bb37 + 0xe89 * buf[2] + 0xf09 * buf[3]; 2128f1ae32a1SGerd Hoffmann obuf[2] = 0x0066c2e9 + 0x2091 * buf[2] + 0x19bd * buf[3]; 2129f1ae32a1SGerd Hoffmann obuf[3] = 0xd5281342 + 0x2cc9691 * buf[2] + 0x2367662 * buf[3]; 2130f1ae32a1SGerd Hoffmann obuf[4] = 0x0123c75c + 0x1595 * buf[2] + 0x19ec * buf[3]; 2131f1ae32a1SGerd Hoffmann obuf[5] = 0x00f695de + 0x26fd * buf[2] + 0x3e9 * buf[3]; 2132f1ae32a1SGerd Hoffmann obuf[6] = obuf[2] ^ obuf[3] ^ 0x29472956; 2133f1ae32a1SGerd Hoffmann obuf[7] = obuf[2] ^ obuf[3] ^ 0x65866593; 2134f1ae32a1SGerd Hoffmann } 2135f1ae32a1SGerd Hoffmann 213659a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, paddr, &obuf, 32); 2137f1ae32a1SGerd Hoffmann } 2138f1ae32a1SGerd Hoffmann 2139f1ae32a1SGerd Hoffmann static void xhci_process_commands(XHCIState *xhci) 2140f1ae32a1SGerd Hoffmann { 2141f1ae32a1SGerd Hoffmann XHCITRB trb; 2142f1ae32a1SGerd Hoffmann TRBType type; 2143f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_SUCCESS}; 214459a70ccdSDavid Gibson dma_addr_t addr; 2145f1ae32a1SGerd Hoffmann unsigned int i, slotid = 0; 2146f1ae32a1SGerd Hoffmann 2147f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands()\n"); 2148f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2149f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands() called while xHC stopped or paused\n"); 2150f1ae32a1SGerd Hoffmann return; 2151f1ae32a1SGerd Hoffmann } 2152f1ae32a1SGerd Hoffmann 2153f1ae32a1SGerd Hoffmann xhci->crcr_low |= CRCR_CRR; 2154f1ae32a1SGerd Hoffmann 2155f1ae32a1SGerd Hoffmann while ((type = xhci_ring_fetch(xhci, &xhci->cmd_ring, &trb, &addr))) { 2156f1ae32a1SGerd Hoffmann event.ptr = addr; 2157f1ae32a1SGerd Hoffmann switch (type) { 2158f1ae32a1SGerd Hoffmann case CR_ENABLE_SLOT: 2159f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2160f1ae32a1SGerd Hoffmann if (!xhci->slots[i].enabled) { 2161f1ae32a1SGerd Hoffmann break; 2162f1ae32a1SGerd Hoffmann } 2163f1ae32a1SGerd Hoffmann } 2164f1ae32a1SGerd Hoffmann if (i >= MAXSLOTS) { 2165f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: no device slots available\n"); 2166f1ae32a1SGerd Hoffmann event.ccode = CC_NO_SLOTS_ERROR; 2167f1ae32a1SGerd Hoffmann } else { 2168f1ae32a1SGerd Hoffmann slotid = i+1; 2169f1ae32a1SGerd Hoffmann event.ccode = xhci_enable_slot(xhci, slotid); 2170f1ae32a1SGerd Hoffmann } 2171f1ae32a1SGerd Hoffmann break; 2172f1ae32a1SGerd Hoffmann case CR_DISABLE_SLOT: 2173f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2174f1ae32a1SGerd Hoffmann if (slotid) { 2175f1ae32a1SGerd Hoffmann event.ccode = xhci_disable_slot(xhci, slotid); 2176f1ae32a1SGerd Hoffmann } 2177f1ae32a1SGerd Hoffmann break; 2178f1ae32a1SGerd Hoffmann case CR_ADDRESS_DEVICE: 2179f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2180f1ae32a1SGerd Hoffmann if (slotid) { 2181f1ae32a1SGerd Hoffmann event.ccode = xhci_address_slot(xhci, slotid, trb.parameter, 2182f1ae32a1SGerd Hoffmann trb.control & TRB_CR_BSR); 2183f1ae32a1SGerd Hoffmann } 2184f1ae32a1SGerd Hoffmann break; 2185f1ae32a1SGerd Hoffmann case CR_CONFIGURE_ENDPOINT: 2186f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2187f1ae32a1SGerd Hoffmann if (slotid) { 2188f1ae32a1SGerd Hoffmann event.ccode = xhci_configure_slot(xhci, slotid, trb.parameter, 2189f1ae32a1SGerd Hoffmann trb.control & TRB_CR_DC); 2190f1ae32a1SGerd Hoffmann } 2191f1ae32a1SGerd Hoffmann break; 2192f1ae32a1SGerd Hoffmann case CR_EVALUATE_CONTEXT: 2193f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2194f1ae32a1SGerd Hoffmann if (slotid) { 2195f1ae32a1SGerd Hoffmann event.ccode = xhci_evaluate_slot(xhci, slotid, trb.parameter); 2196f1ae32a1SGerd Hoffmann } 2197f1ae32a1SGerd Hoffmann break; 2198f1ae32a1SGerd Hoffmann case CR_STOP_ENDPOINT: 2199f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2200f1ae32a1SGerd Hoffmann if (slotid) { 2201f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2202f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2203f1ae32a1SGerd Hoffmann event.ccode = xhci_stop_ep(xhci, slotid, epid); 2204f1ae32a1SGerd Hoffmann } 2205f1ae32a1SGerd Hoffmann break; 2206f1ae32a1SGerd Hoffmann case CR_RESET_ENDPOINT: 2207f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2208f1ae32a1SGerd Hoffmann if (slotid) { 2209f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2210f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2211f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_ep(xhci, slotid, epid); 2212f1ae32a1SGerd Hoffmann } 2213f1ae32a1SGerd Hoffmann break; 2214f1ae32a1SGerd Hoffmann case CR_SET_TR_DEQUEUE: 2215f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2216f1ae32a1SGerd Hoffmann if (slotid) { 2217f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2218f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2219f1ae32a1SGerd Hoffmann event.ccode = xhci_set_ep_dequeue(xhci, slotid, epid, 2220f1ae32a1SGerd Hoffmann trb.parameter); 2221f1ae32a1SGerd Hoffmann } 2222f1ae32a1SGerd Hoffmann break; 2223f1ae32a1SGerd Hoffmann case CR_RESET_DEVICE: 2224f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2225f1ae32a1SGerd Hoffmann if (slotid) { 2226f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_slot(xhci, slotid); 2227f1ae32a1SGerd Hoffmann } 2228f1ae32a1SGerd Hoffmann break; 2229f1ae32a1SGerd Hoffmann case CR_GET_PORT_BANDWIDTH: 2230f1ae32a1SGerd Hoffmann event.ccode = xhci_get_port_bandwidth(xhci, trb.parameter); 2231f1ae32a1SGerd Hoffmann break; 2232f1ae32a1SGerd Hoffmann case CR_VENDOR_VIA_CHALLENGE_RESPONSE: 223359a70ccdSDavid Gibson xhci_via_challenge(xhci, trb.parameter); 2234f1ae32a1SGerd Hoffmann break; 2235f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_FIRMWARE_REVISION: 2236f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2237f1ae32a1SGerd Hoffmann event.length = 0x3025; 2238f1ae32a1SGerd Hoffmann break; 2239f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_CHALLENGE_RESPONSE: 2240f1ae32a1SGerd Hoffmann { 2241f1ae32a1SGerd Hoffmann uint32_t chi = trb.parameter >> 32; 2242f1ae32a1SGerd Hoffmann uint32_t clo = trb.parameter; 2243f1ae32a1SGerd Hoffmann uint32_t val = xhci_nec_challenge(chi, clo); 2244f1ae32a1SGerd Hoffmann event.length = val & 0xFFFF; 2245f1ae32a1SGerd Hoffmann event.epid = val >> 16; 2246f1ae32a1SGerd Hoffmann slotid = val >> 24; 2247f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2248f1ae32a1SGerd Hoffmann } 2249f1ae32a1SGerd Hoffmann break; 2250f1ae32a1SGerd Hoffmann default: 2251f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unimplemented command %d\n", type); 2252f1ae32a1SGerd Hoffmann event.ccode = CC_TRB_ERROR; 2253f1ae32a1SGerd Hoffmann break; 2254f1ae32a1SGerd Hoffmann } 2255f1ae32a1SGerd Hoffmann event.slotid = slotid; 2256*962d11e1SGerd Hoffmann xhci_event(xhci, &event, 0 /* FIXME */); 2257f1ae32a1SGerd Hoffmann } 2258f1ae32a1SGerd Hoffmann } 2259f1ae32a1SGerd Hoffmann 2260f1ae32a1SGerd Hoffmann static void xhci_update_port(XHCIState *xhci, XHCIPort *port, int is_detach) 2261f1ae32a1SGerd Hoffmann { 2262f1ae32a1SGerd Hoffmann port->portsc = PORTSC_PP; 22630846e635SGerd Hoffmann if (port->uport->dev && port->uport->dev->attached && !is_detach && 22640846e635SGerd Hoffmann (1 << port->uport->dev->speed) & port->speedmask) { 2265f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CCS; 22660846e635SGerd Hoffmann switch (port->uport->dev->speed) { 2267f1ae32a1SGerd Hoffmann case USB_SPEED_LOW: 2268f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_LOW; 2269f1ae32a1SGerd Hoffmann break; 2270f1ae32a1SGerd Hoffmann case USB_SPEED_FULL: 2271f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_FULL; 2272f1ae32a1SGerd Hoffmann break; 2273f1ae32a1SGerd Hoffmann case USB_SPEED_HIGH: 2274f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_HIGH; 2275f1ae32a1SGerd Hoffmann break; 22760846e635SGerd Hoffmann case USB_SPEED_SUPER: 22770846e635SGerd Hoffmann port->portsc |= PORTSC_SPEED_SUPER; 22780846e635SGerd Hoffmann break; 2279f1ae32a1SGerd Hoffmann } 2280f1ae32a1SGerd Hoffmann } 2281f1ae32a1SGerd Hoffmann 2282f1ae32a1SGerd Hoffmann if (xhci_running(xhci)) { 2283f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CSC; 22840846e635SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, 22850846e635SGerd Hoffmann port->portnr << 24}; 2286*962d11e1SGerd Hoffmann xhci_event(xhci, &ev, 0 /* FIXME */); 22870846e635SGerd Hoffmann DPRINTF("xhci: port change event for port %d\n", port->portnr); 2288f1ae32a1SGerd Hoffmann } 2289f1ae32a1SGerd Hoffmann } 2290f1ae32a1SGerd Hoffmann 229164619739SJan Kiszka static void xhci_reset(DeviceState *dev) 2292f1ae32a1SGerd Hoffmann { 229364619739SJan Kiszka XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev.qdev, dev); 2294f1ae32a1SGerd Hoffmann int i; 2295f1ae32a1SGerd Hoffmann 22962d754a10SGerd Hoffmann trace_usb_xhci_reset(); 2297f1ae32a1SGerd Hoffmann if (!(xhci->usbsts & USBSTS_HCH)) { 2298f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset while running!\n"); 2299f1ae32a1SGerd Hoffmann } 2300f1ae32a1SGerd Hoffmann 2301f1ae32a1SGerd Hoffmann xhci->usbcmd = 0; 2302f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2303f1ae32a1SGerd Hoffmann xhci->dnctrl = 0; 2304f1ae32a1SGerd Hoffmann xhci->crcr_low = 0; 2305f1ae32a1SGerd Hoffmann xhci->crcr_high = 0; 2306f1ae32a1SGerd Hoffmann xhci->dcbaap_low = 0; 2307f1ae32a1SGerd Hoffmann xhci->dcbaap_high = 0; 2308f1ae32a1SGerd Hoffmann xhci->config = 0; 2309f1ae32a1SGerd Hoffmann xhci->devaddr = 2; 2310f1ae32a1SGerd Hoffmann 2311f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2312f1ae32a1SGerd Hoffmann xhci_disable_slot(xhci, i+1); 2313f1ae32a1SGerd Hoffmann } 2314f1ae32a1SGerd Hoffmann 23150846e635SGerd Hoffmann for (i = 0; i < xhci->numports; i++) { 2316f1ae32a1SGerd Hoffmann xhci_update_port(xhci, xhci->ports + i, 0); 2317f1ae32a1SGerd Hoffmann } 2318f1ae32a1SGerd Hoffmann 2319*962d11e1SGerd Hoffmann for (i = 0; i < MAXINTRS; i++) { 2320*962d11e1SGerd Hoffmann xhci->intr[i].iman = 0; 2321*962d11e1SGerd Hoffmann xhci->intr[i].imod = 0; 2322*962d11e1SGerd Hoffmann xhci->intr[i].erstsz = 0; 2323*962d11e1SGerd Hoffmann xhci->intr[i].erstba_low = 0; 2324*962d11e1SGerd Hoffmann xhci->intr[i].erstba_high = 0; 2325*962d11e1SGerd Hoffmann xhci->intr[i].erdp_low = 0; 2326*962d11e1SGerd Hoffmann xhci->intr[i].erdp_high = 0; 2327*962d11e1SGerd Hoffmann xhci->intr[i].msix_used = 0; 2328f1ae32a1SGerd Hoffmann 2329*962d11e1SGerd Hoffmann xhci->intr[i].er_ep_idx = 0; 2330*962d11e1SGerd Hoffmann xhci->intr[i].er_pcs = 1; 2331*962d11e1SGerd Hoffmann xhci->intr[i].er_full = 0; 2332*962d11e1SGerd Hoffmann xhci->intr[i].ev_buffer_put = 0; 2333*962d11e1SGerd Hoffmann xhci->intr[i].ev_buffer_get = 0; 2334*962d11e1SGerd Hoffmann } 233501546fa6SGerd Hoffmann 233601546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 233701546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2338f1ae32a1SGerd Hoffmann } 2339f1ae32a1SGerd Hoffmann 2340f1ae32a1SGerd Hoffmann static uint32_t xhci_cap_read(XHCIState *xhci, uint32_t reg) 2341f1ae32a1SGerd Hoffmann { 23422d754a10SGerd Hoffmann uint32_t ret; 2343f1ae32a1SGerd Hoffmann 2344f1ae32a1SGerd Hoffmann switch (reg) { 2345f1ae32a1SGerd Hoffmann case 0x00: /* HCIVERSION, CAPLENGTH */ 23462d754a10SGerd Hoffmann ret = 0x01000000 | LEN_CAP; 23472d754a10SGerd Hoffmann break; 2348f1ae32a1SGerd Hoffmann case 0x04: /* HCSPARAMS 1 */ 23490846e635SGerd Hoffmann ret = ((xhci->numports_2+xhci->numports_3)<<24) 23500846e635SGerd Hoffmann | (MAXINTRS<<8) | MAXSLOTS; 23512d754a10SGerd Hoffmann break; 2352f1ae32a1SGerd Hoffmann case 0x08: /* HCSPARAMS 2 */ 23532d754a10SGerd Hoffmann ret = 0x0000000f; 23542d754a10SGerd Hoffmann break; 2355f1ae32a1SGerd Hoffmann case 0x0c: /* HCSPARAMS 3 */ 23562d754a10SGerd Hoffmann ret = 0x00000000; 23572d754a10SGerd Hoffmann break; 2358f1ae32a1SGerd Hoffmann case 0x10: /* HCCPARAMS */ 23592d754a10SGerd Hoffmann if (sizeof(dma_addr_t) == 4) { 23602d754a10SGerd Hoffmann ret = 0x00081000; 23612d754a10SGerd Hoffmann } else { 23622d754a10SGerd Hoffmann ret = 0x00081001; 23632d754a10SGerd Hoffmann } 23642d754a10SGerd Hoffmann break; 2365f1ae32a1SGerd Hoffmann case 0x14: /* DBOFF */ 23662d754a10SGerd Hoffmann ret = OFF_DOORBELL; 23672d754a10SGerd Hoffmann break; 2368f1ae32a1SGerd Hoffmann case 0x18: /* RTSOFF */ 23692d754a10SGerd Hoffmann ret = OFF_RUNTIME; 23702d754a10SGerd Hoffmann break; 2371f1ae32a1SGerd Hoffmann 2372f1ae32a1SGerd Hoffmann /* extended capabilities */ 2373f1ae32a1SGerd Hoffmann case 0x20: /* Supported Protocol:00 */ 23742d754a10SGerd Hoffmann ret = 0x02000402; /* USB 2.0 */ 23752d754a10SGerd Hoffmann break; 2376f1ae32a1SGerd Hoffmann case 0x24: /* Supported Protocol:04 */ 23772d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 23782d754a10SGerd Hoffmann break; 2379f1ae32a1SGerd Hoffmann case 0x28: /* Supported Protocol:08 */ 23800846e635SGerd Hoffmann ret = 0x00000001 | (xhci->numports_2<<8); 23812d754a10SGerd Hoffmann break; 2382f1ae32a1SGerd Hoffmann case 0x2c: /* Supported Protocol:0c */ 23832d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 23842d754a10SGerd Hoffmann break; 2385f1ae32a1SGerd Hoffmann case 0x30: /* Supported Protocol:00 */ 23862d754a10SGerd Hoffmann ret = 0x03000002; /* USB 3.0 */ 23872d754a10SGerd Hoffmann break; 2388f1ae32a1SGerd Hoffmann case 0x34: /* Supported Protocol:04 */ 23892d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 23902d754a10SGerd Hoffmann break; 2391f1ae32a1SGerd Hoffmann case 0x38: /* Supported Protocol:08 */ 23920846e635SGerd Hoffmann ret = 0x00000000 | (xhci->numports_2+1) | (xhci->numports_3<<8); 23932d754a10SGerd Hoffmann break; 2394f1ae32a1SGerd Hoffmann case 0x3c: /* Supported Protocol:0c */ 23952d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 23962d754a10SGerd Hoffmann break; 2397f1ae32a1SGerd Hoffmann default: 2398f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_cap_read: reg %d unimplemented\n", reg); 23992d754a10SGerd Hoffmann ret = 0; 2400f1ae32a1SGerd Hoffmann } 24012d754a10SGerd Hoffmann 24022d754a10SGerd Hoffmann trace_usb_xhci_cap_read(reg, ret); 24032d754a10SGerd Hoffmann return ret; 2404f1ae32a1SGerd Hoffmann } 2405f1ae32a1SGerd Hoffmann 2406f1ae32a1SGerd Hoffmann static uint32_t xhci_port_read(XHCIState *xhci, uint32_t reg) 2407f1ae32a1SGerd Hoffmann { 2408f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 24092d754a10SGerd Hoffmann uint32_t ret; 24102d754a10SGerd Hoffmann 24110846e635SGerd Hoffmann if (port >= xhci->numports) { 2412f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 24132d754a10SGerd Hoffmann ret = 0; 24142d754a10SGerd Hoffmann goto out; 2415f1ae32a1SGerd Hoffmann } 2416f1ae32a1SGerd Hoffmann 2417f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2418f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 24192d754a10SGerd Hoffmann ret = xhci->ports[port].portsc; 24202d754a10SGerd Hoffmann break; 2421f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2422f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 24232d754a10SGerd Hoffmann ret = 0; 24242d754a10SGerd Hoffmann break; 2425f1ae32a1SGerd Hoffmann case 0x0c: /* reserved */ 2426f1ae32a1SGerd Hoffmann default: 2427f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read (port %d): reg 0x%x unimplemented\n", 2428f1ae32a1SGerd Hoffmann port, reg); 24292d754a10SGerd Hoffmann ret = 0; 2430f1ae32a1SGerd Hoffmann } 24312d754a10SGerd Hoffmann 24322d754a10SGerd Hoffmann out: 24332d754a10SGerd Hoffmann trace_usb_xhci_port_read(port, reg & 0x0f, ret); 24342d754a10SGerd Hoffmann return ret; 2435f1ae32a1SGerd Hoffmann } 2436f1ae32a1SGerd Hoffmann 2437f1ae32a1SGerd Hoffmann static void xhci_port_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2438f1ae32a1SGerd Hoffmann { 2439f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 2440f1ae32a1SGerd Hoffmann uint32_t portsc; 2441f1ae32a1SGerd Hoffmann 24422d754a10SGerd Hoffmann trace_usb_xhci_port_write(port, reg & 0x0f, val); 24432d754a10SGerd Hoffmann 24440846e635SGerd Hoffmann if (port >= xhci->numports) { 2445f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 2446f1ae32a1SGerd Hoffmann return; 2447f1ae32a1SGerd Hoffmann } 2448f1ae32a1SGerd Hoffmann 2449f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2450f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 2451f1ae32a1SGerd Hoffmann portsc = xhci->ports[port].portsc; 2452f1ae32a1SGerd Hoffmann /* write-1-to-clear bits*/ 2453f1ae32a1SGerd Hoffmann portsc &= ~(val & (PORTSC_CSC|PORTSC_PEC|PORTSC_WRC|PORTSC_OCC| 2454f1ae32a1SGerd Hoffmann PORTSC_PRC|PORTSC_PLC|PORTSC_CEC)); 2455f1ae32a1SGerd Hoffmann if (val & PORTSC_LWS) { 2456f1ae32a1SGerd Hoffmann /* overwrite PLS only when LWS=1 */ 2457f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2458f1ae32a1SGerd Hoffmann portsc |= val & (PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2459f1ae32a1SGerd Hoffmann } 2460f1ae32a1SGerd Hoffmann /* read/write bits */ 2461f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE); 2462f1ae32a1SGerd Hoffmann portsc |= (val & (PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE)); 2463f1ae32a1SGerd Hoffmann /* write-1-to-start bits */ 2464f1ae32a1SGerd Hoffmann if (val & PORTSC_PR) { 2465f1ae32a1SGerd Hoffmann DPRINTF("xhci: port %d reset\n", port); 24660846e635SGerd Hoffmann usb_device_reset(xhci->ports[port].uport->dev); 2467f1ae32a1SGerd Hoffmann portsc |= PORTSC_PRC | PORTSC_PED; 2468f1ae32a1SGerd Hoffmann } 2469f1ae32a1SGerd Hoffmann xhci->ports[port].portsc = portsc; 2470f1ae32a1SGerd Hoffmann break; 2471f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2472f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 2473f1ae32a1SGerd Hoffmann default: 2474f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_write (port %d): reg 0x%x unimplemented\n", 2475f1ae32a1SGerd Hoffmann port, reg); 2476f1ae32a1SGerd Hoffmann } 2477f1ae32a1SGerd Hoffmann } 2478f1ae32a1SGerd Hoffmann 2479f1ae32a1SGerd Hoffmann static uint32_t xhci_oper_read(XHCIState *xhci, uint32_t reg) 2480f1ae32a1SGerd Hoffmann { 24812d754a10SGerd Hoffmann uint32_t ret; 2482f1ae32a1SGerd Hoffmann 2483f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2484f1ae32a1SGerd Hoffmann return xhci_port_read(xhci, reg - 0x400); 2485f1ae32a1SGerd Hoffmann } 2486f1ae32a1SGerd Hoffmann 2487f1ae32a1SGerd Hoffmann switch (reg) { 2488f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 24892d754a10SGerd Hoffmann ret = xhci->usbcmd; 24902d754a10SGerd Hoffmann break; 2491f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 24922d754a10SGerd Hoffmann ret = xhci->usbsts; 24932d754a10SGerd Hoffmann break; 2494f1ae32a1SGerd Hoffmann case 0x08: /* PAGESIZE */ 24952d754a10SGerd Hoffmann ret = 1; /* 4KiB */ 24962d754a10SGerd Hoffmann break; 2497f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 24982d754a10SGerd Hoffmann ret = xhci->dnctrl; 24992d754a10SGerd Hoffmann break; 2500f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 25012d754a10SGerd Hoffmann ret = xhci->crcr_low & ~0xe; 25022d754a10SGerd Hoffmann break; 2503f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 25042d754a10SGerd Hoffmann ret = xhci->crcr_high; 25052d754a10SGerd Hoffmann break; 2506f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 25072d754a10SGerd Hoffmann ret = xhci->dcbaap_low; 25082d754a10SGerd Hoffmann break; 2509f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 25102d754a10SGerd Hoffmann ret = xhci->dcbaap_high; 25112d754a10SGerd Hoffmann break; 2512f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 25132d754a10SGerd Hoffmann ret = xhci->config; 25142d754a10SGerd Hoffmann break; 2515f1ae32a1SGerd Hoffmann default: 2516f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_read: reg 0x%x unimplemented\n", reg); 25172d754a10SGerd Hoffmann ret = 0; 2518f1ae32a1SGerd Hoffmann } 25192d754a10SGerd Hoffmann 25202d754a10SGerd Hoffmann trace_usb_xhci_oper_read(reg, ret); 25212d754a10SGerd Hoffmann return ret; 2522f1ae32a1SGerd Hoffmann } 2523f1ae32a1SGerd Hoffmann 2524f1ae32a1SGerd Hoffmann static void xhci_oper_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2525f1ae32a1SGerd Hoffmann { 2526f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2527f1ae32a1SGerd Hoffmann xhci_port_write(xhci, reg - 0x400, val); 2528f1ae32a1SGerd Hoffmann return; 2529f1ae32a1SGerd Hoffmann } 2530f1ae32a1SGerd Hoffmann 25312d754a10SGerd Hoffmann trace_usb_xhci_oper_write(reg, val); 25322d754a10SGerd Hoffmann 2533f1ae32a1SGerd Hoffmann switch (reg) { 2534f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 2535f1ae32a1SGerd Hoffmann if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS)) { 2536f1ae32a1SGerd Hoffmann xhci_run(xhci); 2537f1ae32a1SGerd Hoffmann } else if (!(val & USBCMD_RS) && (xhci->usbcmd & USBCMD_RS)) { 2538f1ae32a1SGerd Hoffmann xhci_stop(xhci); 2539f1ae32a1SGerd Hoffmann } 2540f1ae32a1SGerd Hoffmann xhci->usbcmd = val & 0xc0f; 254101546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2542f1ae32a1SGerd Hoffmann if (val & USBCMD_HCRST) { 254364619739SJan Kiszka xhci_reset(&xhci->pci_dev.qdev); 2544f1ae32a1SGerd Hoffmann } 25454c4abe7cSGerd Hoffmann xhci_intx_update(xhci); 2546f1ae32a1SGerd Hoffmann break; 2547f1ae32a1SGerd Hoffmann 2548f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 2549f1ae32a1SGerd Hoffmann /* these bits are write-1-to-clear */ 2550f1ae32a1SGerd Hoffmann xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); 25514c4abe7cSGerd Hoffmann xhci_intx_update(xhci); 2552f1ae32a1SGerd Hoffmann break; 2553f1ae32a1SGerd Hoffmann 2554f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 2555f1ae32a1SGerd Hoffmann xhci->dnctrl = val & 0xffff; 2556f1ae32a1SGerd Hoffmann break; 2557f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 2558f1ae32a1SGerd Hoffmann xhci->crcr_low = (val & 0xffffffcf) | (xhci->crcr_low & CRCR_CRR); 2559f1ae32a1SGerd Hoffmann break; 2560f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 2561f1ae32a1SGerd Hoffmann xhci->crcr_high = val; 2562f1ae32a1SGerd Hoffmann if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) { 2563f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_COMMAND_RING_STOPPED}; 2564f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 2565*962d11e1SGerd Hoffmann xhci_event(xhci, &event, 0 /* FIXME */); 2566f1ae32a1SGerd Hoffmann DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low); 2567f1ae32a1SGerd Hoffmann } else { 256859a70ccdSDavid Gibson dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val); 2569f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &xhci->cmd_ring, base); 2570f1ae32a1SGerd Hoffmann } 2571f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~(CRCR_CA | CRCR_CS); 2572f1ae32a1SGerd Hoffmann break; 2573f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 2574f1ae32a1SGerd Hoffmann xhci->dcbaap_low = val & 0xffffffc0; 2575f1ae32a1SGerd Hoffmann break; 2576f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 2577f1ae32a1SGerd Hoffmann xhci->dcbaap_high = val; 2578f1ae32a1SGerd Hoffmann break; 2579f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 2580f1ae32a1SGerd Hoffmann xhci->config = val & 0xff; 2581f1ae32a1SGerd Hoffmann break; 2582f1ae32a1SGerd Hoffmann default: 2583f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2584f1ae32a1SGerd Hoffmann } 2585f1ae32a1SGerd Hoffmann } 2586f1ae32a1SGerd Hoffmann 2587f1ae32a1SGerd Hoffmann static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg) 2588f1ae32a1SGerd Hoffmann { 2589*962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[0]; 25902d754a10SGerd Hoffmann uint32_t ret; 2591f1ae32a1SGerd Hoffmann 2592f1ae32a1SGerd Hoffmann switch (reg) { 2593f1ae32a1SGerd Hoffmann case 0x00: /* MFINDEX */ 259401546fa6SGerd Hoffmann ret = xhci_mfindex_get(xhci) & 0x3fff; 25952d754a10SGerd Hoffmann break; 2596f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 2597*962d11e1SGerd Hoffmann ret = intr->iman; 25982d754a10SGerd Hoffmann break; 2599f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 2600*962d11e1SGerd Hoffmann ret = intr->imod; 26012d754a10SGerd Hoffmann break; 2602f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 2603*962d11e1SGerd Hoffmann ret = intr->erstsz; 26042d754a10SGerd Hoffmann break; 2605f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 2606*962d11e1SGerd Hoffmann ret = intr->erstba_low; 26072d754a10SGerd Hoffmann break; 2608f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 2609*962d11e1SGerd Hoffmann ret = intr->erstba_high; 26102d754a10SGerd Hoffmann break; 2611f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 2612*962d11e1SGerd Hoffmann ret = intr->erdp_low; 26132d754a10SGerd Hoffmann break; 2614f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 2615*962d11e1SGerd Hoffmann ret = intr->erdp_high; 26162d754a10SGerd Hoffmann break; 2617f1ae32a1SGerd Hoffmann default: 2618f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_runtime_read: reg 0x%x unimplemented\n", reg); 26192d754a10SGerd Hoffmann ret = 0; 2620f1ae32a1SGerd Hoffmann } 26212d754a10SGerd Hoffmann 26222d754a10SGerd Hoffmann trace_usb_xhci_runtime_read(reg, ret); 26232d754a10SGerd Hoffmann return ret; 2624f1ae32a1SGerd Hoffmann } 2625f1ae32a1SGerd Hoffmann 2626f1ae32a1SGerd Hoffmann static void xhci_runtime_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2627f1ae32a1SGerd Hoffmann { 2628*962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[0]; 26298e9f18b6SGerd Hoffmann trace_usb_xhci_runtime_write(reg, val); 2630f1ae32a1SGerd Hoffmann 2631f1ae32a1SGerd Hoffmann switch (reg) { 2632f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 2633f1ae32a1SGerd Hoffmann if (val & IMAN_IP) { 2634*962d11e1SGerd Hoffmann intr->iman &= ~IMAN_IP; 2635f1ae32a1SGerd Hoffmann } 2636*962d11e1SGerd Hoffmann intr->iman &= ~IMAN_IE; 2637*962d11e1SGerd Hoffmann intr->iman |= val & IMAN_IE; 26384c4abe7cSGerd Hoffmann xhci_intx_update(xhci); 2639*962d11e1SGerd Hoffmann xhci_msix_update(xhci, 0); 2640f1ae32a1SGerd Hoffmann break; 2641f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 2642*962d11e1SGerd Hoffmann intr->imod = val; 2643f1ae32a1SGerd Hoffmann break; 2644f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 2645*962d11e1SGerd Hoffmann intr->erstsz = val & 0xffff; 2646f1ae32a1SGerd Hoffmann break; 2647f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 2648f1ae32a1SGerd Hoffmann /* XXX NEC driver bug: it doesn't align this to 64 bytes 2649*962d11e1SGerd Hoffmann intr->erstba_low = val & 0xffffffc0; */ 2650*962d11e1SGerd Hoffmann intr->erstba_low = val & 0xfffffff0; 2651f1ae32a1SGerd Hoffmann break; 2652f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 2653*962d11e1SGerd Hoffmann intr->erstba_high = val; 2654*962d11e1SGerd Hoffmann xhci_er_reset(xhci, 0); 2655f1ae32a1SGerd Hoffmann break; 2656f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 2657f1ae32a1SGerd Hoffmann if (val & ERDP_EHB) { 2658*962d11e1SGerd Hoffmann intr->erdp_low &= ~ERDP_EHB; 2659f1ae32a1SGerd Hoffmann } 2660*962d11e1SGerd Hoffmann intr->erdp_low = (val & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB); 2661f1ae32a1SGerd Hoffmann break; 2662f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 2663*962d11e1SGerd Hoffmann intr->erdp_high = val; 2664*962d11e1SGerd Hoffmann xhci_events_update(xhci, 0); 2665f1ae32a1SGerd Hoffmann break; 2666f1ae32a1SGerd Hoffmann default: 2667f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2668f1ae32a1SGerd Hoffmann } 2669f1ae32a1SGerd Hoffmann } 2670f1ae32a1SGerd Hoffmann 2671f1ae32a1SGerd Hoffmann static uint32_t xhci_doorbell_read(XHCIState *xhci, uint32_t reg) 2672f1ae32a1SGerd Hoffmann { 2673f1ae32a1SGerd Hoffmann /* doorbells always read as 0 */ 26742d754a10SGerd Hoffmann trace_usb_xhci_doorbell_read(reg, 0); 2675f1ae32a1SGerd Hoffmann return 0; 2676f1ae32a1SGerd Hoffmann } 2677f1ae32a1SGerd Hoffmann 2678f1ae32a1SGerd Hoffmann static void xhci_doorbell_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2679f1ae32a1SGerd Hoffmann { 26802d754a10SGerd Hoffmann trace_usb_xhci_doorbell_write(reg, val); 2681f1ae32a1SGerd Hoffmann 2682f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2683f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: wrote doorbell while xHC stopped or paused\n"); 2684f1ae32a1SGerd Hoffmann return; 2685f1ae32a1SGerd Hoffmann } 2686f1ae32a1SGerd Hoffmann 2687f1ae32a1SGerd Hoffmann reg >>= 2; 2688f1ae32a1SGerd Hoffmann 2689f1ae32a1SGerd Hoffmann if (reg == 0) { 2690f1ae32a1SGerd Hoffmann if (val == 0) { 2691f1ae32a1SGerd Hoffmann xhci_process_commands(xhci); 2692f1ae32a1SGerd Hoffmann } else { 2693f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell 0 write: 0x%x\n", val); 2694f1ae32a1SGerd Hoffmann } 2695f1ae32a1SGerd Hoffmann } else { 2696f1ae32a1SGerd Hoffmann if (reg > MAXSLOTS) { 2697f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d\n", reg); 2698f1ae32a1SGerd Hoffmann } else if (val > 31) { 2699f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d write: 0x%x\n", reg, val); 2700f1ae32a1SGerd Hoffmann } else { 2701f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, reg, val); 2702f1ae32a1SGerd Hoffmann } 2703f1ae32a1SGerd Hoffmann } 2704f1ae32a1SGerd Hoffmann } 2705f1ae32a1SGerd Hoffmann 2706f1ae32a1SGerd Hoffmann static uint64_t xhci_mem_read(void *ptr, target_phys_addr_t addr, 2707f1ae32a1SGerd Hoffmann unsigned size) 2708f1ae32a1SGerd Hoffmann { 2709f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2710f1ae32a1SGerd Hoffmann 2711f1ae32a1SGerd Hoffmann /* Only aligned reads are allowed on xHCI */ 2712f1ae32a1SGerd Hoffmann if (addr & 3) { 2713f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Mis-aligned read\n"); 2714f1ae32a1SGerd Hoffmann return 0; 2715f1ae32a1SGerd Hoffmann } 2716f1ae32a1SGerd Hoffmann 2717f1ae32a1SGerd Hoffmann if (addr < LEN_CAP) { 2718f1ae32a1SGerd Hoffmann return xhci_cap_read(xhci, addr); 2719f1ae32a1SGerd Hoffmann } else if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2720f1ae32a1SGerd Hoffmann return xhci_oper_read(xhci, addr - OFF_OPER); 2721f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2722f1ae32a1SGerd Hoffmann return xhci_runtime_read(xhci, addr - OFF_RUNTIME); 2723f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2724f1ae32a1SGerd Hoffmann return xhci_doorbell_read(xhci, addr - OFF_DOORBELL); 2725f1ae32a1SGerd Hoffmann } else { 2726f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Bad offset %x\n", (int)addr); 2727f1ae32a1SGerd Hoffmann return 0; 2728f1ae32a1SGerd Hoffmann } 2729f1ae32a1SGerd Hoffmann } 2730f1ae32a1SGerd Hoffmann 2731f1ae32a1SGerd Hoffmann static void xhci_mem_write(void *ptr, target_phys_addr_t addr, 2732f1ae32a1SGerd Hoffmann uint64_t val, unsigned size) 2733f1ae32a1SGerd Hoffmann { 2734f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2735f1ae32a1SGerd Hoffmann 2736f1ae32a1SGerd Hoffmann /* Only aligned writes are allowed on xHCI */ 2737f1ae32a1SGerd Hoffmann if (addr & 3) { 2738f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Mis-aligned write\n"); 2739f1ae32a1SGerd Hoffmann return; 2740f1ae32a1SGerd Hoffmann } 2741f1ae32a1SGerd Hoffmann 2742f1ae32a1SGerd Hoffmann if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2743f1ae32a1SGerd Hoffmann xhci_oper_write(xhci, addr - OFF_OPER, val); 2744f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2745f1ae32a1SGerd Hoffmann xhci_runtime_write(xhci, addr - OFF_RUNTIME, val); 2746f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2747f1ae32a1SGerd Hoffmann xhci_doorbell_write(xhci, addr - OFF_DOORBELL, val); 2748f1ae32a1SGerd Hoffmann } else { 2749f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Bad offset %x\n", (int)addr); 2750f1ae32a1SGerd Hoffmann } 2751f1ae32a1SGerd Hoffmann } 2752f1ae32a1SGerd Hoffmann 2753f1ae32a1SGerd Hoffmann static const MemoryRegionOps xhci_mem_ops = { 2754f1ae32a1SGerd Hoffmann .read = xhci_mem_read, 2755f1ae32a1SGerd Hoffmann .write = xhci_mem_write, 2756f1ae32a1SGerd Hoffmann .valid.min_access_size = 4, 2757f1ae32a1SGerd Hoffmann .valid.max_access_size = 4, 2758f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 2759f1ae32a1SGerd Hoffmann }; 2760f1ae32a1SGerd Hoffmann 2761f1ae32a1SGerd Hoffmann static void xhci_attach(USBPort *usbport) 2762f1ae32a1SGerd Hoffmann { 2763f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 27640846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 2765f1ae32a1SGerd Hoffmann 2766f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 0); 2767f1ae32a1SGerd Hoffmann } 2768f1ae32a1SGerd Hoffmann 2769f1ae32a1SGerd Hoffmann static void xhci_detach(USBPort *usbport) 2770f1ae32a1SGerd Hoffmann { 2771f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 27720846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 2773f1ae32a1SGerd Hoffmann 2774f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 1); 2775f1ae32a1SGerd Hoffmann } 2776f1ae32a1SGerd Hoffmann 2777f1ae32a1SGerd Hoffmann static void xhci_wakeup(USBPort *usbport) 2778f1ae32a1SGerd Hoffmann { 2779f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 27800846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 27810846e635SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, 27820846e635SGerd Hoffmann port->portnr << 24}; 2783f1ae32a1SGerd Hoffmann uint32_t pls; 2784f1ae32a1SGerd Hoffmann 2785f1ae32a1SGerd Hoffmann pls = (port->portsc >> PORTSC_PLS_SHIFT) & PORTSC_PLS_MASK; 2786f1ae32a1SGerd Hoffmann if (pls != 3) { 2787f1ae32a1SGerd Hoffmann return; 2788f1ae32a1SGerd Hoffmann } 2789f1ae32a1SGerd Hoffmann port->portsc |= 0xf << PORTSC_PLS_SHIFT; 2790f1ae32a1SGerd Hoffmann if (port->portsc & PORTSC_PLC) { 2791f1ae32a1SGerd Hoffmann return; 2792f1ae32a1SGerd Hoffmann } 2793f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_PLC; 2794*962d11e1SGerd Hoffmann xhci_event(xhci, &ev, 0 /* FIXME */); 2795f1ae32a1SGerd Hoffmann } 2796f1ae32a1SGerd Hoffmann 2797f1ae32a1SGerd Hoffmann static void xhci_complete(USBPort *port, USBPacket *packet) 2798f1ae32a1SGerd Hoffmann { 2799f1ae32a1SGerd Hoffmann XHCITransfer *xfer = container_of(packet, XHCITransfer, packet); 2800f1ae32a1SGerd Hoffmann 2801f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, packet->result); 2802f1ae32a1SGerd Hoffmann xhci_kick_ep(xfer->xhci, xfer->slotid, xfer->epid); 2803f1ae32a1SGerd Hoffmann } 2804f1ae32a1SGerd Hoffmann 2805f1ae32a1SGerd Hoffmann static void xhci_child_detach(USBPort *port, USBDevice *child) 2806f1ae32a1SGerd Hoffmann { 2807f1ae32a1SGerd Hoffmann FIXME(); 2808f1ae32a1SGerd Hoffmann } 2809f1ae32a1SGerd Hoffmann 2810f1ae32a1SGerd Hoffmann static USBPortOps xhci_port_ops = { 2811f1ae32a1SGerd Hoffmann .attach = xhci_attach, 2812f1ae32a1SGerd Hoffmann .detach = xhci_detach, 2813f1ae32a1SGerd Hoffmann .wakeup = xhci_wakeup, 2814f1ae32a1SGerd Hoffmann .complete = xhci_complete, 2815f1ae32a1SGerd Hoffmann .child_detach = xhci_child_detach, 2816f1ae32a1SGerd Hoffmann }; 2817f1ae32a1SGerd Hoffmann 2818f1ae32a1SGerd Hoffmann static int xhci_find_slotid(XHCIState *xhci, USBDevice *dev) 2819f1ae32a1SGerd Hoffmann { 2820f1ae32a1SGerd Hoffmann XHCISlot *slot; 2821f1ae32a1SGerd Hoffmann int slotid; 2822f1ae32a1SGerd Hoffmann 2823f1ae32a1SGerd Hoffmann for (slotid = 1; slotid <= MAXSLOTS; slotid++) { 2824f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 2825f1ae32a1SGerd Hoffmann if (slot->devaddr == dev->addr) { 2826f1ae32a1SGerd Hoffmann return slotid; 2827f1ae32a1SGerd Hoffmann } 2828f1ae32a1SGerd Hoffmann } 2829f1ae32a1SGerd Hoffmann return 0; 2830f1ae32a1SGerd Hoffmann } 2831f1ae32a1SGerd Hoffmann 2832f1ae32a1SGerd Hoffmann static int xhci_find_epid(USBEndpoint *ep) 2833f1ae32a1SGerd Hoffmann { 2834f1ae32a1SGerd Hoffmann if (ep->nr == 0) { 2835f1ae32a1SGerd Hoffmann return 1; 2836f1ae32a1SGerd Hoffmann } 2837f1ae32a1SGerd Hoffmann if (ep->pid == USB_TOKEN_IN) { 2838f1ae32a1SGerd Hoffmann return ep->nr * 2 + 1; 2839f1ae32a1SGerd Hoffmann } else { 2840f1ae32a1SGerd Hoffmann return ep->nr * 2; 2841f1ae32a1SGerd Hoffmann } 2842f1ae32a1SGerd Hoffmann } 2843f1ae32a1SGerd Hoffmann 2844f1ae32a1SGerd Hoffmann static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep) 2845f1ae32a1SGerd Hoffmann { 2846f1ae32a1SGerd Hoffmann XHCIState *xhci = container_of(bus, XHCIState, bus); 2847f1ae32a1SGerd Hoffmann int slotid; 2848f1ae32a1SGerd Hoffmann 2849f1ae32a1SGerd Hoffmann DPRINTF("%s\n", __func__); 2850f1ae32a1SGerd Hoffmann slotid = xhci_find_slotid(xhci, ep->dev); 2851f1ae32a1SGerd Hoffmann if (slotid == 0 || !xhci->slots[slotid-1].enabled) { 2852f1ae32a1SGerd Hoffmann DPRINTF("%s: oops, no slot for dev %d\n", __func__, ep->dev->addr); 2853f1ae32a1SGerd Hoffmann return; 2854f1ae32a1SGerd Hoffmann } 2855f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, slotid, xhci_find_epid(ep)); 2856f1ae32a1SGerd Hoffmann } 2857f1ae32a1SGerd Hoffmann 2858f1ae32a1SGerd Hoffmann static USBBusOps xhci_bus_ops = { 2859f1ae32a1SGerd Hoffmann .wakeup_endpoint = xhci_wakeup_endpoint, 2860f1ae32a1SGerd Hoffmann }; 2861f1ae32a1SGerd Hoffmann 2862f1ae32a1SGerd Hoffmann static void usb_xhci_init(XHCIState *xhci, DeviceState *dev) 2863f1ae32a1SGerd Hoffmann { 28640846e635SGerd Hoffmann XHCIPort *port; 28650846e635SGerd Hoffmann int i, usbports, speedmask; 2866f1ae32a1SGerd Hoffmann 2867f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2868f1ae32a1SGerd Hoffmann 28690846e635SGerd Hoffmann if (xhci->numports_2 > MAXPORTS_2) { 28700846e635SGerd Hoffmann xhci->numports_2 = MAXPORTS_2; 28710846e635SGerd Hoffmann } 28720846e635SGerd Hoffmann if (xhci->numports_3 > MAXPORTS_3) { 28730846e635SGerd Hoffmann xhci->numports_3 = MAXPORTS_3; 28740846e635SGerd Hoffmann } 28750846e635SGerd Hoffmann usbports = MAX(xhci->numports_2, xhci->numports_3); 28760846e635SGerd Hoffmann xhci->numports = xhci->numports_2 + xhci->numports_3; 28770846e635SGerd Hoffmann 2878f1ae32a1SGerd Hoffmann usb_bus_new(&xhci->bus, &xhci_bus_ops, &xhci->pci_dev.qdev); 2879f1ae32a1SGerd Hoffmann 28800846e635SGerd Hoffmann for (i = 0; i < usbports; i++) { 28810846e635SGerd Hoffmann speedmask = 0; 28820846e635SGerd Hoffmann if (i < xhci->numports_2) { 28830846e635SGerd Hoffmann port = &xhci->ports[i]; 28840846e635SGerd Hoffmann port->portnr = i + 1; 28850846e635SGerd Hoffmann port->uport = &xhci->uports[i]; 28860846e635SGerd Hoffmann port->speedmask = 2887f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | 2888f1ae32a1SGerd Hoffmann USB_SPEED_MASK_FULL | 28890846e635SGerd Hoffmann USB_SPEED_MASK_HIGH; 28900846e635SGerd Hoffmann speedmask |= port->speedmask; 2891f1ae32a1SGerd Hoffmann } 28920846e635SGerd Hoffmann if (i < xhci->numports_3) { 28930846e635SGerd Hoffmann port = &xhci->ports[i + xhci->numports_2]; 28940846e635SGerd Hoffmann port->portnr = i + 1 + xhci->numports_2; 28950846e635SGerd Hoffmann port->uport = &xhci->uports[i]; 28960846e635SGerd Hoffmann port->speedmask = USB_SPEED_MASK_SUPER; 28970846e635SGerd Hoffmann speedmask |= port->speedmask; 28980846e635SGerd Hoffmann } 28990846e635SGerd Hoffmann usb_register_port(&xhci->bus, &xhci->uports[i], xhci, i, 29000846e635SGerd Hoffmann &xhci_port_ops, speedmask); 2901f1ae32a1SGerd Hoffmann } 2902f1ae32a1SGerd Hoffmann } 2903f1ae32a1SGerd Hoffmann 2904f1ae32a1SGerd Hoffmann static int usb_xhci_initfn(struct PCIDevice *dev) 2905f1ae32a1SGerd Hoffmann { 2906f1ae32a1SGerd Hoffmann int ret; 2907f1ae32a1SGerd Hoffmann 2908f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2909f1ae32a1SGerd Hoffmann 2910f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CLASS_PROG] = 0x30; /* xHCI */ 2911f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ 2912f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CACHE_LINE_SIZE] = 0x10; 2913f1ae32a1SGerd Hoffmann xhci->pci_dev.config[0x60] = 0x30; /* release number */ 2914f1ae32a1SGerd Hoffmann 2915f1ae32a1SGerd Hoffmann usb_xhci_init(xhci, &dev->qdev); 2916f1ae32a1SGerd Hoffmann 291701546fa6SGerd Hoffmann xhci->mfwrap_timer = qemu_new_timer_ns(vm_clock, xhci_mfwrap_timer, xhci); 291801546fa6SGerd Hoffmann 2919f1ae32a1SGerd Hoffmann xhci->irq = xhci->pci_dev.irq[0]; 2920f1ae32a1SGerd Hoffmann 2921f1ae32a1SGerd Hoffmann memory_region_init_io(&xhci->mem, &xhci_mem_ops, xhci, 2922f1ae32a1SGerd Hoffmann "xhci", LEN_REGS); 2923f1ae32a1SGerd Hoffmann pci_register_bar(&xhci->pci_dev, 0, 2924f1ae32a1SGerd Hoffmann PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, 2925f1ae32a1SGerd Hoffmann &xhci->mem); 2926f1ae32a1SGerd Hoffmann 2927f1ae32a1SGerd Hoffmann ret = pcie_cap_init(&xhci->pci_dev, 0xa0, PCI_EXP_TYPE_ENDPOINT, 0); 2928f1ae32a1SGerd Hoffmann assert(ret >= 0); 2929f1ae32a1SGerd Hoffmann 2930c5e9b02dSGerd Hoffmann if (xhci->flags & (1 << XHCI_FLAG_USE_MSI)) { 2931c5e9b02dSGerd Hoffmann msi_init(&xhci->pci_dev, 0x70, MAXINTRS, true, false); 2932f1ae32a1SGerd Hoffmann } 29334c47f800SGerd Hoffmann if (xhci->flags & (1 << XHCI_FLAG_USE_MSI_X)) { 29344c47f800SGerd Hoffmann msix_init(&xhci->pci_dev, MAXINTRS, 29354c47f800SGerd Hoffmann &xhci->mem, 0, OFF_MSIX_TABLE, 29364c47f800SGerd Hoffmann &xhci->mem, 0, OFF_MSIX_PBA, 29374c47f800SGerd Hoffmann 0x90); 29384c47f800SGerd Hoffmann } 2939f1ae32a1SGerd Hoffmann 2940f1ae32a1SGerd Hoffmann return 0; 2941f1ae32a1SGerd Hoffmann } 2942f1ae32a1SGerd Hoffmann 2943f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_xhci = { 2944f1ae32a1SGerd Hoffmann .name = "xhci", 2945f1ae32a1SGerd Hoffmann .unmigratable = 1, 2946f1ae32a1SGerd Hoffmann }; 2947f1ae32a1SGerd Hoffmann 2948f1ae32a1SGerd Hoffmann static Property xhci_properties[] = { 2949c5e9b02dSGerd Hoffmann DEFINE_PROP_BIT("msi", XHCIState, flags, XHCI_FLAG_USE_MSI, true), 29504c47f800SGerd Hoffmann DEFINE_PROP_BIT("msix", XHCIState, flags, XHCI_FLAG_USE_MSI_X, true), 29510846e635SGerd Hoffmann DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4), 29520846e635SGerd Hoffmann DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), 2953f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 2954f1ae32a1SGerd Hoffmann }; 2955f1ae32a1SGerd Hoffmann 2956f1ae32a1SGerd Hoffmann static void xhci_class_init(ObjectClass *klass, void *data) 2957f1ae32a1SGerd Hoffmann { 2958f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2959f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2960f1ae32a1SGerd Hoffmann 2961f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_xhci; 2962f1ae32a1SGerd Hoffmann dc->props = xhci_properties; 296364619739SJan Kiszka dc->reset = xhci_reset; 2964f1ae32a1SGerd Hoffmann k->init = usb_xhci_initfn; 2965f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_NEC; 2966f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_NEC_UPD720200; 2967f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2968f1ae32a1SGerd Hoffmann k->revision = 0x03; 2969f1ae32a1SGerd Hoffmann k->is_express = 1; 2970f1ae32a1SGerd Hoffmann } 2971f1ae32a1SGerd Hoffmann 2972f1ae32a1SGerd Hoffmann static TypeInfo xhci_info = { 2973f1ae32a1SGerd Hoffmann .name = "nec-usb-xhci", 2974f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2975f1ae32a1SGerd Hoffmann .instance_size = sizeof(XHCIState), 2976f1ae32a1SGerd Hoffmann .class_init = xhci_class_init, 2977f1ae32a1SGerd Hoffmann }; 2978f1ae32a1SGerd Hoffmann 2979f1ae32a1SGerd Hoffmann static void xhci_register_types(void) 2980f1ae32a1SGerd Hoffmann { 2981f1ae32a1SGerd Hoffmann type_register_static(&xhci_info); 2982f1ae32a1SGerd Hoffmann } 2983f1ae32a1SGerd Hoffmann 2984f1ae32a1SGerd Hoffmann type_init(xhci_register_types) 2985