1 /* 2 * virtio-iommu device 3 * 4 * Copyright (c) 2020 Red Hat, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2 or later, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/log.h" 22 #include "qemu/iov.h" 23 #include "exec/target_page.h" 24 #include "hw/qdev-properties.h" 25 #include "hw/virtio/virtio.h" 26 #include "sysemu/kvm.h" 27 #include "sysemu/reset.h" 28 #include "sysemu/sysemu.h" 29 #include "qapi/error.h" 30 #include "qemu/error-report.h" 31 #include "trace.h" 32 33 #include "standard-headers/linux/virtio_ids.h" 34 35 #include "hw/virtio/virtio-bus.h" 36 #include "hw/virtio/virtio-iommu.h" 37 #include "hw/pci/pci_bus.h" 38 #include "hw/pci/pci.h" 39 40 /* Max size */ 41 #define VIOMMU_DEFAULT_QUEUE_SIZE 256 42 #define VIOMMU_PROBE_SIZE 512 43 44 typedef struct VirtIOIOMMUDomain { 45 uint32_t id; 46 bool bypass; 47 GTree *mappings; 48 QLIST_HEAD(, VirtIOIOMMUEndpoint) endpoint_list; 49 } VirtIOIOMMUDomain; 50 51 typedef struct VirtIOIOMMUEndpoint { 52 uint32_t id; 53 VirtIOIOMMUDomain *domain; 54 IOMMUMemoryRegion *iommu_mr; 55 QLIST_ENTRY(VirtIOIOMMUEndpoint) next; 56 } VirtIOIOMMUEndpoint; 57 58 typedef struct VirtIOIOMMUInterval { 59 uint64_t low; 60 uint64_t high; 61 } VirtIOIOMMUInterval; 62 63 typedef struct VirtIOIOMMUMapping { 64 uint64_t phys_addr; 65 uint32_t flags; 66 } VirtIOIOMMUMapping; 67 68 static inline uint16_t virtio_iommu_get_bdf(IOMMUDevice *dev) 69 { 70 return PCI_BUILD_BDF(pci_bus_num(dev->bus), dev->devfn); 71 } 72 73 static bool virtio_iommu_device_bypassed(IOMMUDevice *sdev) 74 { 75 uint32_t sid; 76 bool bypassed; 77 VirtIOIOMMU *s = sdev->viommu; 78 VirtIOIOMMUEndpoint *ep; 79 80 sid = virtio_iommu_get_bdf(sdev); 81 82 qemu_rec_mutex_lock(&s->mutex); 83 /* need to check bypass before system reset */ 84 if (!s->endpoints) { 85 bypassed = s->config.bypass; 86 goto unlock; 87 } 88 89 ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(sid)); 90 if (!ep || !ep->domain) { 91 bypassed = s->config.bypass; 92 } else { 93 bypassed = ep->domain->bypass; 94 } 95 96 unlock: 97 qemu_rec_mutex_unlock(&s->mutex); 98 return bypassed; 99 } 100 101 /* Return whether the device is using IOMMU translation. */ 102 static bool virtio_iommu_switch_address_space(IOMMUDevice *sdev) 103 { 104 bool use_remapping; 105 106 assert(sdev); 107 108 use_remapping = !virtio_iommu_device_bypassed(sdev); 109 110 trace_virtio_iommu_switch_address_space(pci_bus_num(sdev->bus), 111 PCI_SLOT(sdev->devfn), 112 PCI_FUNC(sdev->devfn), 113 use_remapping); 114 115 /* Turn off first then on the other */ 116 if (use_remapping) { 117 memory_region_set_enabled(&sdev->bypass_mr, false); 118 memory_region_set_enabled(MEMORY_REGION(&sdev->iommu_mr), true); 119 } else { 120 memory_region_set_enabled(MEMORY_REGION(&sdev->iommu_mr), false); 121 memory_region_set_enabled(&sdev->bypass_mr, true); 122 } 123 124 return use_remapping; 125 } 126 127 static void virtio_iommu_switch_address_space_all(VirtIOIOMMU *s) 128 { 129 GHashTableIter iter; 130 IOMMUPciBus *iommu_pci_bus; 131 int i; 132 133 g_hash_table_iter_init(&iter, s->as_by_busptr); 134 while (g_hash_table_iter_next(&iter, NULL, (void **)&iommu_pci_bus)) { 135 for (i = 0; i < PCI_DEVFN_MAX; i++) { 136 if (!iommu_pci_bus->pbdev[i]) { 137 continue; 138 } 139 virtio_iommu_switch_address_space(iommu_pci_bus->pbdev[i]); 140 } 141 } 142 } 143 144 /** 145 * The bus number is used for lookup when SID based operations occur. 146 * In that case we lazily populate the IOMMUPciBus array from the bus hash 147 * table. At the time the IOMMUPciBus is created (iommu_find_add_as), the bus 148 * numbers may not be always initialized yet. 149 */ 150 static IOMMUPciBus *iommu_find_iommu_pcibus(VirtIOIOMMU *s, uint8_t bus_num) 151 { 152 IOMMUPciBus *iommu_pci_bus = s->iommu_pcibus_by_bus_num[bus_num]; 153 154 if (!iommu_pci_bus) { 155 GHashTableIter iter; 156 157 g_hash_table_iter_init(&iter, s->as_by_busptr); 158 while (g_hash_table_iter_next(&iter, NULL, (void **)&iommu_pci_bus)) { 159 if (pci_bus_num(iommu_pci_bus->bus) == bus_num) { 160 s->iommu_pcibus_by_bus_num[bus_num] = iommu_pci_bus; 161 return iommu_pci_bus; 162 } 163 } 164 return NULL; 165 } 166 return iommu_pci_bus; 167 } 168 169 static IOMMUMemoryRegion *virtio_iommu_mr(VirtIOIOMMU *s, uint32_t sid) 170 { 171 uint8_t bus_n, devfn; 172 IOMMUPciBus *iommu_pci_bus; 173 IOMMUDevice *dev; 174 175 bus_n = PCI_BUS_NUM(sid); 176 iommu_pci_bus = iommu_find_iommu_pcibus(s, bus_n); 177 if (iommu_pci_bus) { 178 devfn = sid & (PCI_DEVFN_MAX - 1); 179 dev = iommu_pci_bus->pbdev[devfn]; 180 if (dev) { 181 return &dev->iommu_mr; 182 } 183 } 184 return NULL; 185 } 186 187 static gint interval_cmp(gconstpointer a, gconstpointer b, gpointer user_data) 188 { 189 VirtIOIOMMUInterval *inta = (VirtIOIOMMUInterval *)a; 190 VirtIOIOMMUInterval *intb = (VirtIOIOMMUInterval *)b; 191 192 if (inta->high < intb->low) { 193 return -1; 194 } else if (intb->high < inta->low) { 195 return 1; 196 } else { 197 return 0; 198 } 199 } 200 201 static void virtio_iommu_notify_map_unmap(IOMMUMemoryRegion *mr, 202 IOMMUTLBEvent *event, 203 hwaddr virt_start, hwaddr virt_end) 204 { 205 uint64_t delta = virt_end - virt_start; 206 207 event->entry.iova = virt_start; 208 event->entry.addr_mask = delta; 209 210 if (delta == UINT64_MAX) { 211 memory_region_notify_iommu(mr, 0, *event); 212 } 213 214 while (virt_start != virt_end + 1) { 215 uint64_t mask = dma_aligned_pow2_mask(virt_start, virt_end, 64); 216 217 event->entry.addr_mask = mask; 218 event->entry.iova = virt_start; 219 memory_region_notify_iommu(mr, 0, *event); 220 virt_start += mask + 1; 221 if (event->entry.perm != IOMMU_NONE) { 222 event->entry.translated_addr += mask + 1; 223 } 224 } 225 } 226 227 static void virtio_iommu_notify_map(IOMMUMemoryRegion *mr, hwaddr virt_start, 228 hwaddr virt_end, hwaddr paddr, 229 uint32_t flags) 230 { 231 IOMMUTLBEvent event; 232 IOMMUAccessFlags perm = IOMMU_ACCESS_FLAG(flags & VIRTIO_IOMMU_MAP_F_READ, 233 flags & VIRTIO_IOMMU_MAP_F_WRITE); 234 235 if (!(mr->iommu_notify_flags & IOMMU_NOTIFIER_MAP) || 236 (flags & VIRTIO_IOMMU_MAP_F_MMIO) || !perm) { 237 return; 238 } 239 240 trace_virtio_iommu_notify_map(mr->parent_obj.name, virt_start, virt_end, 241 paddr, perm); 242 243 event.type = IOMMU_NOTIFIER_MAP; 244 event.entry.target_as = &address_space_memory; 245 event.entry.perm = perm; 246 event.entry.translated_addr = paddr; 247 248 virtio_iommu_notify_map_unmap(mr, &event, virt_start, virt_end); 249 } 250 251 static void virtio_iommu_notify_unmap(IOMMUMemoryRegion *mr, hwaddr virt_start, 252 hwaddr virt_end) 253 { 254 IOMMUTLBEvent event; 255 256 if (!(mr->iommu_notify_flags & IOMMU_NOTIFIER_UNMAP)) { 257 return; 258 } 259 260 trace_virtio_iommu_notify_unmap(mr->parent_obj.name, virt_start, virt_end); 261 262 event.type = IOMMU_NOTIFIER_UNMAP; 263 event.entry.target_as = &address_space_memory; 264 event.entry.perm = IOMMU_NONE; 265 event.entry.translated_addr = 0; 266 267 virtio_iommu_notify_map_unmap(mr, &event, virt_start, virt_end); 268 } 269 270 static gboolean virtio_iommu_notify_unmap_cb(gpointer key, gpointer value, 271 gpointer data) 272 { 273 VirtIOIOMMUInterval *interval = (VirtIOIOMMUInterval *) key; 274 IOMMUMemoryRegion *mr = (IOMMUMemoryRegion *) data; 275 276 virtio_iommu_notify_unmap(mr, interval->low, interval->high); 277 278 return false; 279 } 280 281 static gboolean virtio_iommu_notify_map_cb(gpointer key, gpointer value, 282 gpointer data) 283 { 284 VirtIOIOMMUMapping *mapping = (VirtIOIOMMUMapping *) value; 285 VirtIOIOMMUInterval *interval = (VirtIOIOMMUInterval *) key; 286 IOMMUMemoryRegion *mr = (IOMMUMemoryRegion *) data; 287 288 virtio_iommu_notify_map(mr, interval->low, interval->high, 289 mapping->phys_addr, mapping->flags); 290 291 return false; 292 } 293 294 static void virtio_iommu_detach_endpoint_from_domain(VirtIOIOMMUEndpoint *ep) 295 { 296 VirtIOIOMMUDomain *domain = ep->domain; 297 IOMMUDevice *sdev = container_of(ep->iommu_mr, IOMMUDevice, iommu_mr); 298 299 if (!ep->domain) { 300 return; 301 } 302 g_tree_foreach(domain->mappings, virtio_iommu_notify_unmap_cb, 303 ep->iommu_mr); 304 QLIST_REMOVE(ep, next); 305 ep->domain = NULL; 306 virtio_iommu_switch_address_space(sdev); 307 } 308 309 static VirtIOIOMMUEndpoint *virtio_iommu_get_endpoint(VirtIOIOMMU *s, 310 uint32_t ep_id) 311 { 312 VirtIOIOMMUEndpoint *ep; 313 IOMMUMemoryRegion *mr; 314 315 ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(ep_id)); 316 if (ep) { 317 return ep; 318 } 319 mr = virtio_iommu_mr(s, ep_id); 320 if (!mr) { 321 return NULL; 322 } 323 ep = g_malloc0(sizeof(*ep)); 324 ep->id = ep_id; 325 ep->iommu_mr = mr; 326 trace_virtio_iommu_get_endpoint(ep_id); 327 g_tree_insert(s->endpoints, GUINT_TO_POINTER(ep_id), ep); 328 return ep; 329 } 330 331 static void virtio_iommu_put_endpoint(gpointer data) 332 { 333 VirtIOIOMMUEndpoint *ep = (VirtIOIOMMUEndpoint *)data; 334 335 if (ep->domain) { 336 virtio_iommu_detach_endpoint_from_domain(ep); 337 } 338 339 trace_virtio_iommu_put_endpoint(ep->id); 340 g_free(ep); 341 } 342 343 static VirtIOIOMMUDomain *virtio_iommu_get_domain(VirtIOIOMMU *s, 344 uint32_t domain_id, 345 bool bypass) 346 { 347 VirtIOIOMMUDomain *domain; 348 349 domain = g_tree_lookup(s->domains, GUINT_TO_POINTER(domain_id)); 350 if (domain) { 351 if (domain->bypass != bypass) { 352 return NULL; 353 } 354 return domain; 355 } 356 domain = g_malloc0(sizeof(*domain)); 357 domain->id = domain_id; 358 domain->mappings = g_tree_new_full((GCompareDataFunc)interval_cmp, 359 NULL, (GDestroyNotify)g_free, 360 (GDestroyNotify)g_free); 361 domain->bypass = bypass; 362 g_tree_insert(s->domains, GUINT_TO_POINTER(domain_id), domain); 363 QLIST_INIT(&domain->endpoint_list); 364 trace_virtio_iommu_get_domain(domain_id); 365 return domain; 366 } 367 368 static void virtio_iommu_put_domain(gpointer data) 369 { 370 VirtIOIOMMUDomain *domain = (VirtIOIOMMUDomain *)data; 371 VirtIOIOMMUEndpoint *iter, *tmp; 372 373 QLIST_FOREACH_SAFE(iter, &domain->endpoint_list, next, tmp) { 374 virtio_iommu_detach_endpoint_from_domain(iter); 375 } 376 g_tree_destroy(domain->mappings); 377 trace_virtio_iommu_put_domain(domain->id); 378 g_free(domain); 379 } 380 381 static AddressSpace *virtio_iommu_find_add_as(PCIBus *bus, void *opaque, 382 int devfn) 383 { 384 VirtIOIOMMU *s = opaque; 385 IOMMUPciBus *sbus = g_hash_table_lookup(s->as_by_busptr, bus); 386 static uint32_t mr_index; 387 IOMMUDevice *sdev; 388 389 if (!sbus) { 390 sbus = g_malloc0(sizeof(IOMMUPciBus) + 391 sizeof(IOMMUDevice *) * PCI_DEVFN_MAX); 392 sbus->bus = bus; 393 g_hash_table_insert(s->as_by_busptr, bus, sbus); 394 } 395 396 sdev = sbus->pbdev[devfn]; 397 if (!sdev) { 398 char *name = g_strdup_printf("%s-%d-%d", 399 TYPE_VIRTIO_IOMMU_MEMORY_REGION, 400 mr_index++, devfn); 401 sdev = sbus->pbdev[devfn] = g_new0(IOMMUDevice, 1); 402 403 sdev->viommu = s; 404 sdev->bus = bus; 405 sdev->devfn = devfn; 406 407 trace_virtio_iommu_init_iommu_mr(name); 408 409 memory_region_init(&sdev->root, OBJECT(s), name, UINT64_MAX); 410 address_space_init(&sdev->as, &sdev->root, TYPE_VIRTIO_IOMMU); 411 412 /* 413 * Build the IOMMU disabled container with aliases to the 414 * shared MRs. Note that aliasing to a shared memory region 415 * could help the memory API to detect same FlatViews so we 416 * can have devices to share the same FlatView when in bypass 417 * mode. (either by not configuring virtio-iommu driver or with 418 * "iommu=pt"). It will greatly reduce the total number of 419 * FlatViews of the system hence VM runs faster. 420 */ 421 memory_region_init_alias(&sdev->bypass_mr, OBJECT(s), 422 "system", get_system_memory(), 0, 423 memory_region_size(get_system_memory())); 424 425 memory_region_init_iommu(&sdev->iommu_mr, sizeof(sdev->iommu_mr), 426 TYPE_VIRTIO_IOMMU_MEMORY_REGION, 427 OBJECT(s), name, 428 UINT64_MAX); 429 430 /* 431 * Hook both the containers under the root container, we 432 * switch between iommu & bypass MRs by enable/disable 433 * corresponding sub-containers 434 */ 435 memory_region_add_subregion_overlap(&sdev->root, 0, 436 MEMORY_REGION(&sdev->iommu_mr), 437 0); 438 memory_region_add_subregion_overlap(&sdev->root, 0, 439 &sdev->bypass_mr, 0); 440 441 virtio_iommu_switch_address_space(sdev); 442 g_free(name); 443 } 444 return &sdev->as; 445 } 446 447 static int virtio_iommu_attach(VirtIOIOMMU *s, 448 struct virtio_iommu_req_attach *req) 449 { 450 uint32_t domain_id = le32_to_cpu(req->domain); 451 uint32_t ep_id = le32_to_cpu(req->endpoint); 452 uint32_t flags = le32_to_cpu(req->flags); 453 VirtIOIOMMUDomain *domain; 454 VirtIOIOMMUEndpoint *ep; 455 IOMMUDevice *sdev; 456 457 trace_virtio_iommu_attach(domain_id, ep_id); 458 459 if (flags & ~VIRTIO_IOMMU_ATTACH_F_BYPASS) { 460 return VIRTIO_IOMMU_S_INVAL; 461 } 462 463 ep = virtio_iommu_get_endpoint(s, ep_id); 464 if (!ep) { 465 return VIRTIO_IOMMU_S_NOENT; 466 } 467 468 if (ep->domain) { 469 VirtIOIOMMUDomain *previous_domain = ep->domain; 470 /* 471 * the device is already attached to a domain, 472 * detach it first 473 */ 474 virtio_iommu_detach_endpoint_from_domain(ep); 475 if (QLIST_EMPTY(&previous_domain->endpoint_list)) { 476 g_tree_remove(s->domains, GUINT_TO_POINTER(previous_domain->id)); 477 } 478 } 479 480 domain = virtio_iommu_get_domain(s, domain_id, 481 flags & VIRTIO_IOMMU_ATTACH_F_BYPASS); 482 if (!domain) { 483 /* Incompatible bypass flag */ 484 return VIRTIO_IOMMU_S_INVAL; 485 } 486 QLIST_INSERT_HEAD(&domain->endpoint_list, ep, next); 487 488 ep->domain = domain; 489 sdev = container_of(ep->iommu_mr, IOMMUDevice, iommu_mr); 490 virtio_iommu_switch_address_space(sdev); 491 492 /* Replay domain mappings on the associated memory region */ 493 g_tree_foreach(domain->mappings, virtio_iommu_notify_map_cb, 494 ep->iommu_mr); 495 496 return VIRTIO_IOMMU_S_OK; 497 } 498 499 static int virtio_iommu_detach(VirtIOIOMMU *s, 500 struct virtio_iommu_req_detach *req) 501 { 502 uint32_t domain_id = le32_to_cpu(req->domain); 503 uint32_t ep_id = le32_to_cpu(req->endpoint); 504 VirtIOIOMMUDomain *domain; 505 VirtIOIOMMUEndpoint *ep; 506 507 trace_virtio_iommu_detach(domain_id, ep_id); 508 509 ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(ep_id)); 510 if (!ep) { 511 return VIRTIO_IOMMU_S_NOENT; 512 } 513 514 domain = ep->domain; 515 516 if (!domain || domain->id != domain_id) { 517 return VIRTIO_IOMMU_S_INVAL; 518 } 519 520 virtio_iommu_detach_endpoint_from_domain(ep); 521 522 if (QLIST_EMPTY(&domain->endpoint_list)) { 523 g_tree_remove(s->domains, GUINT_TO_POINTER(domain->id)); 524 } 525 return VIRTIO_IOMMU_S_OK; 526 } 527 528 static int virtio_iommu_map(VirtIOIOMMU *s, 529 struct virtio_iommu_req_map *req) 530 { 531 uint32_t domain_id = le32_to_cpu(req->domain); 532 uint64_t phys_start = le64_to_cpu(req->phys_start); 533 uint64_t virt_start = le64_to_cpu(req->virt_start); 534 uint64_t virt_end = le64_to_cpu(req->virt_end); 535 uint32_t flags = le32_to_cpu(req->flags); 536 VirtIOIOMMUDomain *domain; 537 VirtIOIOMMUInterval *interval; 538 VirtIOIOMMUMapping *mapping; 539 VirtIOIOMMUEndpoint *ep; 540 541 if (flags & ~VIRTIO_IOMMU_MAP_F_MASK) { 542 return VIRTIO_IOMMU_S_INVAL; 543 } 544 545 domain = g_tree_lookup(s->domains, GUINT_TO_POINTER(domain_id)); 546 if (!domain) { 547 return VIRTIO_IOMMU_S_NOENT; 548 } 549 550 if (domain->bypass) { 551 return VIRTIO_IOMMU_S_INVAL; 552 } 553 554 interval = g_malloc0(sizeof(*interval)); 555 556 interval->low = virt_start; 557 interval->high = virt_end; 558 559 mapping = g_tree_lookup(domain->mappings, (gpointer)interval); 560 if (mapping) { 561 g_free(interval); 562 return VIRTIO_IOMMU_S_INVAL; 563 } 564 565 trace_virtio_iommu_map(domain_id, virt_start, virt_end, phys_start, flags); 566 567 mapping = g_malloc0(sizeof(*mapping)); 568 mapping->phys_addr = phys_start; 569 mapping->flags = flags; 570 571 g_tree_insert(domain->mappings, interval, mapping); 572 573 QLIST_FOREACH(ep, &domain->endpoint_list, next) { 574 virtio_iommu_notify_map(ep->iommu_mr, virt_start, virt_end, phys_start, 575 flags); 576 } 577 578 return VIRTIO_IOMMU_S_OK; 579 } 580 581 static int virtio_iommu_unmap(VirtIOIOMMU *s, 582 struct virtio_iommu_req_unmap *req) 583 { 584 uint32_t domain_id = le32_to_cpu(req->domain); 585 uint64_t virt_start = le64_to_cpu(req->virt_start); 586 uint64_t virt_end = le64_to_cpu(req->virt_end); 587 VirtIOIOMMUMapping *iter_val; 588 VirtIOIOMMUInterval interval, *iter_key; 589 VirtIOIOMMUDomain *domain; 590 VirtIOIOMMUEndpoint *ep; 591 int ret = VIRTIO_IOMMU_S_OK; 592 593 trace_virtio_iommu_unmap(domain_id, virt_start, virt_end); 594 595 domain = g_tree_lookup(s->domains, GUINT_TO_POINTER(domain_id)); 596 if (!domain) { 597 return VIRTIO_IOMMU_S_NOENT; 598 } 599 600 if (domain->bypass) { 601 return VIRTIO_IOMMU_S_INVAL; 602 } 603 604 interval.low = virt_start; 605 interval.high = virt_end; 606 607 while (g_tree_lookup_extended(domain->mappings, &interval, 608 (void **)&iter_key, (void**)&iter_val)) { 609 uint64_t current_low = iter_key->low; 610 uint64_t current_high = iter_key->high; 611 612 if (interval.low <= current_low && interval.high >= current_high) { 613 QLIST_FOREACH(ep, &domain->endpoint_list, next) { 614 virtio_iommu_notify_unmap(ep->iommu_mr, current_low, 615 current_high); 616 } 617 g_tree_remove(domain->mappings, iter_key); 618 trace_virtio_iommu_unmap_done(domain_id, current_low, current_high); 619 } else { 620 ret = VIRTIO_IOMMU_S_RANGE; 621 break; 622 } 623 } 624 return ret; 625 } 626 627 static ssize_t virtio_iommu_fill_resv_mem_prop(VirtIOIOMMU *s, uint32_t ep, 628 uint8_t *buf, size_t free) 629 { 630 struct virtio_iommu_probe_resv_mem prop = {}; 631 size_t size = sizeof(prop), length = size - sizeof(prop.head), total; 632 int i; 633 634 total = size * s->nb_reserved_regions; 635 636 if (total > free) { 637 return -ENOSPC; 638 } 639 640 for (i = 0; i < s->nb_reserved_regions; i++) { 641 unsigned subtype = s->reserved_regions[i].type; 642 643 assert(subtype == VIRTIO_IOMMU_RESV_MEM_T_RESERVED || 644 subtype == VIRTIO_IOMMU_RESV_MEM_T_MSI); 645 prop.head.type = cpu_to_le16(VIRTIO_IOMMU_PROBE_T_RESV_MEM); 646 prop.head.length = cpu_to_le16(length); 647 prop.subtype = subtype; 648 prop.start = cpu_to_le64(s->reserved_regions[i].low); 649 prop.end = cpu_to_le64(s->reserved_regions[i].high); 650 651 memcpy(buf, &prop, size); 652 653 trace_virtio_iommu_fill_resv_property(ep, prop.subtype, 654 prop.start, prop.end); 655 buf += size; 656 } 657 return total; 658 } 659 660 /** 661 * virtio_iommu_probe - Fill the probe request buffer with 662 * the properties the device is able to return 663 */ 664 static int virtio_iommu_probe(VirtIOIOMMU *s, 665 struct virtio_iommu_req_probe *req, 666 uint8_t *buf) 667 { 668 uint32_t ep_id = le32_to_cpu(req->endpoint); 669 size_t free = VIOMMU_PROBE_SIZE; 670 ssize_t count; 671 672 if (!virtio_iommu_mr(s, ep_id)) { 673 return VIRTIO_IOMMU_S_NOENT; 674 } 675 676 count = virtio_iommu_fill_resv_mem_prop(s, ep_id, buf, free); 677 if (count < 0) { 678 return VIRTIO_IOMMU_S_INVAL; 679 } 680 buf += count; 681 free -= count; 682 683 return VIRTIO_IOMMU_S_OK; 684 } 685 686 static int virtio_iommu_iov_to_req(struct iovec *iov, 687 unsigned int iov_cnt, 688 void *req, size_t payload_sz) 689 { 690 size_t sz = iov_to_buf(iov, iov_cnt, 0, req, payload_sz); 691 692 if (unlikely(sz != payload_sz)) { 693 return VIRTIO_IOMMU_S_INVAL; 694 } 695 return 0; 696 } 697 698 #define virtio_iommu_handle_req(__req) \ 699 static int virtio_iommu_handle_ ## __req(VirtIOIOMMU *s, \ 700 struct iovec *iov, \ 701 unsigned int iov_cnt) \ 702 { \ 703 struct virtio_iommu_req_ ## __req req; \ 704 int ret = virtio_iommu_iov_to_req(iov, iov_cnt, &req, \ 705 sizeof(req) - sizeof(struct virtio_iommu_req_tail));\ 706 \ 707 return ret ? ret : virtio_iommu_ ## __req(s, &req); \ 708 } 709 710 virtio_iommu_handle_req(attach) 711 virtio_iommu_handle_req(detach) 712 virtio_iommu_handle_req(map) 713 virtio_iommu_handle_req(unmap) 714 715 static int virtio_iommu_handle_probe(VirtIOIOMMU *s, 716 struct iovec *iov, 717 unsigned int iov_cnt, 718 uint8_t *buf) 719 { 720 struct virtio_iommu_req_probe req; 721 int ret = virtio_iommu_iov_to_req(iov, iov_cnt, &req, sizeof(req)); 722 723 return ret ? ret : virtio_iommu_probe(s, &req, buf); 724 } 725 726 static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq) 727 { 728 VirtIOIOMMU *s = VIRTIO_IOMMU(vdev); 729 struct virtio_iommu_req_head head; 730 struct virtio_iommu_req_tail tail = {}; 731 size_t output_size = sizeof(tail), sz; 732 VirtQueueElement *elem; 733 unsigned int iov_cnt; 734 struct iovec *iov; 735 void *buf = NULL; 736 737 for (;;) { 738 elem = virtqueue_pop(vq, sizeof(VirtQueueElement)); 739 if (!elem) { 740 return; 741 } 742 743 if (iov_size(elem->in_sg, elem->in_num) < sizeof(tail) || 744 iov_size(elem->out_sg, elem->out_num) < sizeof(head)) { 745 virtio_error(vdev, "virtio-iommu bad head/tail size"); 746 virtqueue_detach_element(vq, elem, 0); 747 g_free(elem); 748 break; 749 } 750 751 iov_cnt = elem->out_num; 752 iov = elem->out_sg; 753 sz = iov_to_buf(iov, iov_cnt, 0, &head, sizeof(head)); 754 if (unlikely(sz != sizeof(head))) { 755 tail.status = VIRTIO_IOMMU_S_DEVERR; 756 goto out; 757 } 758 qemu_rec_mutex_lock(&s->mutex); 759 switch (head.type) { 760 case VIRTIO_IOMMU_T_ATTACH: 761 tail.status = virtio_iommu_handle_attach(s, iov, iov_cnt); 762 break; 763 case VIRTIO_IOMMU_T_DETACH: 764 tail.status = virtio_iommu_handle_detach(s, iov, iov_cnt); 765 break; 766 case VIRTIO_IOMMU_T_MAP: 767 tail.status = virtio_iommu_handle_map(s, iov, iov_cnt); 768 break; 769 case VIRTIO_IOMMU_T_UNMAP: 770 tail.status = virtio_iommu_handle_unmap(s, iov, iov_cnt); 771 break; 772 case VIRTIO_IOMMU_T_PROBE: 773 { 774 struct virtio_iommu_req_tail *ptail; 775 776 output_size = s->config.probe_size + sizeof(tail); 777 buf = g_malloc0(output_size); 778 779 ptail = buf + s->config.probe_size; 780 ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf); 781 break; 782 } 783 default: 784 tail.status = VIRTIO_IOMMU_S_UNSUPP; 785 } 786 qemu_rec_mutex_unlock(&s->mutex); 787 788 out: 789 sz = iov_from_buf(elem->in_sg, elem->in_num, 0, 790 buf ? buf : &tail, output_size); 791 assert(sz == output_size); 792 793 virtqueue_push(vq, elem, sz); 794 virtio_notify(vdev, vq); 795 g_free(elem); 796 g_free(buf); 797 buf = NULL; 798 } 799 } 800 801 static void virtio_iommu_report_fault(VirtIOIOMMU *viommu, uint8_t reason, 802 int flags, uint32_t endpoint, 803 uint64_t address) 804 { 805 VirtIODevice *vdev = &viommu->parent_obj; 806 VirtQueue *vq = viommu->event_vq; 807 struct virtio_iommu_fault fault; 808 VirtQueueElement *elem; 809 size_t sz; 810 811 memset(&fault, 0, sizeof(fault)); 812 fault.reason = reason; 813 fault.flags = cpu_to_le32(flags); 814 fault.endpoint = cpu_to_le32(endpoint); 815 fault.address = cpu_to_le64(address); 816 817 elem = virtqueue_pop(vq, sizeof(VirtQueueElement)); 818 819 if (!elem) { 820 error_report_once( 821 "no buffer available in event queue to report event"); 822 return; 823 } 824 825 if (iov_size(elem->in_sg, elem->in_num) < sizeof(fault)) { 826 virtio_error(vdev, "error buffer of wrong size"); 827 virtqueue_detach_element(vq, elem, 0); 828 g_free(elem); 829 return; 830 } 831 832 sz = iov_from_buf(elem->in_sg, elem->in_num, 0, 833 &fault, sizeof(fault)); 834 assert(sz == sizeof(fault)); 835 836 trace_virtio_iommu_report_fault(reason, flags, endpoint, address); 837 virtqueue_push(vq, elem, sz); 838 virtio_notify(vdev, vq); 839 g_free(elem); 840 841 } 842 843 static IOMMUTLBEntry virtio_iommu_translate(IOMMUMemoryRegion *mr, hwaddr addr, 844 IOMMUAccessFlags flag, 845 int iommu_idx) 846 { 847 IOMMUDevice *sdev = container_of(mr, IOMMUDevice, iommu_mr); 848 VirtIOIOMMUInterval interval, *mapping_key; 849 VirtIOIOMMUMapping *mapping_value; 850 VirtIOIOMMU *s = sdev->viommu; 851 bool read_fault, write_fault; 852 VirtIOIOMMUEndpoint *ep; 853 uint32_t sid, flags; 854 bool bypass_allowed; 855 bool found; 856 int i; 857 858 interval.low = addr; 859 interval.high = addr + 1; 860 861 IOMMUTLBEntry entry = { 862 .target_as = &address_space_memory, 863 .iova = addr, 864 .translated_addr = addr, 865 .addr_mask = (1 << ctz32(s->config.page_size_mask)) - 1, 866 .perm = IOMMU_NONE, 867 }; 868 869 bypass_allowed = s->config.bypass; 870 871 sid = virtio_iommu_get_bdf(sdev); 872 873 trace_virtio_iommu_translate(mr->parent_obj.name, sid, addr, flag); 874 qemu_rec_mutex_lock(&s->mutex); 875 876 ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(sid)); 877 878 if (bypass_allowed) 879 assert(ep && ep->domain && !ep->domain->bypass); 880 881 if (!ep) { 882 if (!bypass_allowed) { 883 error_report_once("%s sid=%d is not known!!", __func__, sid); 884 virtio_iommu_report_fault(s, VIRTIO_IOMMU_FAULT_R_UNKNOWN, 885 VIRTIO_IOMMU_FAULT_F_ADDRESS, 886 sid, addr); 887 } else { 888 entry.perm = flag; 889 } 890 goto unlock; 891 } 892 893 for (i = 0; i < s->nb_reserved_regions; i++) { 894 ReservedRegion *reg = &s->reserved_regions[i]; 895 896 if (addr >= reg->low && addr <= reg->high) { 897 switch (reg->type) { 898 case VIRTIO_IOMMU_RESV_MEM_T_MSI: 899 entry.perm = flag; 900 break; 901 case VIRTIO_IOMMU_RESV_MEM_T_RESERVED: 902 default: 903 virtio_iommu_report_fault(s, VIRTIO_IOMMU_FAULT_R_MAPPING, 904 VIRTIO_IOMMU_FAULT_F_ADDRESS, 905 sid, addr); 906 break; 907 } 908 goto unlock; 909 } 910 } 911 912 if (!ep->domain) { 913 if (!bypass_allowed) { 914 error_report_once("%s %02x:%02x.%01x not attached to any domain", 915 __func__, PCI_BUS_NUM(sid), 916 PCI_SLOT(sid), PCI_FUNC(sid)); 917 virtio_iommu_report_fault(s, VIRTIO_IOMMU_FAULT_R_DOMAIN, 918 VIRTIO_IOMMU_FAULT_F_ADDRESS, 919 sid, addr); 920 } else { 921 entry.perm = flag; 922 } 923 goto unlock; 924 } else if (ep->domain->bypass) { 925 entry.perm = flag; 926 goto unlock; 927 } 928 929 found = g_tree_lookup_extended(ep->domain->mappings, (gpointer)(&interval), 930 (void **)&mapping_key, 931 (void **)&mapping_value); 932 if (!found) { 933 error_report_once("%s no mapping for 0x%"PRIx64" for sid=%d", 934 __func__, addr, sid); 935 virtio_iommu_report_fault(s, VIRTIO_IOMMU_FAULT_R_MAPPING, 936 VIRTIO_IOMMU_FAULT_F_ADDRESS, 937 sid, addr); 938 goto unlock; 939 } 940 941 read_fault = (flag & IOMMU_RO) && 942 !(mapping_value->flags & VIRTIO_IOMMU_MAP_F_READ); 943 write_fault = (flag & IOMMU_WO) && 944 !(mapping_value->flags & VIRTIO_IOMMU_MAP_F_WRITE); 945 946 flags = read_fault ? VIRTIO_IOMMU_FAULT_F_READ : 0; 947 flags |= write_fault ? VIRTIO_IOMMU_FAULT_F_WRITE : 0; 948 if (flags) { 949 error_report_once("%s permission error on 0x%"PRIx64"(%d): allowed=%d", 950 __func__, addr, flag, mapping_value->flags); 951 flags |= VIRTIO_IOMMU_FAULT_F_ADDRESS; 952 virtio_iommu_report_fault(s, VIRTIO_IOMMU_FAULT_R_MAPPING, 953 flags | VIRTIO_IOMMU_FAULT_F_ADDRESS, 954 sid, addr); 955 goto unlock; 956 } 957 entry.translated_addr = addr - mapping_key->low + mapping_value->phys_addr; 958 entry.perm = flag; 959 trace_virtio_iommu_translate_out(addr, entry.translated_addr, sid); 960 961 unlock: 962 qemu_rec_mutex_unlock(&s->mutex); 963 return entry; 964 } 965 966 static void virtio_iommu_get_config(VirtIODevice *vdev, uint8_t *config_data) 967 { 968 VirtIOIOMMU *dev = VIRTIO_IOMMU(vdev); 969 struct virtio_iommu_config *dev_config = &dev->config; 970 struct virtio_iommu_config *out_config = (void *)config_data; 971 972 out_config->page_size_mask = cpu_to_le64(dev_config->page_size_mask); 973 out_config->input_range.start = cpu_to_le64(dev_config->input_range.start); 974 out_config->input_range.end = cpu_to_le64(dev_config->input_range.end); 975 out_config->domain_range.start = cpu_to_le32(dev_config->domain_range.start); 976 out_config->domain_range.end = cpu_to_le32(dev_config->domain_range.end); 977 out_config->probe_size = cpu_to_le32(dev_config->probe_size); 978 out_config->bypass = dev_config->bypass; 979 980 trace_virtio_iommu_get_config(dev_config->page_size_mask, 981 dev_config->input_range.start, 982 dev_config->input_range.end, 983 dev_config->domain_range.start, 984 dev_config->domain_range.end, 985 dev_config->probe_size, 986 dev_config->bypass); 987 } 988 989 static void virtio_iommu_set_config(VirtIODevice *vdev, 990 const uint8_t *config_data) 991 { 992 VirtIOIOMMU *dev = VIRTIO_IOMMU(vdev); 993 struct virtio_iommu_config *dev_config = &dev->config; 994 const struct virtio_iommu_config *in_config = (void *)config_data; 995 996 if (in_config->bypass != dev_config->bypass) { 997 if (!virtio_vdev_has_feature(vdev, VIRTIO_IOMMU_F_BYPASS_CONFIG)) { 998 virtio_error(vdev, "cannot set config.bypass"); 999 return; 1000 } else if (in_config->bypass != 0 && in_config->bypass != 1) { 1001 virtio_error(vdev, "invalid config.bypass value '%u'", 1002 in_config->bypass); 1003 return; 1004 } 1005 dev_config->bypass = in_config->bypass; 1006 virtio_iommu_switch_address_space_all(dev); 1007 } 1008 1009 trace_virtio_iommu_set_config(in_config->bypass); 1010 } 1011 1012 static uint64_t virtio_iommu_get_features(VirtIODevice *vdev, uint64_t f, 1013 Error **errp) 1014 { 1015 VirtIOIOMMU *dev = VIRTIO_IOMMU(vdev); 1016 1017 f |= dev->features; 1018 trace_virtio_iommu_get_features(f); 1019 return f; 1020 } 1021 1022 static gint int_cmp(gconstpointer a, gconstpointer b, gpointer user_data) 1023 { 1024 guint ua = GPOINTER_TO_UINT(a); 1025 guint ub = GPOINTER_TO_UINT(b); 1026 return (ua > ub) - (ua < ub); 1027 } 1028 1029 static gboolean virtio_iommu_remap(gpointer key, gpointer value, gpointer data) 1030 { 1031 VirtIOIOMMUMapping *mapping = (VirtIOIOMMUMapping *) value; 1032 VirtIOIOMMUInterval *interval = (VirtIOIOMMUInterval *) key; 1033 IOMMUMemoryRegion *mr = (IOMMUMemoryRegion *) data; 1034 1035 trace_virtio_iommu_remap(mr->parent_obj.name, interval->low, interval->high, 1036 mapping->phys_addr); 1037 virtio_iommu_notify_map(mr, interval->low, interval->high, 1038 mapping->phys_addr, mapping->flags); 1039 return false; 1040 } 1041 1042 static void virtio_iommu_replay(IOMMUMemoryRegion *mr, IOMMUNotifier *n) 1043 { 1044 IOMMUDevice *sdev = container_of(mr, IOMMUDevice, iommu_mr); 1045 VirtIOIOMMU *s = sdev->viommu; 1046 uint32_t sid; 1047 VirtIOIOMMUEndpoint *ep; 1048 1049 sid = virtio_iommu_get_bdf(sdev); 1050 1051 qemu_rec_mutex_lock(&s->mutex); 1052 1053 if (!s->endpoints) { 1054 goto unlock; 1055 } 1056 1057 ep = g_tree_lookup(s->endpoints, GUINT_TO_POINTER(sid)); 1058 if (!ep || !ep->domain) { 1059 goto unlock; 1060 } 1061 1062 g_tree_foreach(ep->domain->mappings, virtio_iommu_remap, mr); 1063 1064 unlock: 1065 qemu_rec_mutex_unlock(&s->mutex); 1066 } 1067 1068 static int virtio_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu_mr, 1069 IOMMUNotifierFlag old, 1070 IOMMUNotifierFlag new, 1071 Error **errp) 1072 { 1073 if (new & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) { 1074 error_setg(errp, "Virtio-iommu does not support dev-iotlb yet"); 1075 return -EINVAL; 1076 } 1077 1078 if (old == IOMMU_NOTIFIER_NONE) { 1079 trace_virtio_iommu_notify_flag_add(iommu_mr->parent_obj.name); 1080 } else if (new == IOMMU_NOTIFIER_NONE) { 1081 trace_virtio_iommu_notify_flag_del(iommu_mr->parent_obj.name); 1082 } 1083 return 0; 1084 } 1085 1086 /* 1087 * The default mask (TARGET_PAGE_MASK) is the smallest supported guest granule, 1088 * for example 0xfffffffffffff000. When an assigned device has page size 1089 * restrictions due to the hardware IOMMU configuration, apply this restriction 1090 * to the mask. 1091 */ 1092 static int virtio_iommu_set_page_size_mask(IOMMUMemoryRegion *mr, 1093 uint64_t new_mask, 1094 Error **errp) 1095 { 1096 IOMMUDevice *sdev = container_of(mr, IOMMUDevice, iommu_mr); 1097 VirtIOIOMMU *s = sdev->viommu; 1098 uint64_t cur_mask = s->config.page_size_mask; 1099 1100 trace_virtio_iommu_set_page_size_mask(mr->parent_obj.name, cur_mask, 1101 new_mask); 1102 1103 if ((cur_mask & new_mask) == 0) { 1104 error_setg(errp, "virtio-iommu %s reports a page size mask 0x%"PRIx64 1105 " incompatible with currently supported mask 0x%"PRIx64, 1106 mr->parent_obj.name, new_mask, cur_mask); 1107 return -1; 1108 } 1109 1110 /* 1111 * Once the granule is frozen we can't change the mask anymore. If by 1112 * chance the hotplugged device supports the same granule, we can still 1113 * accept it. 1114 */ 1115 if (s->granule_frozen) { 1116 int cur_granule = ctz64(cur_mask); 1117 1118 if (!(BIT(cur_granule) & new_mask)) { 1119 error_setg(errp, "virtio-iommu %s does not support frozen granule 0x%llx", 1120 mr->parent_obj.name, BIT_ULL(cur_granule)); 1121 return -1; 1122 } 1123 return 0; 1124 } 1125 1126 s->config.page_size_mask &= new_mask; 1127 return 0; 1128 } 1129 1130 static void virtio_iommu_system_reset(void *opaque) 1131 { 1132 VirtIOIOMMU *s = opaque; 1133 1134 trace_virtio_iommu_system_reset(); 1135 1136 /* 1137 * config.bypass is sticky across device reset, but should be restored on 1138 * system reset 1139 */ 1140 s->config.bypass = s->boot_bypass; 1141 virtio_iommu_switch_address_space_all(s); 1142 1143 } 1144 1145 static void virtio_iommu_freeze_granule(Notifier *notifier, void *data) 1146 { 1147 VirtIOIOMMU *s = container_of(notifier, VirtIOIOMMU, machine_done); 1148 int granule; 1149 1150 if (likely(s->config.bypass)) { 1151 /* 1152 * Transient IOMMU MR enable to collect page_size_mask requirements 1153 * through memory_region_iommu_set_page_size_mask() called by 1154 * VFIO region_add() callback 1155 */ 1156 s->config.bypass = false; 1157 virtio_iommu_switch_address_space_all(s); 1158 /* restore default */ 1159 s->config.bypass = true; 1160 virtio_iommu_switch_address_space_all(s); 1161 } 1162 s->granule_frozen = true; 1163 granule = ctz64(s->config.page_size_mask); 1164 trace_virtio_iommu_freeze_granule(BIT(granule)); 1165 } 1166 1167 static void virtio_iommu_device_realize(DeviceState *dev, Error **errp) 1168 { 1169 VirtIODevice *vdev = VIRTIO_DEVICE(dev); 1170 VirtIOIOMMU *s = VIRTIO_IOMMU(dev); 1171 1172 virtio_init(vdev, VIRTIO_ID_IOMMU, sizeof(struct virtio_iommu_config)); 1173 1174 memset(s->iommu_pcibus_by_bus_num, 0, sizeof(s->iommu_pcibus_by_bus_num)); 1175 1176 s->req_vq = virtio_add_queue(vdev, VIOMMU_DEFAULT_QUEUE_SIZE, 1177 virtio_iommu_handle_command); 1178 s->event_vq = virtio_add_queue(vdev, VIOMMU_DEFAULT_QUEUE_SIZE, NULL); 1179 1180 /* 1181 * config.bypass is needed to get initial address space early, such as 1182 * in vfio realize 1183 */ 1184 s->config.bypass = s->boot_bypass; 1185 s->config.page_size_mask = qemu_target_page_mask(); 1186 s->config.input_range.end = UINT64_MAX; 1187 s->config.domain_range.end = UINT32_MAX; 1188 s->config.probe_size = VIOMMU_PROBE_SIZE; 1189 1190 virtio_add_feature(&s->features, VIRTIO_RING_F_EVENT_IDX); 1191 virtio_add_feature(&s->features, VIRTIO_RING_F_INDIRECT_DESC); 1192 virtio_add_feature(&s->features, VIRTIO_F_VERSION_1); 1193 virtio_add_feature(&s->features, VIRTIO_IOMMU_F_INPUT_RANGE); 1194 virtio_add_feature(&s->features, VIRTIO_IOMMU_F_DOMAIN_RANGE); 1195 virtio_add_feature(&s->features, VIRTIO_IOMMU_F_MAP_UNMAP); 1196 virtio_add_feature(&s->features, VIRTIO_IOMMU_F_MMIO); 1197 virtio_add_feature(&s->features, VIRTIO_IOMMU_F_PROBE); 1198 virtio_add_feature(&s->features, VIRTIO_IOMMU_F_BYPASS_CONFIG); 1199 1200 qemu_rec_mutex_init(&s->mutex); 1201 1202 s->as_by_busptr = g_hash_table_new_full(NULL, NULL, NULL, g_free); 1203 1204 if (s->primary_bus) { 1205 pci_setup_iommu(s->primary_bus, virtio_iommu_find_add_as, s); 1206 } else { 1207 error_setg(errp, "VIRTIO-IOMMU is not attached to any PCI bus!"); 1208 } 1209 1210 s->machine_done.notify = virtio_iommu_freeze_granule; 1211 qemu_add_machine_init_done_notifier(&s->machine_done); 1212 1213 qemu_register_reset(virtio_iommu_system_reset, s); 1214 } 1215 1216 static void virtio_iommu_device_unrealize(DeviceState *dev) 1217 { 1218 VirtIODevice *vdev = VIRTIO_DEVICE(dev); 1219 VirtIOIOMMU *s = VIRTIO_IOMMU(dev); 1220 1221 qemu_unregister_reset(virtio_iommu_system_reset, s); 1222 qemu_remove_machine_init_done_notifier(&s->machine_done); 1223 1224 g_hash_table_destroy(s->as_by_busptr); 1225 if (s->domains) { 1226 g_tree_destroy(s->domains); 1227 } 1228 if (s->endpoints) { 1229 g_tree_destroy(s->endpoints); 1230 } 1231 1232 qemu_rec_mutex_destroy(&s->mutex); 1233 1234 virtio_delete_queue(s->req_vq); 1235 virtio_delete_queue(s->event_vq); 1236 virtio_cleanup(vdev); 1237 } 1238 1239 static void virtio_iommu_device_reset(VirtIODevice *vdev) 1240 { 1241 VirtIOIOMMU *s = VIRTIO_IOMMU(vdev); 1242 1243 trace_virtio_iommu_device_reset(); 1244 1245 if (s->domains) { 1246 g_tree_destroy(s->domains); 1247 } 1248 if (s->endpoints) { 1249 g_tree_destroy(s->endpoints); 1250 } 1251 s->domains = g_tree_new_full((GCompareDataFunc)int_cmp, 1252 NULL, NULL, virtio_iommu_put_domain); 1253 s->endpoints = g_tree_new_full((GCompareDataFunc)int_cmp, 1254 NULL, NULL, virtio_iommu_put_endpoint); 1255 } 1256 1257 static void virtio_iommu_set_status(VirtIODevice *vdev, uint8_t status) 1258 { 1259 trace_virtio_iommu_device_status(status); 1260 } 1261 1262 static void virtio_iommu_instance_init(Object *obj) 1263 { 1264 } 1265 1266 #define VMSTATE_INTERVAL \ 1267 { \ 1268 .name = "interval", \ 1269 .version_id = 1, \ 1270 .minimum_version_id = 1, \ 1271 .fields = (VMStateField[]) { \ 1272 VMSTATE_UINT64(low, VirtIOIOMMUInterval), \ 1273 VMSTATE_UINT64(high, VirtIOIOMMUInterval), \ 1274 VMSTATE_END_OF_LIST() \ 1275 } \ 1276 } 1277 1278 #define VMSTATE_MAPPING \ 1279 { \ 1280 .name = "mapping", \ 1281 .version_id = 1, \ 1282 .minimum_version_id = 1, \ 1283 .fields = (VMStateField[]) { \ 1284 VMSTATE_UINT64(phys_addr, VirtIOIOMMUMapping),\ 1285 VMSTATE_UINT32(flags, VirtIOIOMMUMapping), \ 1286 VMSTATE_END_OF_LIST() \ 1287 }, \ 1288 } 1289 1290 static const VMStateDescription vmstate_interval_mapping[2] = { 1291 VMSTATE_MAPPING, /* value */ 1292 VMSTATE_INTERVAL /* key */ 1293 }; 1294 1295 static int domain_preload(void *opaque) 1296 { 1297 VirtIOIOMMUDomain *domain = opaque; 1298 1299 domain->mappings = g_tree_new_full((GCompareDataFunc)interval_cmp, 1300 NULL, g_free, g_free); 1301 return 0; 1302 } 1303 1304 static const VMStateDescription vmstate_endpoint = { 1305 .name = "endpoint", 1306 .version_id = 1, 1307 .minimum_version_id = 1, 1308 .fields = (VMStateField[]) { 1309 VMSTATE_UINT32(id, VirtIOIOMMUEndpoint), 1310 VMSTATE_END_OF_LIST() 1311 } 1312 }; 1313 1314 static const VMStateDescription vmstate_domain = { 1315 .name = "domain", 1316 .version_id = 2, 1317 .minimum_version_id = 2, 1318 .pre_load = domain_preload, 1319 .fields = (VMStateField[]) { 1320 VMSTATE_UINT32(id, VirtIOIOMMUDomain), 1321 VMSTATE_GTREE_V(mappings, VirtIOIOMMUDomain, 1, 1322 vmstate_interval_mapping, 1323 VirtIOIOMMUInterval, VirtIOIOMMUMapping), 1324 VMSTATE_QLIST_V(endpoint_list, VirtIOIOMMUDomain, 1, 1325 vmstate_endpoint, VirtIOIOMMUEndpoint, next), 1326 VMSTATE_BOOL_V(bypass, VirtIOIOMMUDomain, 2), 1327 VMSTATE_END_OF_LIST() 1328 } 1329 }; 1330 1331 static gboolean reconstruct_endpoints(gpointer key, gpointer value, 1332 gpointer data) 1333 { 1334 VirtIOIOMMU *s = (VirtIOIOMMU *)data; 1335 VirtIOIOMMUDomain *d = (VirtIOIOMMUDomain *)value; 1336 VirtIOIOMMUEndpoint *iter; 1337 IOMMUMemoryRegion *mr; 1338 1339 QLIST_FOREACH(iter, &d->endpoint_list, next) { 1340 mr = virtio_iommu_mr(s, iter->id); 1341 assert(mr); 1342 1343 iter->domain = d; 1344 iter->iommu_mr = mr; 1345 g_tree_insert(s->endpoints, GUINT_TO_POINTER(iter->id), iter); 1346 } 1347 return false; /* continue the domain traversal */ 1348 } 1349 1350 static int iommu_post_load(void *opaque, int version_id) 1351 { 1352 VirtIOIOMMU *s = opaque; 1353 1354 g_tree_foreach(s->domains, reconstruct_endpoints, s); 1355 1356 /* 1357 * Memory regions are dynamically turned on/off depending on 1358 * 'config.bypass' and attached domain type if there is. After 1359 * migration, we need to make sure the memory regions are 1360 * still correct. 1361 */ 1362 virtio_iommu_switch_address_space_all(s); 1363 return 0; 1364 } 1365 1366 static const VMStateDescription vmstate_virtio_iommu_device = { 1367 .name = "virtio-iommu-device", 1368 .minimum_version_id = 2, 1369 .version_id = 2, 1370 .post_load = iommu_post_load, 1371 .fields = (VMStateField[]) { 1372 VMSTATE_GTREE_DIRECT_KEY_V(domains, VirtIOIOMMU, 2, 1373 &vmstate_domain, VirtIOIOMMUDomain), 1374 VMSTATE_UINT8_V(config.bypass, VirtIOIOMMU, 2), 1375 VMSTATE_END_OF_LIST() 1376 }, 1377 }; 1378 1379 static const VMStateDescription vmstate_virtio_iommu = { 1380 .name = "virtio-iommu", 1381 .minimum_version_id = 2, 1382 .priority = MIG_PRI_IOMMU, 1383 .version_id = 2, 1384 .fields = (VMStateField[]) { 1385 VMSTATE_VIRTIO_DEVICE, 1386 VMSTATE_END_OF_LIST() 1387 }, 1388 }; 1389 1390 static Property virtio_iommu_properties[] = { 1391 DEFINE_PROP_LINK("primary-bus", VirtIOIOMMU, primary_bus, 1392 TYPE_PCI_BUS, PCIBus *), 1393 DEFINE_PROP_BOOL("boot-bypass", VirtIOIOMMU, boot_bypass, true), 1394 DEFINE_PROP_END_OF_LIST(), 1395 }; 1396 1397 static void virtio_iommu_class_init(ObjectClass *klass, void *data) 1398 { 1399 DeviceClass *dc = DEVICE_CLASS(klass); 1400 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass); 1401 1402 device_class_set_props(dc, virtio_iommu_properties); 1403 dc->vmsd = &vmstate_virtio_iommu; 1404 1405 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1406 vdc->realize = virtio_iommu_device_realize; 1407 vdc->unrealize = virtio_iommu_device_unrealize; 1408 vdc->reset = virtio_iommu_device_reset; 1409 vdc->get_config = virtio_iommu_get_config; 1410 vdc->set_config = virtio_iommu_set_config; 1411 vdc->get_features = virtio_iommu_get_features; 1412 vdc->set_status = virtio_iommu_set_status; 1413 vdc->vmsd = &vmstate_virtio_iommu_device; 1414 } 1415 1416 static void virtio_iommu_memory_region_class_init(ObjectClass *klass, 1417 void *data) 1418 { 1419 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass); 1420 1421 imrc->translate = virtio_iommu_translate; 1422 imrc->replay = virtio_iommu_replay; 1423 imrc->notify_flag_changed = virtio_iommu_notify_flag_changed; 1424 imrc->iommu_set_page_size_mask = virtio_iommu_set_page_size_mask; 1425 } 1426 1427 static const TypeInfo virtio_iommu_info = { 1428 .name = TYPE_VIRTIO_IOMMU, 1429 .parent = TYPE_VIRTIO_DEVICE, 1430 .instance_size = sizeof(VirtIOIOMMU), 1431 .instance_init = virtio_iommu_instance_init, 1432 .class_init = virtio_iommu_class_init, 1433 }; 1434 1435 static const TypeInfo virtio_iommu_memory_region_info = { 1436 .parent = TYPE_IOMMU_MEMORY_REGION, 1437 .name = TYPE_VIRTIO_IOMMU_MEMORY_REGION, 1438 .class_init = virtio_iommu_memory_region_class_init, 1439 }; 1440 1441 static void virtio_register_types(void) 1442 { 1443 type_register_static(&virtio_iommu_info); 1444 type_register_static(&virtio_iommu_memory_region_info); 1445 } 1446 1447 type_init(virtio_register_types) 1448