1 /* 2 * Virtio PCI Bindings 3 * 4 * Copyright IBM, Corp. 2007 5 * Copyright (c) 2009 CodeSourcery 6 * 7 * Authors: 8 * Anthony Liguori <aliguori@us.ibm.com> 9 * Paul Brook <paul@codesourcery.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "standard-headers/linux/virtio_pci.h" 21 #include "hw/virtio/virtio.h" 22 #include "hw/virtio/virtio-blk.h" 23 #include "hw/virtio/virtio-net.h" 24 #include "hw/virtio/virtio-serial.h" 25 #include "hw/virtio/virtio-scsi.h" 26 #include "hw/virtio/virtio-balloon.h" 27 #include "hw/virtio/virtio-input.h" 28 #include "hw/pci/pci.h" 29 #include "qapi/error.h" 30 #include "qemu/error-report.h" 31 #include "hw/pci/msi.h" 32 #include "hw/pci/msix.h" 33 #include "hw/loader.h" 34 #include "sysemu/kvm.h" 35 #include "sysemu/block-backend.h" 36 #include "virtio-pci.h" 37 #include "qemu/range.h" 38 #include "hw/virtio/virtio-bus.h" 39 #include "qapi/visitor.h" 40 41 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) 42 43 #undef VIRTIO_PCI_CONFIG 44 45 /* The remaining space is defined by each driver as the per-driver 46 * configuration space */ 47 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) 48 49 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 50 VirtIOPCIProxy *dev); 51 static void virtio_pci_reset(DeviceState *qdev); 52 53 /* virtio device */ 54 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ 55 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) 56 { 57 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 58 } 59 60 /* DeviceState to VirtIOPCIProxy. Note: used on datapath, 61 * be careful and test performance if you change this. 62 */ 63 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) 64 { 65 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 66 } 67 68 static void virtio_pci_notify(DeviceState *d, uint16_t vector) 69 { 70 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); 71 72 if (msix_enabled(&proxy->pci_dev)) 73 msix_notify(&proxy->pci_dev, vector); 74 else { 75 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 76 pci_set_irq(&proxy->pci_dev, vdev->isr & 1); 77 } 78 } 79 80 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) 81 { 82 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 83 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 84 85 pci_device_save(&proxy->pci_dev, f); 86 msix_save(&proxy->pci_dev, f); 87 if (msix_present(&proxy->pci_dev)) 88 qemu_put_be16(f, vdev->config_vector); 89 } 90 91 static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq, 92 QEMUFile *f) 93 { 94 vq->num = qemu_get_be16(f); 95 vq->enabled = qemu_get_be16(f); 96 vq->desc[0] = qemu_get_be32(f); 97 vq->desc[1] = qemu_get_be32(f); 98 vq->avail[0] = qemu_get_be32(f); 99 vq->avail[1] = qemu_get_be32(f); 100 vq->used[0] = qemu_get_be32(f); 101 vq->used[1] = qemu_get_be32(f); 102 } 103 104 static bool virtio_pci_has_extra_state(DeviceState *d) 105 { 106 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 107 108 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; 109 } 110 111 static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size) 112 { 113 VirtIOPCIProxy *proxy = pv; 114 int i; 115 116 proxy->dfselect = qemu_get_be32(f); 117 proxy->gfselect = qemu_get_be32(f); 118 proxy->guest_features[0] = qemu_get_be32(f); 119 proxy->guest_features[1] = qemu_get_be32(f); 120 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 121 virtio_pci_load_modern_queue_state(&proxy->vqs[i], f); 122 } 123 124 return 0; 125 } 126 127 static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq, 128 QEMUFile *f) 129 { 130 qemu_put_be16(f, vq->num); 131 qemu_put_be16(f, vq->enabled); 132 qemu_put_be32(f, vq->desc[0]); 133 qemu_put_be32(f, vq->desc[1]); 134 qemu_put_be32(f, vq->avail[0]); 135 qemu_put_be32(f, vq->avail[1]); 136 qemu_put_be32(f, vq->used[0]); 137 qemu_put_be32(f, vq->used[1]); 138 } 139 140 static void put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size) 141 { 142 VirtIOPCIProxy *proxy = pv; 143 int i; 144 145 qemu_put_be32(f, proxy->dfselect); 146 qemu_put_be32(f, proxy->gfselect); 147 qemu_put_be32(f, proxy->guest_features[0]); 148 qemu_put_be32(f, proxy->guest_features[1]); 149 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 150 virtio_pci_save_modern_queue_state(&proxy->vqs[i], f); 151 } 152 } 153 154 static const VMStateInfo vmstate_info_virtio_pci_modern_state = { 155 .name = "virtqueue_state", 156 .get = get_virtio_pci_modern_state, 157 .put = put_virtio_pci_modern_state, 158 }; 159 160 static bool virtio_pci_modern_state_needed(void *opaque) 161 { 162 VirtIOPCIProxy *proxy = opaque; 163 164 return !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN); 165 } 166 167 static const VMStateDescription vmstate_virtio_pci_modern_state = { 168 .name = "virtio_pci/modern_state", 169 .version_id = 1, 170 .minimum_version_id = 1, 171 .needed = &virtio_pci_modern_state_needed, 172 .fields = (VMStateField[]) { 173 { 174 .name = "modern_state", 175 .version_id = 0, 176 .field_exists = NULL, 177 .size = 0, 178 .info = &vmstate_info_virtio_pci_modern_state, 179 .flags = VMS_SINGLE, 180 .offset = 0, 181 }, 182 VMSTATE_END_OF_LIST() 183 } 184 }; 185 186 static const VMStateDescription vmstate_virtio_pci = { 187 .name = "virtio_pci", 188 .version_id = 1, 189 .minimum_version_id = 1, 190 .minimum_version_id_old = 1, 191 .fields = (VMStateField[]) { 192 VMSTATE_END_OF_LIST() 193 }, 194 .subsections = (const VMStateDescription*[]) { 195 &vmstate_virtio_pci_modern_state, 196 NULL 197 } 198 }; 199 200 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) 201 { 202 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 203 204 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); 205 } 206 207 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) 208 { 209 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 210 211 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); 212 } 213 214 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) 215 { 216 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 217 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 218 219 if (msix_present(&proxy->pci_dev)) 220 qemu_put_be16(f, virtio_queue_vector(vdev, n)); 221 } 222 223 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) 224 { 225 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 226 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 227 228 int ret; 229 ret = pci_device_load(&proxy->pci_dev, f); 230 if (ret) { 231 return ret; 232 } 233 msix_unuse_all_vectors(&proxy->pci_dev); 234 msix_load(&proxy->pci_dev, f); 235 if (msix_present(&proxy->pci_dev)) { 236 qemu_get_be16s(f, &vdev->config_vector); 237 } else { 238 vdev->config_vector = VIRTIO_NO_VECTOR; 239 } 240 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 241 return msix_vector_use(&proxy->pci_dev, vdev->config_vector); 242 } 243 return 0; 244 } 245 246 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) 247 { 248 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 249 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 250 251 uint16_t vector; 252 if (msix_present(&proxy->pci_dev)) { 253 qemu_get_be16s(f, &vector); 254 } else { 255 vector = VIRTIO_NO_VECTOR; 256 } 257 virtio_queue_set_vector(vdev, n, vector); 258 if (vector != VIRTIO_NO_VECTOR) { 259 return msix_vector_use(&proxy->pci_dev, vector); 260 } 261 262 return 0; 263 } 264 265 static bool virtio_pci_ioeventfd_started(DeviceState *d) 266 { 267 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 268 269 return proxy->ioeventfd_started; 270 } 271 272 static void virtio_pci_ioeventfd_set_started(DeviceState *d, bool started, 273 bool err) 274 { 275 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 276 277 proxy->ioeventfd_started = started; 278 } 279 280 static bool virtio_pci_ioeventfd_disabled(DeviceState *d) 281 { 282 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 283 284 return proxy->ioeventfd_disabled || 285 !(proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD); 286 } 287 288 static void virtio_pci_ioeventfd_set_disabled(DeviceState *d, bool disabled) 289 { 290 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 291 292 proxy->ioeventfd_disabled = disabled; 293 } 294 295 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 296 297 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, 298 int n, bool assign) 299 { 300 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 301 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 302 VirtQueue *vq = virtio_get_queue(vdev, n); 303 bool legacy = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_LEGACY); 304 bool modern = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN); 305 bool fast_mmio = kvm_ioeventfd_any_length_enabled(); 306 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 307 MemoryRegion *modern_mr = &proxy->notify.mr; 308 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; 309 MemoryRegion *legacy_mr = &proxy->bar; 310 hwaddr modern_addr = QEMU_VIRTIO_PCI_QUEUE_MEM_MULT * 311 virtio_get_queue_index(vq); 312 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; 313 314 if (assign) { 315 if (modern) { 316 if (fast_mmio) { 317 memory_region_add_eventfd(modern_mr, modern_addr, 0, 318 false, n, notifier); 319 } else { 320 memory_region_add_eventfd(modern_mr, modern_addr, 2, 321 false, n, notifier); 322 } 323 if (modern_pio) { 324 memory_region_add_eventfd(modern_notify_mr, 0, 2, 325 true, n, notifier); 326 } 327 } 328 if (legacy) { 329 memory_region_add_eventfd(legacy_mr, legacy_addr, 2, 330 true, n, notifier); 331 } 332 } else { 333 if (modern) { 334 if (fast_mmio) { 335 memory_region_del_eventfd(modern_mr, modern_addr, 0, 336 false, n, notifier); 337 } else { 338 memory_region_del_eventfd(modern_mr, modern_addr, 2, 339 false, n, notifier); 340 } 341 if (modern_pio) { 342 memory_region_del_eventfd(modern_notify_mr, 0, 2, 343 true, n, notifier); 344 } 345 } 346 if (legacy) { 347 memory_region_del_eventfd(legacy_mr, legacy_addr, 2, 348 true, n, notifier); 349 } 350 } 351 return 0; 352 } 353 354 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) 355 { 356 virtio_bus_start_ioeventfd(&proxy->bus); 357 } 358 359 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) 360 { 361 virtio_bus_stop_ioeventfd(&proxy->bus); 362 } 363 364 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) 365 { 366 VirtIOPCIProxy *proxy = opaque; 367 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 368 hwaddr pa; 369 370 switch (addr) { 371 case VIRTIO_PCI_GUEST_FEATURES: 372 /* Guest does not negotiate properly? We have to assume nothing. */ 373 if (val & (1 << VIRTIO_F_BAD_FEATURE)) { 374 val = virtio_bus_get_vdev_bad_features(&proxy->bus); 375 } 376 virtio_set_features(vdev, val); 377 break; 378 case VIRTIO_PCI_QUEUE_PFN: 379 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; 380 if (pa == 0) { 381 virtio_pci_reset(DEVICE(proxy)); 382 } 383 else 384 virtio_queue_set_addr(vdev, vdev->queue_sel, pa); 385 break; 386 case VIRTIO_PCI_QUEUE_SEL: 387 if (val < VIRTIO_QUEUE_MAX) 388 vdev->queue_sel = val; 389 break; 390 case VIRTIO_PCI_QUEUE_NOTIFY: 391 if (val < VIRTIO_QUEUE_MAX) { 392 virtio_queue_notify(vdev, val); 393 } 394 break; 395 case VIRTIO_PCI_STATUS: 396 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 397 virtio_pci_stop_ioeventfd(proxy); 398 } 399 400 virtio_set_status(vdev, val & 0xFF); 401 402 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 403 virtio_pci_start_ioeventfd(proxy); 404 } 405 406 if (vdev->status == 0) { 407 virtio_pci_reset(DEVICE(proxy)); 408 } 409 410 /* Linux before 2.6.34 drives the device without enabling 411 the PCI device bus master bit. Enable it automatically 412 for the guest. This is a PCI spec violation but so is 413 initiating DMA with bus master bit clear. */ 414 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { 415 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 416 proxy->pci_dev.config[PCI_COMMAND] | 417 PCI_COMMAND_MASTER, 1); 418 } 419 break; 420 case VIRTIO_MSI_CONFIG_VECTOR: 421 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 422 /* Make it possible for guest to discover an error took place. */ 423 if (msix_vector_use(&proxy->pci_dev, val) < 0) 424 val = VIRTIO_NO_VECTOR; 425 vdev->config_vector = val; 426 break; 427 case VIRTIO_MSI_QUEUE_VECTOR: 428 msix_vector_unuse(&proxy->pci_dev, 429 virtio_queue_vector(vdev, vdev->queue_sel)); 430 /* Make it possible for guest to discover an error took place. */ 431 if (msix_vector_use(&proxy->pci_dev, val) < 0) 432 val = VIRTIO_NO_VECTOR; 433 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 434 break; 435 default: 436 error_report("%s: unexpected address 0x%x value 0x%x", 437 __func__, addr, val); 438 break; 439 } 440 } 441 442 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) 443 { 444 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 445 uint32_t ret = 0xFFFFFFFF; 446 447 switch (addr) { 448 case VIRTIO_PCI_HOST_FEATURES: 449 ret = vdev->host_features; 450 break; 451 case VIRTIO_PCI_GUEST_FEATURES: 452 ret = vdev->guest_features; 453 break; 454 case VIRTIO_PCI_QUEUE_PFN: 455 ret = virtio_queue_get_addr(vdev, vdev->queue_sel) 456 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; 457 break; 458 case VIRTIO_PCI_QUEUE_NUM: 459 ret = virtio_queue_get_num(vdev, vdev->queue_sel); 460 break; 461 case VIRTIO_PCI_QUEUE_SEL: 462 ret = vdev->queue_sel; 463 break; 464 case VIRTIO_PCI_STATUS: 465 ret = vdev->status; 466 break; 467 case VIRTIO_PCI_ISR: 468 /* reading from the ISR also clears it. */ 469 ret = vdev->isr; 470 vdev->isr = 0; 471 pci_irq_deassert(&proxy->pci_dev); 472 break; 473 case VIRTIO_MSI_CONFIG_VECTOR: 474 ret = vdev->config_vector; 475 break; 476 case VIRTIO_MSI_QUEUE_VECTOR: 477 ret = virtio_queue_vector(vdev, vdev->queue_sel); 478 break; 479 default: 480 break; 481 } 482 483 return ret; 484 } 485 486 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, 487 unsigned size) 488 { 489 VirtIOPCIProxy *proxy = opaque; 490 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 491 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 492 uint64_t val = 0; 493 if (addr < config) { 494 return virtio_ioport_read(proxy, addr); 495 } 496 addr -= config; 497 498 switch (size) { 499 case 1: 500 val = virtio_config_readb(vdev, addr); 501 break; 502 case 2: 503 val = virtio_config_readw(vdev, addr); 504 if (virtio_is_big_endian(vdev)) { 505 val = bswap16(val); 506 } 507 break; 508 case 4: 509 val = virtio_config_readl(vdev, addr); 510 if (virtio_is_big_endian(vdev)) { 511 val = bswap32(val); 512 } 513 break; 514 } 515 return val; 516 } 517 518 static void virtio_pci_config_write(void *opaque, hwaddr addr, 519 uint64_t val, unsigned size) 520 { 521 VirtIOPCIProxy *proxy = opaque; 522 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 523 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 524 if (addr < config) { 525 virtio_ioport_write(proxy, addr, val); 526 return; 527 } 528 addr -= config; 529 /* 530 * Virtio-PCI is odd. Ioports are LE but config space is target native 531 * endian. 532 */ 533 switch (size) { 534 case 1: 535 virtio_config_writeb(vdev, addr, val); 536 break; 537 case 2: 538 if (virtio_is_big_endian(vdev)) { 539 val = bswap16(val); 540 } 541 virtio_config_writew(vdev, addr, val); 542 break; 543 case 4: 544 if (virtio_is_big_endian(vdev)) { 545 val = bswap32(val); 546 } 547 virtio_config_writel(vdev, addr, val); 548 break; 549 } 550 } 551 552 static const MemoryRegionOps virtio_pci_config_ops = { 553 .read = virtio_pci_config_read, 554 .write = virtio_pci_config_write, 555 .impl = { 556 .min_access_size = 1, 557 .max_access_size = 4, 558 }, 559 .endianness = DEVICE_LITTLE_ENDIAN, 560 }; 561 562 /* Below are generic functions to do memcpy from/to an address space, 563 * without byteswaps, with input validation. 564 * 565 * As regular address_space_* APIs all do some kind of byteswap at least for 566 * some host/target combinations, we are forced to explicitly convert to a 567 * known-endianness integer value. 568 * It doesn't really matter which endian format to go through, so the code 569 * below selects the endian that causes the least amount of work on the given 570 * host. 571 * 572 * Note: host pointer must be aligned. 573 */ 574 static 575 void virtio_address_space_write(AddressSpace *as, hwaddr addr, 576 const uint8_t *buf, int len) 577 { 578 uint32_t val; 579 580 /* address_space_* APIs assume an aligned address. 581 * As address is under guest control, handle illegal values. 582 */ 583 addr &= ~(len - 1); 584 585 /* Make sure caller aligned buf properly */ 586 assert(!(((uintptr_t)buf) & (len - 1))); 587 588 switch (len) { 589 case 1: 590 val = pci_get_byte(buf); 591 address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); 592 break; 593 case 2: 594 val = pci_get_word(buf); 595 address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); 596 break; 597 case 4: 598 val = pci_get_long(buf); 599 address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); 600 break; 601 default: 602 /* As length is under guest control, handle illegal values. */ 603 break; 604 } 605 } 606 607 static void 608 virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) 609 { 610 uint32_t val; 611 612 /* address_space_* APIs assume an aligned address. 613 * As address is under guest control, handle illegal values. 614 */ 615 addr &= ~(len - 1); 616 617 /* Make sure caller aligned buf properly */ 618 assert(!(((uintptr_t)buf) & (len - 1))); 619 620 switch (len) { 621 case 1: 622 val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); 623 pci_set_byte(buf, val); 624 break; 625 case 2: 626 val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); 627 pci_set_word(buf, val); 628 break; 629 case 4: 630 val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); 631 pci_set_long(buf, val); 632 break; 633 default: 634 /* As length is under guest control, handle illegal values. */ 635 break; 636 } 637 } 638 639 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, 640 uint32_t val, int len) 641 { 642 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); 643 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 644 struct virtio_pci_cfg_cap *cfg; 645 646 pci_default_write_config(pci_dev, address, val, len); 647 648 if (range_covers_byte(address, len, PCI_COMMAND) && 649 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 650 virtio_pci_stop_ioeventfd(proxy); 651 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); 652 } 653 654 if (proxy->config_cap && 655 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 656 pci_cfg_data), 657 sizeof cfg->pci_cfg_data)) { 658 uint32_t off; 659 uint32_t len; 660 661 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 662 off = le32_to_cpu(cfg->cap.offset); 663 len = le32_to_cpu(cfg->cap.length); 664 665 if (len == 1 || len == 2 || len == 4) { 666 assert(len <= sizeof cfg->pci_cfg_data); 667 virtio_address_space_write(&proxy->modern_as, off, 668 cfg->pci_cfg_data, len); 669 } 670 } 671 } 672 673 static uint32_t virtio_read_config(PCIDevice *pci_dev, 674 uint32_t address, int len) 675 { 676 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); 677 struct virtio_pci_cfg_cap *cfg; 678 679 if (proxy->config_cap && 680 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 681 pci_cfg_data), 682 sizeof cfg->pci_cfg_data)) { 683 uint32_t off; 684 uint32_t len; 685 686 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 687 off = le32_to_cpu(cfg->cap.offset); 688 len = le32_to_cpu(cfg->cap.length); 689 690 if (len == 1 || len == 2 || len == 4) { 691 assert(len <= sizeof cfg->pci_cfg_data); 692 virtio_address_space_read(&proxy->modern_as, off, 693 cfg->pci_cfg_data, len); 694 } 695 } 696 697 return pci_default_read_config(pci_dev, address, len); 698 } 699 700 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, 701 unsigned int queue_no, 702 unsigned int vector) 703 { 704 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 705 int ret; 706 707 if (irqfd->users == 0) { 708 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev); 709 if (ret < 0) { 710 return ret; 711 } 712 irqfd->virq = ret; 713 } 714 irqfd->users++; 715 return 0; 716 } 717 718 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, 719 unsigned int vector) 720 { 721 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 722 if (--irqfd->users == 0) { 723 kvm_irqchip_release_virq(kvm_state, irqfd->virq); 724 } 725 } 726 727 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, 728 unsigned int queue_no, 729 unsigned int vector) 730 { 731 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 732 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 733 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 734 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 735 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); 736 } 737 738 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, 739 unsigned int queue_no, 740 unsigned int vector) 741 { 742 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 743 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 744 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 745 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 746 int ret; 747 748 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); 749 assert(ret == 0); 750 } 751 752 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs) 753 { 754 PCIDevice *dev = &proxy->pci_dev; 755 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 756 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 757 unsigned int vector; 758 int ret, queue_no; 759 760 for (queue_no = 0; queue_no < nvqs; queue_no++) { 761 if (!virtio_queue_get_num(vdev, queue_no)) { 762 break; 763 } 764 vector = virtio_queue_vector(vdev, queue_no); 765 if (vector >= msix_nr_vectors_allocated(dev)) { 766 continue; 767 } 768 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector); 769 if (ret < 0) { 770 goto undo; 771 } 772 /* If guest supports masking, set up irqfd now. 773 * Otherwise, delay until unmasked in the frontend. 774 */ 775 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 776 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 777 if (ret < 0) { 778 kvm_virtio_pci_vq_vector_release(proxy, vector); 779 goto undo; 780 } 781 } 782 } 783 return 0; 784 785 undo: 786 while (--queue_no >= 0) { 787 vector = virtio_queue_vector(vdev, queue_no); 788 if (vector >= msix_nr_vectors_allocated(dev)) { 789 continue; 790 } 791 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 792 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 793 } 794 kvm_virtio_pci_vq_vector_release(proxy, vector); 795 } 796 return ret; 797 } 798 799 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs) 800 { 801 PCIDevice *dev = &proxy->pci_dev; 802 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 803 unsigned int vector; 804 int queue_no; 805 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 806 807 for (queue_no = 0; queue_no < nvqs; queue_no++) { 808 if (!virtio_queue_get_num(vdev, queue_no)) { 809 break; 810 } 811 vector = virtio_queue_vector(vdev, queue_no); 812 if (vector >= msix_nr_vectors_allocated(dev)) { 813 continue; 814 } 815 /* If guest supports masking, clean up irqfd now. 816 * Otherwise, it was cleaned when masked in the frontend. 817 */ 818 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 819 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 820 } 821 kvm_virtio_pci_vq_vector_release(proxy, vector); 822 } 823 } 824 825 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy, 826 unsigned int queue_no, 827 unsigned int vector, 828 MSIMessage msg) 829 { 830 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 831 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 832 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 833 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 834 VirtIOIRQFD *irqfd; 835 int ret = 0; 836 837 if (proxy->vector_irqfd) { 838 irqfd = &proxy->vector_irqfd[vector]; 839 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { 840 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, 841 &proxy->pci_dev); 842 if (ret < 0) { 843 return ret; 844 } 845 kvm_irqchip_commit_routes(kvm_state); 846 } 847 } 848 849 /* If guest supports masking, irqfd is already setup, unmask it. 850 * Otherwise, set it up now. 851 */ 852 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 853 k->guest_notifier_mask(vdev, queue_no, false); 854 /* Test after unmasking to avoid losing events. */ 855 if (k->guest_notifier_pending && 856 k->guest_notifier_pending(vdev, queue_no)) { 857 event_notifier_set(n); 858 } 859 } else { 860 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 861 } 862 return ret; 863 } 864 865 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy, 866 unsigned int queue_no, 867 unsigned int vector) 868 { 869 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 870 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 871 872 /* If guest supports masking, keep irqfd but mask it. 873 * Otherwise, clean it up now. 874 */ 875 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 876 k->guest_notifier_mask(vdev, queue_no, true); 877 } else { 878 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 879 } 880 } 881 882 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, 883 MSIMessage msg) 884 { 885 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 886 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 887 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 888 int ret, index, unmasked = 0; 889 890 while (vq) { 891 index = virtio_get_queue_index(vq); 892 if (!virtio_queue_get_num(vdev, index)) { 893 break; 894 } 895 if (index < proxy->nvqs_with_notifiers) { 896 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg); 897 if (ret < 0) { 898 goto undo; 899 } 900 ++unmasked; 901 } 902 vq = virtio_vector_next_queue(vq); 903 } 904 905 return 0; 906 907 undo: 908 vq = virtio_vector_first_queue(vdev, vector); 909 while (vq && unmasked >= 0) { 910 index = virtio_get_queue_index(vq); 911 if (index < proxy->nvqs_with_notifiers) { 912 virtio_pci_vq_vector_mask(proxy, index, vector); 913 --unmasked; 914 } 915 vq = virtio_vector_next_queue(vq); 916 } 917 return ret; 918 } 919 920 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) 921 { 922 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 923 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 924 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 925 int index; 926 927 while (vq) { 928 index = virtio_get_queue_index(vq); 929 if (!virtio_queue_get_num(vdev, index)) { 930 break; 931 } 932 if (index < proxy->nvqs_with_notifiers) { 933 virtio_pci_vq_vector_mask(proxy, index, vector); 934 } 935 vq = virtio_vector_next_queue(vq); 936 } 937 } 938 939 static void virtio_pci_vector_poll(PCIDevice *dev, 940 unsigned int vector_start, 941 unsigned int vector_end) 942 { 943 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 944 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 945 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 946 int queue_no; 947 unsigned int vector; 948 EventNotifier *notifier; 949 VirtQueue *vq; 950 951 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { 952 if (!virtio_queue_get_num(vdev, queue_no)) { 953 break; 954 } 955 vector = virtio_queue_vector(vdev, queue_no); 956 if (vector < vector_start || vector >= vector_end || 957 !msix_is_masked(dev, vector)) { 958 continue; 959 } 960 vq = virtio_get_queue(vdev, queue_no); 961 notifier = virtio_queue_get_guest_notifier(vq); 962 if (k->guest_notifier_pending) { 963 if (k->guest_notifier_pending(vdev, queue_no)) { 964 msix_set_pending(dev, vector); 965 } 966 } else if (event_notifier_test_and_clear(notifier)) { 967 msix_set_pending(dev, vector); 968 } 969 } 970 } 971 972 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, 973 bool with_irqfd) 974 { 975 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 976 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 977 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 978 VirtQueue *vq = virtio_get_queue(vdev, n); 979 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq); 980 981 if (assign) { 982 int r = event_notifier_init(notifier, 0); 983 if (r < 0) { 984 return r; 985 } 986 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd); 987 } else { 988 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd); 989 event_notifier_cleanup(notifier); 990 } 991 992 if (!msix_enabled(&proxy->pci_dev) && 993 vdev->use_guest_notifier_mask && 994 vdc->guest_notifier_mask) { 995 vdc->guest_notifier_mask(vdev, n, !assign); 996 } 997 998 return 0; 999 } 1000 1001 static bool virtio_pci_query_guest_notifiers(DeviceState *d) 1002 { 1003 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1004 return msix_enabled(&proxy->pci_dev); 1005 } 1006 1007 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) 1008 { 1009 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1010 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1011 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 1012 int r, n; 1013 bool with_irqfd = msix_enabled(&proxy->pci_dev) && 1014 kvm_msi_via_irqfd_enabled(); 1015 1016 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); 1017 1018 /* When deassigning, pass a consistent nvqs value 1019 * to avoid leaking notifiers. 1020 */ 1021 assert(assign || nvqs == proxy->nvqs_with_notifiers); 1022 1023 proxy->nvqs_with_notifiers = nvqs; 1024 1025 /* Must unset vector notifier while guest notifier is still assigned */ 1026 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) { 1027 msix_unset_vector_notifiers(&proxy->pci_dev); 1028 if (proxy->vector_irqfd) { 1029 kvm_virtio_pci_vector_release(proxy, nvqs); 1030 g_free(proxy->vector_irqfd); 1031 proxy->vector_irqfd = NULL; 1032 } 1033 } 1034 1035 for (n = 0; n < nvqs; n++) { 1036 if (!virtio_queue_get_num(vdev, n)) { 1037 break; 1038 } 1039 1040 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); 1041 if (r < 0) { 1042 goto assign_error; 1043 } 1044 } 1045 1046 /* Must set vector notifier after guest notifier has been assigned */ 1047 if ((with_irqfd || k->guest_notifier_mask) && assign) { 1048 if (with_irqfd) { 1049 proxy->vector_irqfd = 1050 g_malloc0(sizeof(*proxy->vector_irqfd) * 1051 msix_nr_vectors_allocated(&proxy->pci_dev)); 1052 r = kvm_virtio_pci_vector_use(proxy, nvqs); 1053 if (r < 0) { 1054 goto assign_error; 1055 } 1056 } 1057 r = msix_set_vector_notifiers(&proxy->pci_dev, 1058 virtio_pci_vector_unmask, 1059 virtio_pci_vector_mask, 1060 virtio_pci_vector_poll); 1061 if (r < 0) { 1062 goto notifiers_error; 1063 } 1064 } 1065 1066 return 0; 1067 1068 notifiers_error: 1069 if (with_irqfd) { 1070 assert(assign); 1071 kvm_virtio_pci_vector_release(proxy, nvqs); 1072 } 1073 1074 assign_error: 1075 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ 1076 assert(assign); 1077 while (--n >= 0) { 1078 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); 1079 } 1080 return r; 1081 } 1082 1083 static void virtio_pci_vmstate_change(DeviceState *d, bool running) 1084 { 1085 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1086 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1087 1088 if (running) { 1089 /* Old QEMU versions did not set bus master enable on status write. 1090 * Detect DRIVER set and enable it. 1091 */ 1092 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && 1093 (vdev->status & VIRTIO_CONFIG_S_DRIVER) && 1094 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 1095 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 1096 proxy->pci_dev.config[PCI_COMMAND] | 1097 PCI_COMMAND_MASTER, 1); 1098 } 1099 virtio_pci_start_ioeventfd(proxy); 1100 } else { 1101 virtio_pci_stop_ioeventfd(proxy); 1102 } 1103 } 1104 1105 #ifdef CONFIG_VIRTFS 1106 static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1107 { 1108 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev); 1109 DeviceState *vdev = DEVICE(&dev->vdev); 1110 1111 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1112 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1113 } 1114 1115 static Property virtio_9p_pci_properties[] = { 1116 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 1117 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 1118 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 1119 DEFINE_PROP_END_OF_LIST(), 1120 }; 1121 1122 static void virtio_9p_pci_class_init(ObjectClass *klass, void *data) 1123 { 1124 DeviceClass *dc = DEVICE_CLASS(klass); 1125 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1126 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1127 1128 k->realize = virtio_9p_pci_realize; 1129 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1130 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P; 1131 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 1132 pcidev_k->class_id = 0x2; 1133 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1134 dc->props = virtio_9p_pci_properties; 1135 } 1136 1137 static void virtio_9p_pci_instance_init(Object *obj) 1138 { 1139 V9fsPCIState *dev = VIRTIO_9P_PCI(obj); 1140 1141 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 1142 TYPE_VIRTIO_9P); 1143 } 1144 1145 static const TypeInfo virtio_9p_pci_info = { 1146 .name = TYPE_VIRTIO_9P_PCI, 1147 .parent = TYPE_VIRTIO_PCI, 1148 .instance_size = sizeof(V9fsPCIState), 1149 .instance_init = virtio_9p_pci_instance_init, 1150 .class_init = virtio_9p_pci_class_init, 1151 }; 1152 #endif /* CONFIG_VIRTFS */ 1153 1154 /* 1155 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. 1156 */ 1157 1158 static int virtio_pci_query_nvectors(DeviceState *d) 1159 { 1160 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1161 1162 return proxy->nvectors; 1163 } 1164 1165 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, 1166 struct virtio_pci_cap *cap) 1167 { 1168 PCIDevice *dev = &proxy->pci_dev; 1169 int offset; 1170 1171 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len); 1172 assert(offset > 0); 1173 1174 assert(cap->cap_len >= sizeof *cap); 1175 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, 1176 cap->cap_len - PCI_CAP_FLAGS); 1177 1178 return offset; 1179 } 1180 1181 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, 1182 unsigned size) 1183 { 1184 VirtIOPCIProxy *proxy = opaque; 1185 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1186 uint32_t val = 0; 1187 int i; 1188 1189 switch (addr) { 1190 case VIRTIO_PCI_COMMON_DFSELECT: 1191 val = proxy->dfselect; 1192 break; 1193 case VIRTIO_PCI_COMMON_DF: 1194 if (proxy->dfselect <= 1) { 1195 val = (vdev->host_features & ~VIRTIO_LEGACY_FEATURES) >> 1196 (32 * proxy->dfselect); 1197 } 1198 break; 1199 case VIRTIO_PCI_COMMON_GFSELECT: 1200 val = proxy->gfselect; 1201 break; 1202 case VIRTIO_PCI_COMMON_GF: 1203 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1204 val = proxy->guest_features[proxy->gfselect]; 1205 } 1206 break; 1207 case VIRTIO_PCI_COMMON_MSIX: 1208 val = vdev->config_vector; 1209 break; 1210 case VIRTIO_PCI_COMMON_NUMQ: 1211 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { 1212 if (virtio_queue_get_num(vdev, i)) { 1213 val = i + 1; 1214 } 1215 } 1216 break; 1217 case VIRTIO_PCI_COMMON_STATUS: 1218 val = vdev->status; 1219 break; 1220 case VIRTIO_PCI_COMMON_CFGGENERATION: 1221 val = vdev->generation; 1222 break; 1223 case VIRTIO_PCI_COMMON_Q_SELECT: 1224 val = vdev->queue_sel; 1225 break; 1226 case VIRTIO_PCI_COMMON_Q_SIZE: 1227 val = virtio_queue_get_num(vdev, vdev->queue_sel); 1228 break; 1229 case VIRTIO_PCI_COMMON_Q_MSIX: 1230 val = virtio_queue_vector(vdev, vdev->queue_sel); 1231 break; 1232 case VIRTIO_PCI_COMMON_Q_ENABLE: 1233 val = proxy->vqs[vdev->queue_sel].enabled; 1234 break; 1235 case VIRTIO_PCI_COMMON_Q_NOFF: 1236 /* Simply map queues in order */ 1237 val = vdev->queue_sel; 1238 break; 1239 case VIRTIO_PCI_COMMON_Q_DESCLO: 1240 val = proxy->vqs[vdev->queue_sel].desc[0]; 1241 break; 1242 case VIRTIO_PCI_COMMON_Q_DESCHI: 1243 val = proxy->vqs[vdev->queue_sel].desc[1]; 1244 break; 1245 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1246 val = proxy->vqs[vdev->queue_sel].avail[0]; 1247 break; 1248 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1249 val = proxy->vqs[vdev->queue_sel].avail[1]; 1250 break; 1251 case VIRTIO_PCI_COMMON_Q_USEDLO: 1252 val = proxy->vqs[vdev->queue_sel].used[0]; 1253 break; 1254 case VIRTIO_PCI_COMMON_Q_USEDHI: 1255 val = proxy->vqs[vdev->queue_sel].used[1]; 1256 break; 1257 default: 1258 val = 0; 1259 } 1260 1261 return val; 1262 } 1263 1264 static void virtio_pci_common_write(void *opaque, hwaddr addr, 1265 uint64_t val, unsigned size) 1266 { 1267 VirtIOPCIProxy *proxy = opaque; 1268 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1269 1270 switch (addr) { 1271 case VIRTIO_PCI_COMMON_DFSELECT: 1272 proxy->dfselect = val; 1273 break; 1274 case VIRTIO_PCI_COMMON_GFSELECT: 1275 proxy->gfselect = val; 1276 break; 1277 case VIRTIO_PCI_COMMON_GF: 1278 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1279 proxy->guest_features[proxy->gfselect] = val; 1280 virtio_set_features(vdev, 1281 (((uint64_t)proxy->guest_features[1]) << 32) | 1282 proxy->guest_features[0]); 1283 } 1284 break; 1285 case VIRTIO_PCI_COMMON_MSIX: 1286 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 1287 /* Make it possible for guest to discover an error took place. */ 1288 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1289 val = VIRTIO_NO_VECTOR; 1290 } 1291 vdev->config_vector = val; 1292 break; 1293 case VIRTIO_PCI_COMMON_STATUS: 1294 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 1295 virtio_pci_stop_ioeventfd(proxy); 1296 } 1297 1298 virtio_set_status(vdev, val & 0xFF); 1299 1300 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 1301 virtio_pci_start_ioeventfd(proxy); 1302 } 1303 1304 if (vdev->status == 0) { 1305 virtio_pci_reset(DEVICE(proxy)); 1306 } 1307 1308 break; 1309 case VIRTIO_PCI_COMMON_Q_SELECT: 1310 if (val < VIRTIO_QUEUE_MAX) { 1311 vdev->queue_sel = val; 1312 } 1313 break; 1314 case VIRTIO_PCI_COMMON_Q_SIZE: 1315 proxy->vqs[vdev->queue_sel].num = val; 1316 break; 1317 case VIRTIO_PCI_COMMON_Q_MSIX: 1318 msix_vector_unuse(&proxy->pci_dev, 1319 virtio_queue_vector(vdev, vdev->queue_sel)); 1320 /* Make it possible for guest to discover an error took place. */ 1321 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1322 val = VIRTIO_NO_VECTOR; 1323 } 1324 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 1325 break; 1326 case VIRTIO_PCI_COMMON_Q_ENABLE: 1327 /* TODO: need a way to put num back on reset. */ 1328 virtio_queue_set_num(vdev, vdev->queue_sel, 1329 proxy->vqs[vdev->queue_sel].num); 1330 virtio_queue_set_rings(vdev, vdev->queue_sel, 1331 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | 1332 proxy->vqs[vdev->queue_sel].desc[0], 1333 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | 1334 proxy->vqs[vdev->queue_sel].avail[0], 1335 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | 1336 proxy->vqs[vdev->queue_sel].used[0]); 1337 proxy->vqs[vdev->queue_sel].enabled = 1; 1338 break; 1339 case VIRTIO_PCI_COMMON_Q_DESCLO: 1340 proxy->vqs[vdev->queue_sel].desc[0] = val; 1341 break; 1342 case VIRTIO_PCI_COMMON_Q_DESCHI: 1343 proxy->vqs[vdev->queue_sel].desc[1] = val; 1344 break; 1345 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1346 proxy->vqs[vdev->queue_sel].avail[0] = val; 1347 break; 1348 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1349 proxy->vqs[vdev->queue_sel].avail[1] = val; 1350 break; 1351 case VIRTIO_PCI_COMMON_Q_USEDLO: 1352 proxy->vqs[vdev->queue_sel].used[0] = val; 1353 break; 1354 case VIRTIO_PCI_COMMON_Q_USEDHI: 1355 proxy->vqs[vdev->queue_sel].used[1] = val; 1356 break; 1357 default: 1358 break; 1359 } 1360 } 1361 1362 1363 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, 1364 unsigned size) 1365 { 1366 return 0; 1367 } 1368 1369 static void virtio_pci_notify_write(void *opaque, hwaddr addr, 1370 uint64_t val, unsigned size) 1371 { 1372 VirtIODevice *vdev = opaque; 1373 unsigned queue = addr / QEMU_VIRTIO_PCI_QUEUE_MEM_MULT; 1374 1375 if (queue < VIRTIO_QUEUE_MAX) { 1376 virtio_queue_notify(vdev, queue); 1377 } 1378 } 1379 1380 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, 1381 uint64_t val, unsigned size) 1382 { 1383 VirtIODevice *vdev = opaque; 1384 unsigned queue = val; 1385 1386 if (queue < VIRTIO_QUEUE_MAX) { 1387 virtio_queue_notify(vdev, queue); 1388 } 1389 } 1390 1391 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, 1392 unsigned size) 1393 { 1394 VirtIOPCIProxy *proxy = opaque; 1395 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1396 uint64_t val = vdev->isr; 1397 1398 vdev->isr = 0; 1399 pci_irq_deassert(&proxy->pci_dev); 1400 1401 return val; 1402 } 1403 1404 static void virtio_pci_isr_write(void *opaque, hwaddr addr, 1405 uint64_t val, unsigned size) 1406 { 1407 } 1408 1409 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, 1410 unsigned size) 1411 { 1412 VirtIODevice *vdev = opaque; 1413 uint64_t val = 0; 1414 1415 switch (size) { 1416 case 1: 1417 val = virtio_config_modern_readb(vdev, addr); 1418 break; 1419 case 2: 1420 val = virtio_config_modern_readw(vdev, addr); 1421 break; 1422 case 4: 1423 val = virtio_config_modern_readl(vdev, addr); 1424 break; 1425 } 1426 return val; 1427 } 1428 1429 static void virtio_pci_device_write(void *opaque, hwaddr addr, 1430 uint64_t val, unsigned size) 1431 { 1432 VirtIODevice *vdev = opaque; 1433 switch (size) { 1434 case 1: 1435 virtio_config_modern_writeb(vdev, addr, val); 1436 break; 1437 case 2: 1438 virtio_config_modern_writew(vdev, addr, val); 1439 break; 1440 case 4: 1441 virtio_config_modern_writel(vdev, addr, val); 1442 break; 1443 } 1444 } 1445 1446 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy) 1447 { 1448 static const MemoryRegionOps common_ops = { 1449 .read = virtio_pci_common_read, 1450 .write = virtio_pci_common_write, 1451 .impl = { 1452 .min_access_size = 1, 1453 .max_access_size = 4, 1454 }, 1455 .endianness = DEVICE_LITTLE_ENDIAN, 1456 }; 1457 static const MemoryRegionOps isr_ops = { 1458 .read = virtio_pci_isr_read, 1459 .write = virtio_pci_isr_write, 1460 .impl = { 1461 .min_access_size = 1, 1462 .max_access_size = 4, 1463 }, 1464 .endianness = DEVICE_LITTLE_ENDIAN, 1465 }; 1466 static const MemoryRegionOps device_ops = { 1467 .read = virtio_pci_device_read, 1468 .write = virtio_pci_device_write, 1469 .impl = { 1470 .min_access_size = 1, 1471 .max_access_size = 4, 1472 }, 1473 .endianness = DEVICE_LITTLE_ENDIAN, 1474 }; 1475 static const MemoryRegionOps notify_ops = { 1476 .read = virtio_pci_notify_read, 1477 .write = virtio_pci_notify_write, 1478 .impl = { 1479 .min_access_size = 1, 1480 .max_access_size = 4, 1481 }, 1482 .endianness = DEVICE_LITTLE_ENDIAN, 1483 }; 1484 static const MemoryRegionOps notify_pio_ops = { 1485 .read = virtio_pci_notify_read, 1486 .write = virtio_pci_notify_write_pio, 1487 .impl = { 1488 .min_access_size = 1, 1489 .max_access_size = 4, 1490 }, 1491 .endianness = DEVICE_LITTLE_ENDIAN, 1492 }; 1493 1494 1495 memory_region_init_io(&proxy->common.mr, OBJECT(proxy), 1496 &common_ops, 1497 proxy, 1498 "virtio-pci-common", 1499 proxy->common.size); 1500 1501 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), 1502 &isr_ops, 1503 proxy, 1504 "virtio-pci-isr", 1505 proxy->isr.size); 1506 1507 memory_region_init_io(&proxy->device.mr, OBJECT(proxy), 1508 &device_ops, 1509 virtio_bus_get_device(&proxy->bus), 1510 "virtio-pci-device", 1511 proxy->device.size); 1512 1513 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), 1514 ¬ify_ops, 1515 virtio_bus_get_device(&proxy->bus), 1516 "virtio-pci-notify", 1517 proxy->notify.size); 1518 1519 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), 1520 ¬ify_pio_ops, 1521 virtio_bus_get_device(&proxy->bus), 1522 "virtio-pci-notify-pio", 1523 proxy->notify.size); 1524 } 1525 1526 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, 1527 VirtIOPCIRegion *region, 1528 struct virtio_pci_cap *cap, 1529 MemoryRegion *mr, 1530 uint8_t bar) 1531 { 1532 memory_region_add_subregion(mr, region->offset, ®ion->mr); 1533 1534 cap->cfg_type = region->type; 1535 cap->bar = bar; 1536 cap->offset = cpu_to_le32(region->offset); 1537 cap->length = cpu_to_le32(region->size); 1538 virtio_pci_add_mem_cap(proxy, cap); 1539 1540 } 1541 1542 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, 1543 VirtIOPCIRegion *region, 1544 struct virtio_pci_cap *cap) 1545 { 1546 virtio_pci_modern_region_map(proxy, region, cap, 1547 &proxy->modern_bar, proxy->modern_mem_bar); 1548 } 1549 1550 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, 1551 VirtIOPCIRegion *region, 1552 struct virtio_pci_cap *cap) 1553 { 1554 virtio_pci_modern_region_map(proxy, region, cap, 1555 &proxy->io_bar, proxy->modern_io_bar); 1556 } 1557 1558 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, 1559 VirtIOPCIRegion *region) 1560 { 1561 memory_region_del_subregion(&proxy->modern_bar, 1562 ®ion->mr); 1563 } 1564 1565 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, 1566 VirtIOPCIRegion *region) 1567 { 1568 memory_region_del_subregion(&proxy->io_bar, 1569 ®ion->mr); 1570 } 1571 1572 /* This is called by virtio-bus just after the device is plugged. */ 1573 static void virtio_pci_device_plugged(DeviceState *d, Error **errp) 1574 { 1575 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1576 VirtioBusState *bus = &proxy->bus; 1577 bool legacy = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_LEGACY); 1578 bool modern = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN); 1579 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1580 uint8_t *config; 1581 uint32_t size; 1582 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1583 1584 config = proxy->pci_dev.config; 1585 if (proxy->class_code) { 1586 pci_config_set_class(config, proxy->class_code); 1587 } 1588 1589 if (legacy) { 1590 /* legacy and transitional */ 1591 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID, 1592 pci_get_word(config + PCI_VENDOR_ID)); 1593 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); 1594 } else { 1595 /* pure virtio-1.0 */ 1596 pci_set_word(config + PCI_VENDOR_ID, 1597 PCI_VENDOR_ID_REDHAT_QUMRANET); 1598 pci_set_word(config + PCI_DEVICE_ID, 1599 0x1040 + virtio_bus_get_vdev_id(bus)); 1600 pci_config_set_revision(config, 1); 1601 } 1602 config[PCI_INTERRUPT_PIN] = 1; 1603 1604 1605 if (modern) { 1606 struct virtio_pci_cap cap = { 1607 .cap_len = sizeof cap, 1608 }; 1609 struct virtio_pci_notify_cap notify = { 1610 .cap.cap_len = sizeof notify, 1611 .notify_off_multiplier = 1612 cpu_to_le32(QEMU_VIRTIO_PCI_QUEUE_MEM_MULT), 1613 }; 1614 struct virtio_pci_cfg_cap cfg = { 1615 .cap.cap_len = sizeof cfg, 1616 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, 1617 }; 1618 struct virtio_pci_notify_cap notify_pio = { 1619 .cap.cap_len = sizeof notify, 1620 .notify_off_multiplier = cpu_to_le32(0x0), 1621 }; 1622 1623 struct virtio_pci_cfg_cap *cfg_mask; 1624 1625 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); 1626 virtio_pci_modern_regions_init(proxy); 1627 1628 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); 1629 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); 1630 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); 1631 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); 1632 1633 if (modern_pio) { 1634 memory_region_init(&proxy->io_bar, OBJECT(proxy), 1635 "virtio-pci-io", 0x4); 1636 1637 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar, 1638 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); 1639 1640 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, 1641 ¬ify_pio.cap); 1642 } 1643 1644 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar, 1645 PCI_BASE_ADDRESS_SPACE_MEMORY | 1646 PCI_BASE_ADDRESS_MEM_PREFETCH | 1647 PCI_BASE_ADDRESS_MEM_TYPE_64, 1648 &proxy->modern_bar); 1649 1650 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); 1651 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); 1652 pci_set_byte(&cfg_mask->cap.bar, ~0x0); 1653 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); 1654 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); 1655 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); 1656 } 1657 1658 if (proxy->nvectors) { 1659 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1660 proxy->msix_bar); 1661 if (err) { 1662 /* Notice when a system that supports MSIx can't initialize it. */ 1663 if (err != -ENOTSUP) { 1664 error_report("unable to init msix vectors to %" PRIu32, 1665 proxy->nvectors); 1666 } 1667 proxy->nvectors = 0; 1668 } 1669 } 1670 1671 proxy->pci_dev.config_write = virtio_write_config; 1672 proxy->pci_dev.config_read = virtio_read_config; 1673 1674 if (legacy) { 1675 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) 1676 + virtio_bus_get_vdev_config_len(bus); 1677 size = pow2ceil(size); 1678 1679 memory_region_init_io(&proxy->bar, OBJECT(proxy), 1680 &virtio_pci_config_ops, 1681 proxy, "virtio-pci", size); 1682 1683 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar, 1684 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); 1685 } 1686 1687 if (!kvm_has_many_ioeventfds()) { 1688 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 1689 } 1690 1691 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); 1692 } 1693 1694 static void virtio_pci_device_unplugged(DeviceState *d) 1695 { 1696 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1697 bool modern = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN); 1698 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1699 1700 virtio_pci_stop_ioeventfd(proxy); 1701 1702 if (modern) { 1703 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); 1704 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); 1705 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); 1706 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); 1707 if (modern_pio) { 1708 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); 1709 } 1710 } 1711 } 1712 1713 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 1714 { 1715 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1716 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 1717 1718 /* 1719 * virtio pci bar layout used by default. 1720 * subclasses can re-arrange things if needed. 1721 * 1722 * region 0 -- virtio legacy io bar 1723 * region 1 -- msi-x bar 1724 * region 4+5 -- virtio modern memory (64bit) bar 1725 * 1726 */ 1727 proxy->legacy_io_bar = 0; 1728 proxy->msix_bar = 1; 1729 proxy->modern_io_bar = 2; 1730 proxy->modern_mem_bar = 4; 1731 1732 proxy->common.offset = 0x0; 1733 proxy->common.size = 0x1000; 1734 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; 1735 1736 proxy->isr.offset = 0x1000; 1737 proxy->isr.size = 0x1000; 1738 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; 1739 1740 proxy->device.offset = 0x2000; 1741 proxy->device.size = 0x1000; 1742 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; 1743 1744 proxy->notify.offset = 0x3000; 1745 proxy->notify.size = 1746 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT * VIRTIO_QUEUE_MAX; 1747 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1748 1749 proxy->notify_pio.offset = 0x0; 1750 proxy->notify_pio.size = 0x4; 1751 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1752 1753 /* subclasses can enforce modern, so do this unconditionally */ 1754 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", 1755 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT * 1756 VIRTIO_QUEUE_MAX); 1757 1758 memory_region_init_alias(&proxy->modern_cfg, 1759 OBJECT(proxy), 1760 "virtio-pci-cfg", 1761 &proxy->modern_bar, 1762 0, 1763 memory_region_size(&proxy->modern_bar)); 1764 1765 address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as"); 1766 1767 if (pci_is_express(pci_dev) && pci_bus_is_express(pci_dev->bus) && 1768 !pci_bus_is_root(pci_dev->bus)) { 1769 int pos; 1770 1771 pos = pcie_endpoint_cap_init(pci_dev, 0); 1772 assert(pos > 0); 1773 1774 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); 1775 assert(pos > 0); 1776 1777 /* 1778 * Indicates that this function complies with revision 1.2 of the 1779 * PCI Power Management Interface Specification. 1780 */ 1781 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); 1782 } else { 1783 /* 1784 * make future invocations of pci_is_express() return false 1785 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. 1786 */ 1787 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; 1788 } 1789 1790 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); 1791 if (k->realize) { 1792 k->realize(proxy, errp); 1793 } 1794 } 1795 1796 static void virtio_pci_exit(PCIDevice *pci_dev) 1797 { 1798 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1799 1800 msix_uninit_exclusive_bar(pci_dev); 1801 address_space_destroy(&proxy->modern_as); 1802 } 1803 1804 static void virtio_pci_reset(DeviceState *qdev) 1805 { 1806 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1807 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); 1808 int i; 1809 1810 virtio_pci_stop_ioeventfd(proxy); 1811 virtio_bus_reset(bus); 1812 msix_unuse_all_vectors(&proxy->pci_dev); 1813 1814 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 1815 proxy->vqs[i].enabled = 0; 1816 } 1817 } 1818 1819 static Property virtio_pci_properties[] = { 1820 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, 1821 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), 1822 DEFINE_PROP_BIT("disable-legacy", VirtIOPCIProxy, flags, 1823 VIRTIO_PCI_FLAG_DISABLE_LEGACY_BIT, false), 1824 DEFINE_PROP_BIT("disable-modern", VirtIOPCIProxy, flags, 1825 VIRTIO_PCI_FLAG_DISABLE_MODERN_BIT, true), 1826 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, 1827 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), 1828 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, 1829 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), 1830 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, 1831 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), 1832 DEFINE_PROP_END_OF_LIST(), 1833 }; 1834 1835 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) 1836 { 1837 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); 1838 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1839 PCIDevice *pci_dev = &proxy->pci_dev; 1840 1841 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && 1842 !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN)) { 1843 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 1844 } 1845 1846 vpciklass->parent_dc_realize(qdev, errp); 1847 } 1848 1849 static void virtio_pci_class_init(ObjectClass *klass, void *data) 1850 { 1851 DeviceClass *dc = DEVICE_CLASS(klass); 1852 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1853 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 1854 1855 dc->props = virtio_pci_properties; 1856 k->realize = virtio_pci_realize; 1857 k->exit = virtio_pci_exit; 1858 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1859 k->revision = VIRTIO_PCI_ABI_VERSION; 1860 k->class_id = PCI_CLASS_OTHERS; 1861 vpciklass->parent_dc_realize = dc->realize; 1862 dc->realize = virtio_pci_dc_realize; 1863 dc->reset = virtio_pci_reset; 1864 } 1865 1866 static const TypeInfo virtio_pci_info = { 1867 .name = TYPE_VIRTIO_PCI, 1868 .parent = TYPE_PCI_DEVICE, 1869 .instance_size = sizeof(VirtIOPCIProxy), 1870 .class_init = virtio_pci_class_init, 1871 .class_size = sizeof(VirtioPCIClass), 1872 .abstract = true, 1873 }; 1874 1875 /* virtio-blk-pci */ 1876 1877 static Property virtio_blk_pci_properties[] = { 1878 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), 1879 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 1880 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 1881 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 1882 DEFINE_PROP_END_OF_LIST(), 1883 }; 1884 1885 static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1886 { 1887 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev); 1888 DeviceState *vdev = DEVICE(&dev->vdev); 1889 1890 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1891 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1892 } 1893 1894 static void virtio_blk_pci_class_init(ObjectClass *klass, void *data) 1895 { 1896 DeviceClass *dc = DEVICE_CLASS(klass); 1897 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1898 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1899 1900 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1901 dc->props = virtio_blk_pci_properties; 1902 k->realize = virtio_blk_pci_realize; 1903 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1904 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK; 1905 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 1906 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; 1907 } 1908 1909 static void virtio_blk_pci_instance_init(Object *obj) 1910 { 1911 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj); 1912 1913 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 1914 TYPE_VIRTIO_BLK); 1915 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread", 1916 &error_abort); 1917 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), 1918 "bootindex", &error_abort); 1919 } 1920 1921 static const TypeInfo virtio_blk_pci_info = { 1922 .name = TYPE_VIRTIO_BLK_PCI, 1923 .parent = TYPE_VIRTIO_PCI, 1924 .instance_size = sizeof(VirtIOBlkPCI), 1925 .instance_init = virtio_blk_pci_instance_init, 1926 .class_init = virtio_blk_pci_class_init, 1927 }; 1928 1929 /* virtio-scsi-pci */ 1930 1931 static Property virtio_scsi_pci_properties[] = { 1932 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 1933 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 1934 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 1935 DEV_NVECTORS_UNSPECIFIED), 1936 DEFINE_PROP_END_OF_LIST(), 1937 }; 1938 1939 static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1940 { 1941 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev); 1942 DeviceState *vdev = DEVICE(&dev->vdev); 1943 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev); 1944 DeviceState *proxy = DEVICE(vpci_dev); 1945 char *bus_name; 1946 1947 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { 1948 vpci_dev->nvectors = vs->conf.num_queues + 3; 1949 } 1950 1951 /* 1952 * For command line compatibility, this sets the virtio-scsi-device bus 1953 * name as before. 1954 */ 1955 if (proxy->id) { 1956 bus_name = g_strdup_printf("%s.0", proxy->id); 1957 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name); 1958 g_free(bus_name); 1959 } 1960 1961 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1962 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1963 } 1964 1965 static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data) 1966 { 1967 DeviceClass *dc = DEVICE_CLASS(klass); 1968 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1969 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1970 1971 k->realize = virtio_scsi_pci_realize; 1972 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1973 dc->props = virtio_scsi_pci_properties; 1974 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1975 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI; 1976 pcidev_k->revision = 0x00; 1977 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; 1978 } 1979 1980 static void virtio_scsi_pci_instance_init(Object *obj) 1981 { 1982 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj); 1983 1984 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 1985 TYPE_VIRTIO_SCSI); 1986 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread", 1987 &error_abort); 1988 } 1989 1990 static const TypeInfo virtio_scsi_pci_info = { 1991 .name = TYPE_VIRTIO_SCSI_PCI, 1992 .parent = TYPE_VIRTIO_PCI, 1993 .instance_size = sizeof(VirtIOSCSIPCI), 1994 .instance_init = virtio_scsi_pci_instance_init, 1995 .class_init = virtio_scsi_pci_class_init, 1996 }; 1997 1998 /* vhost-scsi-pci */ 1999 2000 #ifdef CONFIG_VHOST_SCSI 2001 static Property vhost_scsi_pci_properties[] = { 2002 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2003 DEV_NVECTORS_UNSPECIFIED), 2004 DEFINE_PROP_END_OF_LIST(), 2005 }; 2006 2007 static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2008 { 2009 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev); 2010 DeviceState *vdev = DEVICE(&dev->vdev); 2011 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev); 2012 2013 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { 2014 vpci_dev->nvectors = vs->conf.num_queues + 3; 2015 } 2016 2017 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2018 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2019 } 2020 2021 static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data) 2022 { 2023 DeviceClass *dc = DEVICE_CLASS(klass); 2024 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2025 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2026 k->realize = vhost_scsi_pci_realize; 2027 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2028 dc->props = vhost_scsi_pci_properties; 2029 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2030 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI; 2031 pcidev_k->revision = 0x00; 2032 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; 2033 } 2034 2035 static void vhost_scsi_pci_instance_init(Object *obj) 2036 { 2037 VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj); 2038 2039 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2040 TYPE_VHOST_SCSI); 2041 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), 2042 "bootindex", &error_abort); 2043 } 2044 2045 static const TypeInfo vhost_scsi_pci_info = { 2046 .name = TYPE_VHOST_SCSI_PCI, 2047 .parent = TYPE_VIRTIO_PCI, 2048 .instance_size = sizeof(VHostSCSIPCI), 2049 .instance_init = vhost_scsi_pci_instance_init, 2050 .class_init = vhost_scsi_pci_class_init, 2051 }; 2052 #endif 2053 2054 /* virtio-balloon-pci */ 2055 2056 static Property virtio_balloon_pci_properties[] = { 2057 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), 2058 DEFINE_PROP_END_OF_LIST(), 2059 }; 2060 2061 static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2062 { 2063 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev); 2064 DeviceState *vdev = DEVICE(&dev->vdev); 2065 2066 if (vpci_dev->class_code != PCI_CLASS_OTHERS && 2067 vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */ 2068 vpci_dev->class_code = PCI_CLASS_OTHERS; 2069 } 2070 2071 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2072 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2073 } 2074 2075 static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data) 2076 { 2077 DeviceClass *dc = DEVICE_CLASS(klass); 2078 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2079 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2080 k->realize = virtio_balloon_pci_realize; 2081 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 2082 dc->props = virtio_balloon_pci_properties; 2083 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2084 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON; 2085 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 2086 pcidev_k->class_id = PCI_CLASS_OTHERS; 2087 } 2088 2089 static void virtio_balloon_pci_instance_init(Object *obj) 2090 { 2091 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj); 2092 2093 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2094 TYPE_VIRTIO_BALLOON); 2095 object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev), 2096 "guest-stats", &error_abort); 2097 object_property_add_alias(obj, "guest-stats-polling-interval", 2098 OBJECT(&dev->vdev), 2099 "guest-stats-polling-interval", &error_abort); 2100 } 2101 2102 static const TypeInfo virtio_balloon_pci_info = { 2103 .name = TYPE_VIRTIO_BALLOON_PCI, 2104 .parent = TYPE_VIRTIO_PCI, 2105 .instance_size = sizeof(VirtIOBalloonPCI), 2106 .instance_init = virtio_balloon_pci_instance_init, 2107 .class_init = virtio_balloon_pci_class_init, 2108 }; 2109 2110 /* virtio-serial-pci */ 2111 2112 static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2113 { 2114 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev); 2115 DeviceState *vdev = DEVICE(&dev->vdev); 2116 DeviceState *proxy = DEVICE(vpci_dev); 2117 char *bus_name; 2118 2119 if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER && 2120 vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */ 2121 vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */ 2122 vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER; 2123 } 2124 2125 /* backwards-compatibility with machines that were created with 2126 DEV_NVECTORS_UNSPECIFIED */ 2127 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { 2128 vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1; 2129 } 2130 2131 /* 2132 * For command line compatibility, this sets the virtio-serial-device bus 2133 * name as before. 2134 */ 2135 if (proxy->id) { 2136 bus_name = g_strdup_printf("%s.0", proxy->id); 2137 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name); 2138 g_free(bus_name); 2139 } 2140 2141 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2142 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2143 } 2144 2145 static Property virtio_serial_pci_properties[] = { 2146 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 2147 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 2148 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 2149 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), 2150 DEFINE_PROP_END_OF_LIST(), 2151 }; 2152 2153 static void virtio_serial_pci_class_init(ObjectClass *klass, void *data) 2154 { 2155 DeviceClass *dc = DEVICE_CLASS(klass); 2156 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2157 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2158 k->realize = virtio_serial_pci_realize; 2159 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); 2160 dc->props = virtio_serial_pci_properties; 2161 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2162 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE; 2163 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 2164 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER; 2165 } 2166 2167 static void virtio_serial_pci_instance_init(Object *obj) 2168 { 2169 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj); 2170 2171 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2172 TYPE_VIRTIO_SERIAL); 2173 } 2174 2175 static const TypeInfo virtio_serial_pci_info = { 2176 .name = TYPE_VIRTIO_SERIAL_PCI, 2177 .parent = TYPE_VIRTIO_PCI, 2178 .instance_size = sizeof(VirtIOSerialPCI), 2179 .instance_init = virtio_serial_pci_instance_init, 2180 .class_init = virtio_serial_pci_class_init, 2181 }; 2182 2183 /* virtio-net-pci */ 2184 2185 static Property virtio_net_properties[] = { 2186 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 2187 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), 2188 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), 2189 DEFINE_PROP_END_OF_LIST(), 2190 }; 2191 2192 static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2193 { 2194 DeviceState *qdev = DEVICE(vpci_dev); 2195 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev); 2196 DeviceState *vdev = DEVICE(&dev->vdev); 2197 2198 virtio_net_set_netclient_name(&dev->vdev, qdev->id, 2199 object_get_typename(OBJECT(qdev))); 2200 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2201 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2202 } 2203 2204 static void virtio_net_pci_class_init(ObjectClass *klass, void *data) 2205 { 2206 DeviceClass *dc = DEVICE_CLASS(klass); 2207 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2208 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 2209 2210 k->romfile = "efi-virtio.rom"; 2211 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2212 k->device_id = PCI_DEVICE_ID_VIRTIO_NET; 2213 k->revision = VIRTIO_PCI_ABI_VERSION; 2214 k->class_id = PCI_CLASS_NETWORK_ETHERNET; 2215 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); 2216 dc->props = virtio_net_properties; 2217 vpciklass->realize = virtio_net_pci_realize; 2218 } 2219 2220 static void virtio_net_pci_instance_init(Object *obj) 2221 { 2222 VirtIONetPCI *dev = VIRTIO_NET_PCI(obj); 2223 2224 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2225 TYPE_VIRTIO_NET); 2226 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), 2227 "bootindex", &error_abort); 2228 } 2229 2230 static const TypeInfo virtio_net_pci_info = { 2231 .name = TYPE_VIRTIO_NET_PCI, 2232 .parent = TYPE_VIRTIO_PCI, 2233 .instance_size = sizeof(VirtIONetPCI), 2234 .instance_init = virtio_net_pci_instance_init, 2235 .class_init = virtio_net_pci_class_init, 2236 }; 2237 2238 /* virtio-rng-pci */ 2239 2240 static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2241 { 2242 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev); 2243 DeviceState *vdev = DEVICE(&vrng->vdev); 2244 Error *err = NULL; 2245 2246 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2247 object_property_set_bool(OBJECT(vdev), true, "realized", &err); 2248 if (err) { 2249 error_propagate(errp, err); 2250 return; 2251 } 2252 2253 object_property_set_link(OBJECT(vrng), 2254 OBJECT(vrng->vdev.conf.rng), "rng", 2255 NULL); 2256 } 2257 2258 static void virtio_rng_pci_class_init(ObjectClass *klass, void *data) 2259 { 2260 DeviceClass *dc = DEVICE_CLASS(klass); 2261 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2262 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2263 2264 k->realize = virtio_rng_pci_realize; 2265 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 2266 2267 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2268 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG; 2269 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 2270 pcidev_k->class_id = PCI_CLASS_OTHERS; 2271 } 2272 2273 static void virtio_rng_initfn(Object *obj) 2274 { 2275 VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj); 2276 2277 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2278 TYPE_VIRTIO_RNG); 2279 object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng", 2280 &error_abort); 2281 } 2282 2283 static const TypeInfo virtio_rng_pci_info = { 2284 .name = TYPE_VIRTIO_RNG_PCI, 2285 .parent = TYPE_VIRTIO_PCI, 2286 .instance_size = sizeof(VirtIORngPCI), 2287 .instance_init = virtio_rng_initfn, 2288 .class_init = virtio_rng_pci_class_init, 2289 }; 2290 2291 /* virtio-input-pci */ 2292 2293 static Property virtio_input_pci_properties[] = { 2294 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 2295 DEFINE_PROP_END_OF_LIST(), 2296 }; 2297 2298 static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2299 { 2300 VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev); 2301 DeviceState *vdev = DEVICE(&vinput->vdev); 2302 2303 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2304 /* force virtio-1.0 */ 2305 vpci_dev->flags &= ~VIRTIO_PCI_FLAG_DISABLE_MODERN; 2306 vpci_dev->flags |= VIRTIO_PCI_FLAG_DISABLE_LEGACY; 2307 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2308 } 2309 2310 static void virtio_input_pci_class_init(ObjectClass *klass, void *data) 2311 { 2312 DeviceClass *dc = DEVICE_CLASS(klass); 2313 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2314 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2315 2316 dc->props = virtio_input_pci_properties; 2317 k->realize = virtio_input_pci_realize; 2318 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); 2319 2320 pcidev_k->class_id = PCI_CLASS_INPUT_OTHER; 2321 } 2322 2323 static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data) 2324 { 2325 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2326 2327 pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD; 2328 } 2329 2330 static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass, 2331 void *data) 2332 { 2333 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2334 2335 pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE; 2336 } 2337 2338 static void virtio_keyboard_initfn(Object *obj) 2339 { 2340 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); 2341 2342 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2343 TYPE_VIRTIO_KEYBOARD); 2344 } 2345 2346 static void virtio_mouse_initfn(Object *obj) 2347 { 2348 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); 2349 2350 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2351 TYPE_VIRTIO_MOUSE); 2352 } 2353 2354 static void virtio_tablet_initfn(Object *obj) 2355 { 2356 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); 2357 2358 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2359 TYPE_VIRTIO_TABLET); 2360 } 2361 2362 static const TypeInfo virtio_input_pci_info = { 2363 .name = TYPE_VIRTIO_INPUT_PCI, 2364 .parent = TYPE_VIRTIO_PCI, 2365 .instance_size = sizeof(VirtIOInputPCI), 2366 .class_init = virtio_input_pci_class_init, 2367 .abstract = true, 2368 }; 2369 2370 static const TypeInfo virtio_input_hid_pci_info = { 2371 .name = TYPE_VIRTIO_INPUT_HID_PCI, 2372 .parent = TYPE_VIRTIO_INPUT_PCI, 2373 .instance_size = sizeof(VirtIOInputHIDPCI), 2374 .abstract = true, 2375 }; 2376 2377 static const TypeInfo virtio_keyboard_pci_info = { 2378 .name = TYPE_VIRTIO_KEYBOARD_PCI, 2379 .parent = TYPE_VIRTIO_INPUT_HID_PCI, 2380 .class_init = virtio_input_hid_kbd_pci_class_init, 2381 .instance_size = sizeof(VirtIOInputHIDPCI), 2382 .instance_init = virtio_keyboard_initfn, 2383 }; 2384 2385 static const TypeInfo virtio_mouse_pci_info = { 2386 .name = TYPE_VIRTIO_MOUSE_PCI, 2387 .parent = TYPE_VIRTIO_INPUT_HID_PCI, 2388 .class_init = virtio_input_hid_mouse_pci_class_init, 2389 .instance_size = sizeof(VirtIOInputHIDPCI), 2390 .instance_init = virtio_mouse_initfn, 2391 }; 2392 2393 static const TypeInfo virtio_tablet_pci_info = { 2394 .name = TYPE_VIRTIO_TABLET_PCI, 2395 .parent = TYPE_VIRTIO_INPUT_HID_PCI, 2396 .instance_size = sizeof(VirtIOInputHIDPCI), 2397 .instance_init = virtio_tablet_initfn, 2398 }; 2399 2400 #ifdef CONFIG_LINUX 2401 static void virtio_host_initfn(Object *obj) 2402 { 2403 VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj); 2404 2405 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2406 TYPE_VIRTIO_INPUT_HOST); 2407 } 2408 2409 static const TypeInfo virtio_host_pci_info = { 2410 .name = TYPE_VIRTIO_INPUT_HOST_PCI, 2411 .parent = TYPE_VIRTIO_INPUT_PCI, 2412 .instance_size = sizeof(VirtIOInputHostPCI), 2413 .instance_init = virtio_host_initfn, 2414 }; 2415 #endif 2416 2417 /* virtio-pci-bus */ 2418 2419 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 2420 VirtIOPCIProxy *dev) 2421 { 2422 DeviceState *qdev = DEVICE(dev); 2423 char virtio_bus_name[] = "virtio-bus"; 2424 2425 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, 2426 virtio_bus_name); 2427 } 2428 2429 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) 2430 { 2431 BusClass *bus_class = BUS_CLASS(klass); 2432 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); 2433 bus_class->max_dev = 1; 2434 k->notify = virtio_pci_notify; 2435 k->save_config = virtio_pci_save_config; 2436 k->load_config = virtio_pci_load_config; 2437 k->save_queue = virtio_pci_save_queue; 2438 k->load_queue = virtio_pci_load_queue; 2439 k->save_extra_state = virtio_pci_save_extra_state; 2440 k->load_extra_state = virtio_pci_load_extra_state; 2441 k->has_extra_state = virtio_pci_has_extra_state; 2442 k->query_guest_notifiers = virtio_pci_query_guest_notifiers; 2443 k->set_guest_notifiers = virtio_pci_set_guest_notifiers; 2444 k->vmstate_change = virtio_pci_vmstate_change; 2445 k->device_plugged = virtio_pci_device_plugged; 2446 k->device_unplugged = virtio_pci_device_unplugged; 2447 k->query_nvectors = virtio_pci_query_nvectors; 2448 k->ioeventfd_started = virtio_pci_ioeventfd_started; 2449 k->ioeventfd_set_started = virtio_pci_ioeventfd_set_started; 2450 k->ioeventfd_disabled = virtio_pci_ioeventfd_disabled; 2451 k->ioeventfd_set_disabled = virtio_pci_ioeventfd_set_disabled; 2452 k->ioeventfd_assign = virtio_pci_ioeventfd_assign; 2453 } 2454 2455 static const TypeInfo virtio_pci_bus_info = { 2456 .name = TYPE_VIRTIO_PCI_BUS, 2457 .parent = TYPE_VIRTIO_BUS, 2458 .instance_size = sizeof(VirtioPCIBusState), 2459 .class_init = virtio_pci_bus_class_init, 2460 }; 2461 2462 static void virtio_pci_register_types(void) 2463 { 2464 type_register_static(&virtio_rng_pci_info); 2465 type_register_static(&virtio_input_pci_info); 2466 type_register_static(&virtio_input_hid_pci_info); 2467 type_register_static(&virtio_keyboard_pci_info); 2468 type_register_static(&virtio_mouse_pci_info); 2469 type_register_static(&virtio_tablet_pci_info); 2470 #ifdef CONFIG_LINUX 2471 type_register_static(&virtio_host_pci_info); 2472 #endif 2473 type_register_static(&virtio_pci_bus_info); 2474 type_register_static(&virtio_pci_info); 2475 #ifdef CONFIG_VIRTFS 2476 type_register_static(&virtio_9p_pci_info); 2477 #endif 2478 type_register_static(&virtio_blk_pci_info); 2479 type_register_static(&virtio_scsi_pci_info); 2480 type_register_static(&virtio_balloon_pci_info); 2481 type_register_static(&virtio_serial_pci_info); 2482 type_register_static(&virtio_net_pci_info); 2483 #ifdef CONFIG_VHOST_SCSI 2484 type_register_static(&vhost_scsi_pci_info); 2485 #endif 2486 } 2487 2488 type_init(virtio_pci_register_types) 2489