1 /* 2 * Copyright (c) 2007, Neocleus Corporation. 3 * Copyright (c) 2007, Intel Corporation. 4 * 5 * This work is licensed under the terms of the GNU GPL, version 2. See 6 * the COPYING file in the top-level directory. 7 * 8 * Alex Novik <alex@neocleus.com> 9 * Allen Kay <allen.m.kay@intel.com> 10 * Guy Zana <guy@neocleus.com> 11 * 12 * This file implements direct PCI assignment to a HVM guest 13 */ 14 15 /* 16 * Interrupt Disable policy: 17 * 18 * INTx interrupt: 19 * Initialize(register_real_device) 20 * Map INTx(xc_physdev_map_pirq): 21 * <fail> 22 * - Set real Interrupt Disable bit to '1'. 23 * - Set machine_irq and assigned_device->machine_irq to '0'. 24 * * Don't bind INTx. 25 * 26 * Bind INTx(xc_domain_bind_pt_pci_irq): 27 * <fail> 28 * - Set real Interrupt Disable bit to '1'. 29 * - Unmap INTx. 30 * - Decrement xen_pt_mapped_machine_irq[machine_irq] 31 * - Set assigned_device->machine_irq to '0'. 32 * 33 * Write to Interrupt Disable bit by guest software(xen_pt_cmd_reg_write) 34 * Write '0' 35 * - Set real bit to '0' if assigned_device->machine_irq isn't '0'. 36 * 37 * Write '1' 38 * - Set real bit to '1'. 39 * 40 * MSI interrupt: 41 * Initialize MSI register(xen_pt_msi_setup, xen_pt_msi_update) 42 * Bind MSI(xc_domain_update_msi_irq) 43 * <fail> 44 * - Unmap MSI. 45 * - Set dev->msi->pirq to '-1'. 46 * 47 * MSI-X interrupt: 48 * Initialize MSI-X register(xen_pt_msix_update_one) 49 * Bind MSI-X(xc_domain_update_msi_irq) 50 * <fail> 51 * - Unmap MSI-X. 52 * - Set entry->pirq to '-1'. 53 */ 54 55 #include <sys/ioctl.h> 56 57 #include "hw/pci/pci.h" 58 #include "hw/xen/xen.h" 59 #include "hw/xen/xen_backend.h" 60 #include "xen_pt.h" 61 #include "qemu/range.h" 62 #include "exec/address-spaces.h" 63 64 #define XEN_PT_NR_IRQS (256) 65 static uint8_t xen_pt_mapped_machine_irq[XEN_PT_NR_IRQS] = {0}; 66 67 void xen_pt_log(const PCIDevice *d, const char *f, ...) 68 { 69 va_list ap; 70 71 va_start(ap, f); 72 if (d) { 73 fprintf(stderr, "[%02x:%02x.%d] ", pci_bus_num(d->bus), 74 PCI_SLOT(d->devfn), PCI_FUNC(d->devfn)); 75 } 76 vfprintf(stderr, f, ap); 77 va_end(ap); 78 } 79 80 /* Config Space */ 81 82 static int xen_pt_pci_config_access_check(PCIDevice *d, uint32_t addr, int len) 83 { 84 /* check offset range */ 85 if (addr >= 0xFF) { 86 XEN_PT_ERR(d, "Failed to access register with offset exceeding 0xFF. " 87 "(addr: 0x%02x, len: %d)\n", addr, len); 88 return -1; 89 } 90 91 /* check read size */ 92 if ((len != 1) && (len != 2) && (len != 4)) { 93 XEN_PT_ERR(d, "Failed to access register with invalid access length. " 94 "(addr: 0x%02x, len: %d)\n", addr, len); 95 return -1; 96 } 97 98 /* check offset alignment */ 99 if (addr & (len - 1)) { 100 XEN_PT_ERR(d, "Failed to access register with invalid access size " 101 "alignment. (addr: 0x%02x, len: %d)\n", addr, len); 102 return -1; 103 } 104 105 return 0; 106 } 107 108 int xen_pt_bar_offset_to_index(uint32_t offset) 109 { 110 int index = 0; 111 112 /* check Exp ROM BAR */ 113 if (offset == PCI_ROM_ADDRESS) { 114 return PCI_ROM_SLOT; 115 } 116 117 /* calculate BAR index */ 118 index = (offset - PCI_BASE_ADDRESS_0) >> 2; 119 if (index >= PCI_NUM_REGIONS) { 120 return -1; 121 } 122 123 return index; 124 } 125 126 static uint32_t xen_pt_pci_read_config(PCIDevice *d, uint32_t addr, int len) 127 { 128 XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d); 129 uint32_t val = 0; 130 XenPTRegGroup *reg_grp_entry = NULL; 131 XenPTReg *reg_entry = NULL; 132 int rc = 0; 133 int emul_len = 0; 134 uint32_t find_addr = addr; 135 136 if (xen_pt_pci_config_access_check(d, addr, len)) { 137 goto exit; 138 } 139 140 /* find register group entry */ 141 reg_grp_entry = xen_pt_find_reg_grp(s, addr); 142 if (reg_grp_entry) { 143 /* check 0-Hardwired register group */ 144 if (reg_grp_entry->reg_grp->grp_type == XEN_PT_GRP_TYPE_HARDWIRED) { 145 /* no need to emulate, just return 0 */ 146 val = 0; 147 goto exit; 148 } 149 } 150 151 /* read I/O device register value */ 152 rc = xen_host_pci_get_block(&s->real_device, addr, (uint8_t *)&val, len); 153 if (rc < 0) { 154 XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc); 155 memset(&val, 0xff, len); 156 } 157 158 /* just return the I/O device register value for 159 * passthrough type register group */ 160 if (reg_grp_entry == NULL) { 161 goto exit; 162 } 163 164 /* adjust the read value to appropriate CFC-CFF window */ 165 val <<= (addr & 3) << 3; 166 emul_len = len; 167 168 /* loop around the guest requested size */ 169 while (emul_len > 0) { 170 /* find register entry to be emulated */ 171 reg_entry = xen_pt_find_reg(reg_grp_entry, find_addr); 172 if (reg_entry) { 173 XenPTRegInfo *reg = reg_entry->reg; 174 uint32_t real_offset = reg_grp_entry->base_offset + reg->offset; 175 uint32_t valid_mask = 0xFFFFFFFF >> ((4 - emul_len) << 3); 176 uint8_t *ptr_val = NULL; 177 178 valid_mask <<= (find_addr - real_offset) << 3; 179 ptr_val = (uint8_t *)&val + (real_offset & 3); 180 181 /* do emulation based on register size */ 182 switch (reg->size) { 183 case 1: 184 if (reg->u.b.read) { 185 rc = reg->u.b.read(s, reg_entry, ptr_val, valid_mask); 186 } 187 break; 188 case 2: 189 if (reg->u.w.read) { 190 rc = reg->u.w.read(s, reg_entry, 191 (uint16_t *)ptr_val, valid_mask); 192 } 193 break; 194 case 4: 195 if (reg->u.dw.read) { 196 rc = reg->u.dw.read(s, reg_entry, 197 (uint32_t *)ptr_val, valid_mask); 198 } 199 break; 200 } 201 202 if (rc < 0) { 203 xen_shutdown_fatal_error("Internal error: Invalid read " 204 "emulation. (%s, rc: %d)\n", 205 __func__, rc); 206 return 0; 207 } 208 209 /* calculate next address to find */ 210 emul_len -= reg->size; 211 if (emul_len > 0) { 212 find_addr = real_offset + reg->size; 213 } 214 } else { 215 /* nothing to do with passthrough type register, 216 * continue to find next byte */ 217 emul_len--; 218 find_addr++; 219 } 220 } 221 222 /* need to shift back before returning them to pci bus emulator */ 223 val >>= ((addr & 3) << 3); 224 225 exit: 226 XEN_PT_LOG_CONFIG(d, addr, val, len); 227 return val; 228 } 229 230 static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, 231 uint32_t val, int len) 232 { 233 XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d); 234 int index = 0; 235 XenPTRegGroup *reg_grp_entry = NULL; 236 int rc = 0; 237 uint32_t read_val = 0, wb_mask; 238 int emul_len = 0; 239 XenPTReg *reg_entry = NULL; 240 uint32_t find_addr = addr; 241 XenPTRegInfo *reg = NULL; 242 bool wp_flag = false; 243 244 if (xen_pt_pci_config_access_check(d, addr, len)) { 245 return; 246 } 247 248 XEN_PT_LOG_CONFIG(d, addr, val, len); 249 250 /* check unused BAR register */ 251 index = xen_pt_bar_offset_to_index(addr); 252 if ((index >= 0) && (val > 0 && val < XEN_PT_BAR_ALLF) && 253 (s->bases[index].bar_flag == XEN_PT_BAR_FLAG_UNUSED)) { 254 XEN_PT_WARN(d, "Guest attempt to set address to unused Base Address " 255 "Register. (addr: 0x%02x, len: %d)\n", addr, len); 256 } 257 258 /* find register group entry */ 259 reg_grp_entry = xen_pt_find_reg_grp(s, addr); 260 if (reg_grp_entry) { 261 /* check 0-Hardwired register group */ 262 if (reg_grp_entry->reg_grp->grp_type == XEN_PT_GRP_TYPE_HARDWIRED) { 263 /* ignore silently */ 264 XEN_PT_WARN(d, "Access to 0-Hardwired register. " 265 "(addr: 0x%02x, len: %d)\n", addr, len); 266 return; 267 } 268 } 269 270 rc = xen_host_pci_get_block(&s->real_device, addr, 271 (uint8_t *)&read_val, len); 272 if (rc < 0) { 273 XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc); 274 memset(&read_val, 0xff, len); 275 wb_mask = 0; 276 } else { 277 wb_mask = 0xFFFFFFFF >> ((4 - len) << 3); 278 } 279 280 /* pass directly to the real device for passthrough type register group */ 281 if (reg_grp_entry == NULL) { 282 if (!s->permissive) { 283 wb_mask = 0; 284 wp_flag = true; 285 } 286 goto out; 287 } 288 289 memory_region_transaction_begin(); 290 pci_default_write_config(d, addr, val, len); 291 292 /* adjust the read and write value to appropriate CFC-CFF window */ 293 read_val <<= (addr & 3) << 3; 294 val <<= (addr & 3) << 3; 295 emul_len = len; 296 297 /* loop around the guest requested size */ 298 while (emul_len > 0) { 299 /* find register entry to be emulated */ 300 reg_entry = xen_pt_find_reg(reg_grp_entry, find_addr); 301 if (reg_entry) { 302 reg = reg_entry->reg; 303 uint32_t real_offset = reg_grp_entry->base_offset + reg->offset; 304 uint32_t valid_mask = 0xFFFFFFFF >> ((4 - emul_len) << 3); 305 uint8_t *ptr_val = NULL; 306 uint32_t wp_mask = reg->emu_mask | reg->ro_mask; 307 308 valid_mask <<= (find_addr - real_offset) << 3; 309 ptr_val = (uint8_t *)&val + (real_offset & 3); 310 if (!s->permissive) { 311 wp_mask |= reg->res_mask; 312 } 313 if (wp_mask == (0xFFFFFFFF >> ((4 - reg->size) << 3))) { 314 wb_mask &= ~((wp_mask >> ((find_addr - real_offset) << 3)) 315 << ((len - emul_len) << 3)); 316 } 317 318 /* do emulation based on register size */ 319 switch (reg->size) { 320 case 1: 321 if (reg->u.b.write) { 322 rc = reg->u.b.write(s, reg_entry, ptr_val, 323 read_val >> ((real_offset & 3) << 3), 324 valid_mask); 325 } 326 break; 327 case 2: 328 if (reg->u.w.write) { 329 rc = reg->u.w.write(s, reg_entry, (uint16_t *)ptr_val, 330 (read_val >> ((real_offset & 3) << 3)), 331 valid_mask); 332 } 333 break; 334 case 4: 335 if (reg->u.dw.write) { 336 rc = reg->u.dw.write(s, reg_entry, (uint32_t *)ptr_val, 337 (read_val >> ((real_offset & 3) << 3)), 338 valid_mask); 339 } 340 break; 341 } 342 343 if (rc < 0) { 344 xen_shutdown_fatal_error("Internal error: Invalid write" 345 " emulation. (%s, rc: %d)\n", 346 __func__, rc); 347 return; 348 } 349 350 /* calculate next address to find */ 351 emul_len -= reg->size; 352 if (emul_len > 0) { 353 find_addr = real_offset + reg->size; 354 } 355 } else { 356 /* nothing to do with passthrough type register, 357 * continue to find next byte */ 358 if (!s->permissive) { 359 wb_mask &= ~(0xff << ((len - emul_len) << 3)); 360 /* Unused BARs will make it here, but we don't want to issue 361 * warnings for writes to them (bogus writes get dealt with 362 * above). 363 */ 364 if (index < 0) { 365 wp_flag = true; 366 } 367 } 368 emul_len--; 369 find_addr++; 370 } 371 } 372 373 /* need to shift back before passing them to xen_host_pci_device */ 374 val >>= (addr & 3) << 3; 375 376 memory_region_transaction_commit(); 377 378 out: 379 if (wp_flag && !s->permissive_warned) { 380 s->permissive_warned = true; 381 xen_pt_log(d, "Write-back to unknown field 0x%02x (partially) inhibited (0x%0*x)\n", 382 addr, len * 2, wb_mask); 383 xen_pt_log(d, "If the device doesn't work, try enabling permissive mode\n"); 384 xen_pt_log(d, "(unsafe) and if it helps report the problem to xen-devel\n"); 385 } 386 for (index = 0; wb_mask; index += len) { 387 /* unknown regs are passed through */ 388 while (!(wb_mask & 0xff)) { 389 index++; 390 wb_mask >>= 8; 391 } 392 len = 0; 393 do { 394 len++; 395 wb_mask >>= 8; 396 } while (wb_mask & 0xff); 397 rc = xen_host_pci_set_block(&s->real_device, addr + index, 398 (uint8_t *)&val + index, len); 399 400 if (rc < 0) { 401 XEN_PT_ERR(d, "pci_write_block failed. return value: %d.\n", rc); 402 } 403 } 404 } 405 406 /* register regions */ 407 408 static uint64_t xen_pt_bar_read(void *o, hwaddr addr, 409 unsigned size) 410 { 411 PCIDevice *d = o; 412 /* if this function is called, that probably means that there is a 413 * misconfiguration of the IOMMU. */ 414 XEN_PT_ERR(d, "Should not read BAR through QEMU. @0x"TARGET_FMT_plx"\n", 415 addr); 416 return 0; 417 } 418 static void xen_pt_bar_write(void *o, hwaddr addr, uint64_t val, 419 unsigned size) 420 { 421 PCIDevice *d = o; 422 /* Same comment as xen_pt_bar_read function */ 423 XEN_PT_ERR(d, "Should not write BAR through QEMU. @0x"TARGET_FMT_plx"\n", 424 addr); 425 } 426 427 static const MemoryRegionOps ops = { 428 .endianness = DEVICE_NATIVE_ENDIAN, 429 .read = xen_pt_bar_read, 430 .write = xen_pt_bar_write, 431 }; 432 433 static int xen_pt_register_regions(XenPCIPassthroughState *s, uint16_t *cmd) 434 { 435 int i = 0; 436 XenHostPCIDevice *d = &s->real_device; 437 438 /* Register PIO/MMIO BARs */ 439 for (i = 0; i < PCI_ROM_SLOT; i++) { 440 XenHostPCIIORegion *r = &d->io_regions[i]; 441 uint8_t type; 442 443 if (r->base_addr == 0 || r->size == 0) { 444 continue; 445 } 446 447 s->bases[i].access.u = r->base_addr; 448 449 if (r->type & XEN_HOST_PCI_REGION_TYPE_IO) { 450 type = PCI_BASE_ADDRESS_SPACE_IO; 451 *cmd |= PCI_COMMAND_IO; 452 } else { 453 type = PCI_BASE_ADDRESS_SPACE_MEMORY; 454 if (r->type & XEN_HOST_PCI_REGION_TYPE_PREFETCH) { 455 type |= PCI_BASE_ADDRESS_MEM_PREFETCH; 456 } 457 if (r->type & XEN_HOST_PCI_REGION_TYPE_MEM_64) { 458 type |= PCI_BASE_ADDRESS_MEM_TYPE_64; 459 } 460 *cmd |= PCI_COMMAND_MEMORY; 461 } 462 463 memory_region_init_io(&s->bar[i], OBJECT(s), &ops, &s->dev, 464 "xen-pci-pt-bar", r->size); 465 pci_register_bar(&s->dev, i, type, &s->bar[i]); 466 467 XEN_PT_LOG(&s->dev, "IO region %i registered (size=0x%08"PRIx64 468 " base_addr=0x%08"PRIx64" type: %#x)\n", 469 i, r->size, r->base_addr, type); 470 } 471 472 /* Register expansion ROM address */ 473 if (d->rom.base_addr && d->rom.size) { 474 uint32_t bar_data = 0; 475 476 /* Re-set BAR reported by OS, otherwise ROM can't be read. */ 477 if (xen_host_pci_get_long(d, PCI_ROM_ADDRESS, &bar_data)) { 478 return 0; 479 } 480 if ((bar_data & PCI_ROM_ADDRESS_MASK) == 0) { 481 bar_data |= d->rom.base_addr & PCI_ROM_ADDRESS_MASK; 482 xen_host_pci_set_long(d, PCI_ROM_ADDRESS, bar_data); 483 } 484 485 s->bases[PCI_ROM_SLOT].access.maddr = d->rom.base_addr; 486 487 memory_region_init_io(&s->rom, OBJECT(s), &ops, &s->dev, 488 "xen-pci-pt-rom", d->rom.size); 489 pci_register_bar(&s->dev, PCI_ROM_SLOT, PCI_BASE_ADDRESS_MEM_PREFETCH, 490 &s->rom); 491 492 XEN_PT_LOG(&s->dev, "Expansion ROM registered (size=0x%08"PRIx64 493 " base_addr=0x%08"PRIx64")\n", 494 d->rom.size, d->rom.base_addr); 495 } 496 497 return 0; 498 } 499 500 /* region mapping */ 501 502 static int xen_pt_bar_from_region(XenPCIPassthroughState *s, MemoryRegion *mr) 503 { 504 int i = 0; 505 506 for (i = 0; i < PCI_NUM_REGIONS - 1; i++) { 507 if (mr == &s->bar[i]) { 508 return i; 509 } 510 } 511 if (mr == &s->rom) { 512 return PCI_ROM_SLOT; 513 } 514 return -1; 515 } 516 517 /* 518 * This function checks if an io_region overlaps an io_region from another 519 * device. The io_region to check is provided with (addr, size and type) 520 * A callback can be provided and will be called for every region that is 521 * overlapped. 522 * The return value indicates if the region is overlappsed */ 523 struct CheckBarArgs { 524 XenPCIPassthroughState *s; 525 pcibus_t addr; 526 pcibus_t size; 527 uint8_t type; 528 bool rc; 529 }; 530 static void xen_pt_check_bar_overlap(PCIBus *bus, PCIDevice *d, void *opaque) 531 { 532 struct CheckBarArgs *arg = opaque; 533 XenPCIPassthroughState *s = arg->s; 534 uint8_t type = arg->type; 535 int i; 536 537 if (d->devfn == s->dev.devfn) { 538 return; 539 } 540 541 /* xxx: This ignores bridges. */ 542 for (i = 0; i < PCI_NUM_REGIONS; i++) { 543 const PCIIORegion *r = &d->io_regions[i]; 544 545 if (!r->size) { 546 continue; 547 } 548 if ((type & PCI_BASE_ADDRESS_SPACE_IO) 549 != (r->type & PCI_BASE_ADDRESS_SPACE_IO)) { 550 continue; 551 } 552 553 if (ranges_overlap(arg->addr, arg->size, r->addr, r->size)) { 554 XEN_PT_WARN(&s->dev, 555 "Overlapped to device [%02x:%02x.%d] Region: %i" 556 " (addr: %#"FMT_PCIBUS", len: %#"FMT_PCIBUS")\n", 557 pci_bus_num(bus), PCI_SLOT(d->devfn), 558 PCI_FUNC(d->devfn), i, r->addr, r->size); 559 arg->rc = true; 560 } 561 } 562 } 563 564 static void xen_pt_region_update(XenPCIPassthroughState *s, 565 MemoryRegionSection *sec, bool adding) 566 { 567 PCIDevice *d = &s->dev; 568 MemoryRegion *mr = sec->mr; 569 int bar = -1; 570 int rc; 571 int op = adding ? DPCI_ADD_MAPPING : DPCI_REMOVE_MAPPING; 572 struct CheckBarArgs args = { 573 .s = s, 574 .addr = sec->offset_within_address_space, 575 .size = int128_get64(sec->size), 576 .rc = false, 577 }; 578 579 bar = xen_pt_bar_from_region(s, mr); 580 if (bar == -1 && (!s->msix || &s->msix->mmio != mr)) { 581 return; 582 } 583 584 if (s->msix && &s->msix->mmio == mr) { 585 if (adding) { 586 s->msix->mmio_base_addr = sec->offset_within_address_space; 587 rc = xen_pt_msix_update_remap(s, s->msix->bar_index); 588 } 589 return; 590 } 591 592 args.type = d->io_regions[bar].type; 593 pci_for_each_device(d->bus, pci_bus_num(d->bus), 594 xen_pt_check_bar_overlap, &args); 595 if (args.rc) { 596 XEN_PT_WARN(d, "Region: %d (addr: %#"FMT_PCIBUS 597 ", len: %#"FMT_PCIBUS") is overlapped.\n", 598 bar, sec->offset_within_address_space, 599 int128_get64(sec->size)); 600 } 601 602 if (d->io_regions[bar].type & PCI_BASE_ADDRESS_SPACE_IO) { 603 uint32_t guest_port = sec->offset_within_address_space; 604 uint32_t machine_port = s->bases[bar].access.pio_base; 605 uint32_t size = int128_get64(sec->size); 606 rc = xc_domain_ioport_mapping(xen_xc, xen_domid, 607 guest_port, machine_port, size, 608 op); 609 if (rc) { 610 XEN_PT_ERR(d, "%s ioport mapping failed! (rc: %i)\n", 611 adding ? "create new" : "remove old", rc); 612 } 613 } else { 614 pcibus_t guest_addr = sec->offset_within_address_space; 615 pcibus_t machine_addr = s->bases[bar].access.maddr 616 + sec->offset_within_region; 617 pcibus_t size = int128_get64(sec->size); 618 rc = xc_domain_memory_mapping(xen_xc, xen_domid, 619 XEN_PFN(guest_addr + XC_PAGE_SIZE - 1), 620 XEN_PFN(machine_addr + XC_PAGE_SIZE - 1), 621 XEN_PFN(size + XC_PAGE_SIZE - 1), 622 op); 623 if (rc) { 624 XEN_PT_ERR(d, "%s mem mapping failed! (rc: %i)\n", 625 adding ? "create new" : "remove old", rc); 626 } 627 } 628 } 629 630 static void xen_pt_region_add(MemoryListener *l, MemoryRegionSection *sec) 631 { 632 XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState, 633 memory_listener); 634 635 memory_region_ref(sec->mr); 636 xen_pt_region_update(s, sec, true); 637 } 638 639 static void xen_pt_region_del(MemoryListener *l, MemoryRegionSection *sec) 640 { 641 XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState, 642 memory_listener); 643 644 xen_pt_region_update(s, sec, false); 645 memory_region_unref(sec->mr); 646 } 647 648 static void xen_pt_io_region_add(MemoryListener *l, MemoryRegionSection *sec) 649 { 650 XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState, 651 io_listener); 652 653 memory_region_ref(sec->mr); 654 xen_pt_region_update(s, sec, true); 655 } 656 657 static void xen_pt_io_region_del(MemoryListener *l, MemoryRegionSection *sec) 658 { 659 XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState, 660 io_listener); 661 662 xen_pt_region_update(s, sec, false); 663 memory_region_unref(sec->mr); 664 } 665 666 static const MemoryListener xen_pt_memory_listener = { 667 .region_add = xen_pt_region_add, 668 .region_del = xen_pt_region_del, 669 .priority = 10, 670 }; 671 672 static const MemoryListener xen_pt_io_listener = { 673 .region_add = xen_pt_io_region_add, 674 .region_del = xen_pt_io_region_del, 675 .priority = 10, 676 }; 677 678 /* init */ 679 680 static int xen_pt_initfn(PCIDevice *d) 681 { 682 XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d); 683 int rc = 0; 684 uint8_t machine_irq = 0; 685 uint16_t cmd = 0; 686 int pirq = XEN_PT_UNASSIGNED_PIRQ; 687 688 /* register real device */ 689 XEN_PT_LOG(d, "Assigning real physical device %02x:%02x.%d" 690 " to devfn %#x\n", 691 s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function, 692 s->dev.devfn); 693 694 rc = xen_host_pci_device_get(&s->real_device, 695 s->hostaddr.domain, s->hostaddr.bus, 696 s->hostaddr.slot, s->hostaddr.function); 697 if (rc) { 698 XEN_PT_ERR(d, "Failed to \"open\" the real pci device. rc: %i\n", rc); 699 return -1; 700 } 701 702 s->is_virtfn = s->real_device.is_virtfn; 703 if (s->is_virtfn) { 704 XEN_PT_LOG(d, "%04x:%02x:%02x.%d is a SR-IOV Virtual Function\n", 705 s->real_device.domain, s->real_device.bus, 706 s->real_device.dev, s->real_device.func); 707 } 708 709 /* Initialize virtualized PCI configuration (Extended 256 Bytes) */ 710 if (xen_host_pci_get_block(&s->real_device, 0, d->config, 711 PCI_CONFIG_SPACE_SIZE) == -1) { 712 xen_host_pci_device_put(&s->real_device); 713 return -1; 714 } 715 716 s->memory_listener = xen_pt_memory_listener; 717 s->io_listener = xen_pt_io_listener; 718 719 /* Handle real device's MMIO/PIO BARs */ 720 xen_pt_register_regions(s, &cmd); 721 722 /* reinitialize each config register to be emulated */ 723 if (xen_pt_config_init(s)) { 724 XEN_PT_ERR(d, "PCI Config space initialisation failed.\n"); 725 xen_host_pci_device_put(&s->real_device); 726 return -1; 727 } 728 729 /* Bind interrupt */ 730 if (!s->dev.config[PCI_INTERRUPT_PIN]) { 731 XEN_PT_LOG(d, "no pin interrupt\n"); 732 goto out; 733 } 734 735 machine_irq = s->real_device.irq; 736 rc = xc_physdev_map_pirq(xen_xc, xen_domid, machine_irq, &pirq); 737 738 if (rc < 0) { 739 XEN_PT_ERR(d, "Mapping machine irq %u to pirq %i failed, (rc: %d)\n", 740 machine_irq, pirq, rc); 741 742 /* Disable PCI intx assertion (turn on bit10 of devctl) */ 743 xen_host_pci_set_word(&s->real_device, 744 PCI_COMMAND, 745 pci_get_word(s->dev.config + PCI_COMMAND) 746 | PCI_COMMAND_INTX_DISABLE); 747 machine_irq = 0; 748 s->machine_irq = 0; 749 } else { 750 machine_irq = pirq; 751 s->machine_irq = pirq; 752 xen_pt_mapped_machine_irq[machine_irq]++; 753 } 754 755 /* bind machine_irq to device */ 756 if (machine_irq != 0) { 757 uint8_t e_intx = xen_pt_pci_intx(s); 758 759 rc = xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, machine_irq, 760 pci_bus_num(d->bus), 761 PCI_SLOT(d->devfn), 762 e_intx); 763 if (rc < 0) { 764 XEN_PT_ERR(d, "Binding of interrupt %i failed! (rc: %d)\n", 765 e_intx, rc); 766 767 /* Disable PCI intx assertion (turn on bit10 of devctl) */ 768 xen_host_pci_set_word(&s->real_device, PCI_COMMAND, 769 *(uint16_t *)(&s->dev.config[PCI_COMMAND]) 770 | PCI_COMMAND_INTX_DISABLE); 771 xen_pt_mapped_machine_irq[machine_irq]--; 772 773 if (xen_pt_mapped_machine_irq[machine_irq] == 0) { 774 if (xc_physdev_unmap_pirq(xen_xc, xen_domid, machine_irq)) { 775 XEN_PT_ERR(d, "Unmapping of machine interrupt %i failed!" 776 " (rc: %d)\n", machine_irq, rc); 777 } 778 } 779 s->machine_irq = 0; 780 } 781 } 782 783 out: 784 if (cmd) { 785 xen_host_pci_set_word(&s->real_device, PCI_COMMAND, 786 pci_get_word(d->config + PCI_COMMAND) | cmd); 787 } 788 789 memory_listener_register(&s->memory_listener, &s->dev.bus_master_as); 790 memory_listener_register(&s->io_listener, &address_space_io); 791 XEN_PT_LOG(d, 792 "Real physical device %02x:%02x.%d registered successfully!\n", 793 s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function); 794 795 return 0; 796 } 797 798 static void xen_pt_unregister_device(PCIDevice *d) 799 { 800 XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d); 801 uint8_t machine_irq = s->machine_irq; 802 uint8_t intx = xen_pt_pci_intx(s); 803 int rc; 804 805 if (machine_irq) { 806 rc = xc_domain_unbind_pt_irq(xen_xc, xen_domid, machine_irq, 807 PT_IRQ_TYPE_PCI, 808 pci_bus_num(d->bus), 809 PCI_SLOT(s->dev.devfn), 810 intx, 811 0 /* isa_irq */); 812 if (rc < 0) { 813 XEN_PT_ERR(d, "unbinding of interrupt INT%c failed." 814 " (machine irq: %i, rc: %d)" 815 " But bravely continuing on..\n", 816 'a' + intx, machine_irq, rc); 817 } 818 } 819 820 if (s->msi) { 821 xen_pt_msi_disable(s); 822 } 823 if (s->msix) { 824 xen_pt_msix_disable(s); 825 } 826 827 if (machine_irq) { 828 xen_pt_mapped_machine_irq[machine_irq]--; 829 830 if (xen_pt_mapped_machine_irq[machine_irq] == 0) { 831 rc = xc_physdev_unmap_pirq(xen_xc, xen_domid, machine_irq); 832 833 if (rc < 0) { 834 XEN_PT_ERR(d, "unmapping of interrupt %i failed. (rc: %d)" 835 " But bravely continuing on..\n", 836 machine_irq, rc); 837 } 838 } 839 } 840 841 /* delete all emulated config registers */ 842 xen_pt_config_delete(s); 843 844 memory_listener_unregister(&s->memory_listener); 845 memory_listener_unregister(&s->io_listener); 846 847 xen_host_pci_device_put(&s->real_device); 848 } 849 850 static Property xen_pci_passthrough_properties[] = { 851 DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState, hostaddr), 852 DEFINE_PROP_BOOL("permissive", XenPCIPassthroughState, permissive, false), 853 DEFINE_PROP_END_OF_LIST(), 854 }; 855 856 static void xen_pci_passthrough_class_init(ObjectClass *klass, void *data) 857 { 858 DeviceClass *dc = DEVICE_CLASS(klass); 859 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 860 861 k->init = xen_pt_initfn; 862 k->exit = xen_pt_unregister_device; 863 k->config_read = xen_pt_pci_read_config; 864 k->config_write = xen_pt_pci_write_config; 865 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 866 dc->desc = "Assign an host PCI device with Xen"; 867 dc->props = xen_pci_passthrough_properties; 868 }; 869 870 static const TypeInfo xen_pci_passthrough_info = { 871 .name = "xen-pci-passthrough", 872 .parent = TYPE_PCI_DEVICE, 873 .instance_size = sizeof(XenPCIPassthroughState), 874 .class_init = xen_pci_passthrough_class_init, 875 }; 876 877 static void xen_pci_passthrough_register_types(void) 878 { 879 type_register_static(&xen_pci_passthrough_info); 880 } 881 882 type_init(xen_pci_passthrough_register_types) 883