1b707ab75SMax Filippov /*
2b707ab75SMax Filippov * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3b707ab75SMax Filippov * All rights reserved.
4b707ab75SMax Filippov *
5b707ab75SMax Filippov * Redistribution and use in source and binary forms, with or without
6b707ab75SMax Filippov * modification, are permitted provided that the following conditions are met:
7b707ab75SMax Filippov * * Redistributions of source code must retain the above copyright
8b707ab75SMax Filippov * notice, this list of conditions and the following disclaimer.
9b707ab75SMax Filippov * * Redistributions in binary form must reproduce the above copyright
10b707ab75SMax Filippov * notice, this list of conditions and the following disclaimer in the
11b707ab75SMax Filippov * documentation and/or other materials provided with the distribution.
12b707ab75SMax Filippov * * Neither the name of the Open Source and Linux Lab nor the
13b707ab75SMax Filippov * names of its contributors may be used to endorse or promote products
14b707ab75SMax Filippov * derived from this software without specific prior written permission.
15b707ab75SMax Filippov *
16b707ab75SMax Filippov * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17b707ab75SMax Filippov * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18b707ab75SMax Filippov * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19b707ab75SMax Filippov * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20b707ab75SMax Filippov * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21b707ab75SMax Filippov * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22b707ab75SMax Filippov * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23b707ab75SMax Filippov * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24b707ab75SMax Filippov * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25b707ab75SMax Filippov * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26b707ab75SMax Filippov */
27b707ab75SMax Filippov
2809aae23dSPeter Maydell #include "qemu/osdep.h"
29b941329dSPhilippe Mathieu-Daudé #include "qemu/units.h"
30da34e65cSMarkus Armbruster #include "qapi/error.h"
314771d756SPaolo Bonzini #include "cpu.h"
32b707ab75SMax Filippov #include "sysemu/sysemu.h"
33b707ab75SMax Filippov #include "hw/boards.h"
34b707ab75SMax Filippov #include "hw/loader.h"
35a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
36b707ab75SMax Filippov #include "elf.h"
37b707ab75SMax Filippov #include "exec/memory.h"
38b707ab75SMax Filippov #include "hw/char/serial.h"
39b707ab75SMax Filippov #include "net/net.h"
40b707ab75SMax Filippov #include "hw/sysbus.h"
41b707ab75SMax Filippov #include "hw/block/flash.h"
428228e353SMarc-André Lureau #include "chardev/char.h"
43996dfe98SMax Filippov #include "sysemu/device_tree.h"
4471e8a915SMarkus Armbruster #include "sysemu/reset.h"
4554d31236SMarkus Armbruster #include "sysemu/runstate.h"
468488ab02SMax Filippov #include "qemu/error-report.h"
47922a01a0SMarkus Armbruster #include "qemu/option.h"
48b707ab75SMax Filippov #include "bootparam.h"
49e53fa62cSMax Filippov #include "xtensa_memory.h"
501acd90bfSMax Filippov #include "hw/xtensa/mx_pic.h"
51d6454270SMarkus Armbruster #include "migration/vmstate.h"
52b707ab75SMax Filippov
53740ad9f7SMax Filippov typedef struct XtfpgaFlashDesc {
54740ad9f7SMax Filippov hwaddr base;
55740ad9f7SMax Filippov size_t size;
56740ad9f7SMax Filippov size_t boot_base;
57740ad9f7SMax Filippov size_t sector_size;
58740ad9f7SMax Filippov } XtfpgaFlashDesc;
59740ad9f7SMax Filippov
60188ce01dSMax Filippov typedef struct XtfpgaBoardDesc {
61740ad9f7SMax Filippov const XtfpgaFlashDesc *flash;
62b707ab75SMax Filippov size_t sram_size;
6385e2d8d5SMax Filippov const hwaddr *io;
64188ce01dSMax Filippov } XtfpgaBoardDesc;
65b707ab75SMax Filippov
66188ce01dSMax Filippov typedef struct XtfpgaFpgaState {
67b707ab75SMax Filippov MemoryRegion iomem;
68fff7bf14SMax Filippov uint32_t freq;
69b707ab75SMax Filippov uint32_t leds;
70b707ab75SMax Filippov uint32_t switches;
71188ce01dSMax Filippov } XtfpgaFpgaState;
72b707ab75SMax Filippov
xtfpga_fpga_reset(void * opaque)73188ce01dSMax Filippov static void xtfpga_fpga_reset(void *opaque)
74b707ab75SMax Filippov {
75188ce01dSMax Filippov XtfpgaFpgaState *s = opaque;
76b707ab75SMax Filippov
77b707ab75SMax Filippov s->leds = 0;
78b707ab75SMax Filippov s->switches = 0;
79b707ab75SMax Filippov }
80b707ab75SMax Filippov
xtfpga_fpga_read(void * opaque,hwaddr addr,unsigned size)81188ce01dSMax Filippov static uint64_t xtfpga_fpga_read(void *opaque, hwaddr addr,
82b707ab75SMax Filippov unsigned size)
83b707ab75SMax Filippov {
84188ce01dSMax Filippov XtfpgaFpgaState *s = opaque;
85b707ab75SMax Filippov
86b707ab75SMax Filippov switch (addr) {
87b707ab75SMax Filippov case 0x0: /*build date code*/
88b707ab75SMax Filippov return 0x09272011;
89b707ab75SMax Filippov
90b707ab75SMax Filippov case 0x4: /*processor clock frequency, Hz*/
91fff7bf14SMax Filippov return s->freq;
92b707ab75SMax Filippov
93b707ab75SMax Filippov case 0x8: /*LEDs (off = 0, on = 1)*/
94b707ab75SMax Filippov return s->leds;
95b707ab75SMax Filippov
96b707ab75SMax Filippov case 0xc: /*DIP switches (off = 0, on = 1)*/
97b707ab75SMax Filippov return s->switches;
98b707ab75SMax Filippov }
99b707ab75SMax Filippov return 0;
100b707ab75SMax Filippov }
101b707ab75SMax Filippov
xtfpga_fpga_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)102188ce01dSMax Filippov static void xtfpga_fpga_write(void *opaque, hwaddr addr,
103b707ab75SMax Filippov uint64_t val, unsigned size)
104b707ab75SMax Filippov {
105188ce01dSMax Filippov XtfpgaFpgaState *s = opaque;
106b707ab75SMax Filippov
107b707ab75SMax Filippov switch (addr) {
108b707ab75SMax Filippov case 0x8: /*LEDs (off = 0, on = 1)*/
109b707ab75SMax Filippov s->leds = val;
110b707ab75SMax Filippov break;
111b707ab75SMax Filippov
112b707ab75SMax Filippov case 0x10: /*board reset*/
113b707ab75SMax Filippov if (val == 0xdead) {
114cf83f140SEric Blake qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
115b707ab75SMax Filippov }
116b707ab75SMax Filippov break;
117b707ab75SMax Filippov }
118b707ab75SMax Filippov }
119b707ab75SMax Filippov
120188ce01dSMax Filippov static const MemoryRegionOps xtfpga_fpga_ops = {
121188ce01dSMax Filippov .read = xtfpga_fpga_read,
122188ce01dSMax Filippov .write = xtfpga_fpga_write,
123b707ab75SMax Filippov .endianness = DEVICE_NATIVE_ENDIAN,
124b707ab75SMax Filippov };
125b707ab75SMax Filippov
xtfpga_fpga_init(MemoryRegion * address_space,hwaddr base,uint32_t freq)126188ce01dSMax Filippov static XtfpgaFpgaState *xtfpga_fpga_init(MemoryRegion *address_space,
127fff7bf14SMax Filippov hwaddr base, uint32_t freq)
128b707ab75SMax Filippov {
129b21e2380SMarkus Armbruster XtfpgaFpgaState *s = g_new(XtfpgaFpgaState, 1);
130b707ab75SMax Filippov
131188ce01dSMax Filippov memory_region_init_io(&s->iomem, NULL, &xtfpga_fpga_ops, s,
132188ce01dSMax Filippov "xtfpga.fpga", 0x10000);
133b707ab75SMax Filippov memory_region_add_subregion(address_space, base, &s->iomem);
134fff7bf14SMax Filippov s->freq = freq;
135188ce01dSMax Filippov xtfpga_fpga_reset(s);
136188ce01dSMax Filippov qemu_register_reset(xtfpga_fpga_reset, s);
137b707ab75SMax Filippov return s;
138b707ab75SMax Filippov }
139b707ab75SMax Filippov
xtfpga_net_init(MemoryRegion * address_space,hwaddr base,hwaddr descriptors,hwaddr buffers,qemu_irq irq)140188ce01dSMax Filippov static void xtfpga_net_init(MemoryRegion *address_space,
141b707ab75SMax Filippov hwaddr base,
142b707ab75SMax Filippov hwaddr descriptors,
143b707ab75SMax Filippov hwaddr buffers,
144*7db00af6SDavid Woodhouse qemu_irq irq)
145b707ab75SMax Filippov {
146b707ab75SMax Filippov DeviceState *dev;
147b707ab75SMax Filippov SysBusDevice *s;
148b707ab75SMax Filippov MemoryRegion *ram;
149b707ab75SMax Filippov
150*7db00af6SDavid Woodhouse dev = qemu_create_nic_device("open_eth", true, NULL);
151*7db00af6SDavid Woodhouse if (!dev) {
152*7db00af6SDavid Woodhouse return;
153*7db00af6SDavid Woodhouse }
154b707ab75SMax Filippov
155b707ab75SMax Filippov s = SYS_BUS_DEVICE(dev);
1563c6ef471SMarkus Armbruster sysbus_realize_and_unref(s, &error_fatal);
157b707ab75SMax Filippov sysbus_connect_irq(s, 0, irq);
158b707ab75SMax Filippov memory_region_add_subregion(address_space, base,
159b707ab75SMax Filippov sysbus_mmio_get_region(s, 0));
160b707ab75SMax Filippov memory_region_add_subregion(address_space, descriptors,
161b707ab75SMax Filippov sysbus_mmio_get_region(s, 1));
162b707ab75SMax Filippov
163b707ab75SMax Filippov ram = g_malloc(sizeof(*ram));
164b941329dSPhilippe Mathieu-Daudé memory_region_init_ram_nomigrate(ram, OBJECT(s), "open_eth.ram", 16 * KiB,
165f8ed85acSMarkus Armbruster &error_fatal);
166b707ab75SMax Filippov vmstate_register_ram_global(ram);
167b707ab75SMax Filippov memory_region_add_subregion(address_space, buffers, ram);
168b707ab75SMax Filippov }
169b707ab75SMax Filippov
xtfpga_flash_init(MemoryRegion * address_space,const XtfpgaBoardDesc * board,DriveInfo * dinfo,int be)17016434065SMarkus Armbruster static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space,
171188ce01dSMax Filippov const XtfpgaBoardDesc *board,
17268931a40SMax Filippov DriveInfo *dinfo, int be)
17368931a40SMax Filippov {
17468931a40SMax Filippov SysBusDevice *s;
1753e80f690SMarkus Armbruster DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
17668931a40SMax Filippov
177934df912SMarkus Armbruster qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo));
17868931a40SMax Filippov qdev_prop_set_uint32(dev, "num-blocks",
179740ad9f7SMax Filippov board->flash->size / board->flash->sector_size);
180740ad9f7SMax Filippov qdev_prop_set_uint64(dev, "sector-length", board->flash->sector_size);
181f9a555e4SMax Filippov qdev_prop_set_uint8(dev, "width", 2);
18268931a40SMax Filippov qdev_prop_set_bit(dev, "big-endian", be);
183188ce01dSMax Filippov qdev_prop_set_string(dev, "name", "xtfpga.io.flash");
18468931a40SMax Filippov s = SYS_BUS_DEVICE(dev);
1853c6ef471SMarkus Armbruster sysbus_realize_and_unref(s, &error_fatal);
186740ad9f7SMax Filippov memory_region_add_subregion(address_space, board->flash->base,
18768931a40SMax Filippov sysbus_mmio_get_region(s, 0));
18881c7db72SMarkus Armbruster return PFLASH_CFI01(dev);
18968931a40SMax Filippov }
19068931a40SMax Filippov
translate_phys_addr(void * opaque,uint64_t addr)191b707ab75SMax Filippov static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
192b707ab75SMax Filippov {
193b707ab75SMax Filippov XtensaCPU *cpu = opaque;
194b707ab75SMax Filippov
195b707ab75SMax Filippov return cpu_get_phys_page_debug(CPU(cpu), addr);
196b707ab75SMax Filippov }
197b707ab75SMax Filippov
xtfpga_reset(void * opaque)198188ce01dSMax Filippov static void xtfpga_reset(void *opaque)
199b707ab75SMax Filippov {
200b707ab75SMax Filippov XtensaCPU *cpu = opaque;
201b707ab75SMax Filippov
202b707ab75SMax Filippov cpu_reset(CPU(cpu));
203b707ab75SMax Filippov }
204b707ab75SMax Filippov
xtfpga_io_read(void * opaque,hwaddr addr,unsigned size)205188ce01dSMax Filippov static uint64_t xtfpga_io_read(void *opaque, hwaddr addr,
2068bb3b575SMax Filippov unsigned size)
2078bb3b575SMax Filippov {
2088bb3b575SMax Filippov return 0;
2098bb3b575SMax Filippov }
2108bb3b575SMax Filippov
xtfpga_io_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)211188ce01dSMax Filippov static void xtfpga_io_write(void *opaque, hwaddr addr,
2128bb3b575SMax Filippov uint64_t val, unsigned size)
2138bb3b575SMax Filippov {
2148bb3b575SMax Filippov }
2158bb3b575SMax Filippov
216188ce01dSMax Filippov static const MemoryRegionOps xtfpga_io_ops = {
217188ce01dSMax Filippov .read = xtfpga_io_read,
218188ce01dSMax Filippov .write = xtfpga_io_write,
2198bb3b575SMax Filippov .endianness = DEVICE_NATIVE_ENDIAN,
2208bb3b575SMax Filippov };
2218bb3b575SMax Filippov
xtfpga_init(const XtfpgaBoardDesc * board,MachineState * machine)222188ce01dSMax Filippov static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
223b707ab75SMax Filippov {
224b707ab75SMax Filippov MemoryRegion *system_memory = get_system_memory();
225b707ab75SMax Filippov XtensaCPU *cpu = NULL;
226b707ab75SMax Filippov CPUXtensaState *env = NULL;
227e53fa62cSMax Filippov MemoryRegion *system_io;
2281acd90bfSMax Filippov XtensaMxPic *mx_pic = NULL;
22966f03d7eSMax Filippov qemu_irq *extints;
230b707ab75SMax Filippov DriveInfo *dinfo;
23116434065SMarkus Armbruster PFlashCFI01 *flash = NULL;
232f2ce39b4SPaolo Bonzini const char *kernel_filename = machine->kernel_filename;
233f2ce39b4SPaolo Bonzini const char *kernel_cmdline = machine->kernel_cmdline;
234f2ce39b4SPaolo Bonzini const char *dtb_filename = machine->dtb;
235f2ce39b4SPaolo Bonzini const char *initrd_filename = machine->initrd_filename;
236b941329dSPhilippe Mathieu-Daudé const unsigned system_io_size = 224 * MiB;
237fff7bf14SMax Filippov uint32_t freq = 10000000;
238b707ab75SMax Filippov int n;
23933decbd2SLike Xu unsigned int smp_cpus = machine->smp.cpus;
240b707ab75SMax Filippov
2411acd90bfSMax Filippov if (smp_cpus > 1) {
2421acd90bfSMax Filippov mx_pic = xtensa_mx_pic_init(31);
2431acd90bfSMax Filippov qemu_register_reset(xtensa_mx_pic_reset, mx_pic);
2441acd90bfSMax Filippov }
245b707ab75SMax Filippov for (n = 0; n < smp_cpus; n++) {
246288a3f2eSMax Filippov CPUXtensaState *cenv = NULL;
247b707ab75SMax Filippov
248288a3f2eSMax Filippov cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
249288a3f2eSMax Filippov cenv = &cpu->env;
250288a3f2eSMax Filippov if (!env) {
251288a3f2eSMax Filippov env = cenv;
252fff7bf14SMax Filippov freq = env->config->clock_freq_khz * 1000;
253288a3f2eSMax Filippov }
254288a3f2eSMax Filippov
2551acd90bfSMax Filippov if (mx_pic) {
2561acd90bfSMax Filippov MemoryRegion *mx_eri;
2571acd90bfSMax Filippov
2581acd90bfSMax Filippov mx_eri = xtensa_mx_pic_register_cpu(mx_pic,
2591acd90bfSMax Filippov xtensa_get_extints(cenv),
2601acd90bfSMax Filippov xtensa_get_runstall(cenv));
2611acd90bfSMax Filippov memory_region_add_subregion(xtensa_get_er_region(cenv),
2621acd90bfSMax Filippov 0, mx_eri);
2631acd90bfSMax Filippov }
264288a3f2eSMax Filippov cenv->sregs[PRID] = n;
2651acd90bfSMax Filippov xtensa_select_static_vectors(cenv, n != 0);
266188ce01dSMax Filippov qemu_register_reset(xtfpga_reset, cpu);
267b707ab75SMax Filippov /* Need MMU initialized prior to ELF loading,
268b707ab75SMax Filippov * so that ELF gets loaded into virtual addresses
269b707ab75SMax Filippov */
270b707ab75SMax Filippov cpu_reset(CPU(cpu));
271b707ab75SMax Filippov }
2721acd90bfSMax Filippov if (smp_cpus > 1) {
2731acd90bfSMax Filippov extints = xtensa_mx_pic_get_extints(mx_pic);
2741acd90bfSMax Filippov } else {
27566f03d7eSMax Filippov extints = xtensa_get_extints(env);
2761acd90bfSMax Filippov }
277b707ab75SMax Filippov
278e53fa62cSMax Filippov if (env) {
279e53fa62cSMax Filippov XtensaMemory sysram = env->config->sysram;
280e53fa62cSMax Filippov
281e53fa62cSMax Filippov sysram.location[0].size = machine->ram_size;
282e53fa62cSMax Filippov xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom",
283e53fa62cSMax Filippov system_memory);
284e53fa62cSMax Filippov xtensa_create_memory_regions(&env->config->instram, "xtensa.instram",
285e53fa62cSMax Filippov system_memory);
286e53fa62cSMax Filippov xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom",
287e53fa62cSMax Filippov system_memory);
288e53fa62cSMax Filippov xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram",
289e53fa62cSMax Filippov system_memory);
290e53fa62cSMax Filippov xtensa_create_memory_regions(&sysram, "xtensa.sysram",
291e53fa62cSMax Filippov system_memory);
292e53fa62cSMax Filippov }
293b707ab75SMax Filippov
294b707ab75SMax Filippov system_io = g_malloc(sizeof(*system_io));
295188ce01dSMax Filippov memory_region_init_io(system_io, NULL, &xtfpga_io_ops, NULL, "xtfpga.io",
29685e2d8d5SMax Filippov system_io_size);
29785e2d8d5SMax Filippov memory_region_add_subregion(system_memory, board->io[0], system_io);
29885e2d8d5SMax Filippov if (board->io[1]) {
29985e2d8d5SMax Filippov MemoryRegion *io = g_malloc(sizeof(*io));
30085e2d8d5SMax Filippov
30185e2d8d5SMax Filippov memory_region_init_alias(io, NULL, "xtfpga.io.cached",
30285e2d8d5SMax Filippov system_io, 0, system_io_size);
30385e2d8d5SMax Filippov memory_region_add_subregion(system_memory, board->io[1], io);
30485e2d8d5SMax Filippov }
305fff7bf14SMax Filippov xtfpga_fpga_init(system_io, 0x0d020000, freq);
306*7db00af6SDavid Woodhouse xtfpga_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000, extints[1]);
307b707ab75SMax Filippov
30866f03d7eSMax Filippov serial_mm_init(system_io, 0x0d050020, 2, extints[0],
3099bca0edbSPeter Maydell 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
310b707ab75SMax Filippov
311b707ab75SMax Filippov dinfo = drive_get(IF_PFLASH, 0, 0);
312b707ab75SMax Filippov if (dinfo) {
313ded625e7SThomas Huth flash = xtfpga_flash_init(system_io, board, dinfo, TARGET_BIG_ENDIAN);
314b707ab75SMax Filippov }
315b707ab75SMax Filippov
316b707ab75SMax Filippov /* Use presence of kernel file name as 'boot from SRAM' switch. */
317b707ab75SMax Filippov if (kernel_filename) {
318364d4802SMax Filippov uint32_t entry_point = env->pc;
319b6edea8bSMax Filippov size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */
320e53fa62cSMax Filippov uint32_t tagptr = env->config->sysrom.location[0].addr +
321e53fa62cSMax Filippov board->sram_size;
322a9a28591SMax Filippov uint32_t cur_tagptr;
323b6edea8bSMax Filippov BpMemInfo memory_location = {
324b6edea8bSMax Filippov .type = tswap32(MEMORY_TYPE_CONVENTIONAL),
325e53fa62cSMax Filippov .start = tswap32(env->config->sysram.location[0].addr),
326e53fa62cSMax Filippov .end = tswap32(env->config->sysram.location[0].addr +
327e53fa62cSMax Filippov machine->ram_size),
328b6edea8bSMax Filippov };
329996dfe98SMax Filippov uint32_t lowmem_end = machine->ram_size < 0x08000000 ?
330996dfe98SMax Filippov machine->ram_size : 0x08000000;
331996dfe98SMax Filippov uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);
332a9a28591SMax Filippov
333e53fa62cSMax Filippov lowmem_end += env->config->sysram.location[0].addr;
334e53fa62cSMax Filippov cur_lowmem += env->config->sysram.location[0].addr;
335e53fa62cSMax Filippov
336e53fa62cSMax Filippov xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom",
337e53fa62cSMax Filippov system_memory);
338b707ab75SMax Filippov
339b707ab75SMax Filippov if (kernel_cmdline) {
340a9a28591SMax Filippov bp_size += get_tag_size(strlen(kernel_cmdline) + 1);
341a9a28591SMax Filippov }
342996dfe98SMax Filippov if (dtb_filename) {
343996dfe98SMax Filippov bp_size += get_tag_size(sizeof(uint32_t));
344996dfe98SMax Filippov }
345f55b32e7SMax Filippov if (initrd_filename) {
346f55b32e7SMax Filippov bp_size += get_tag_size(sizeof(BpMemInfo));
347f55b32e7SMax Filippov }
348b707ab75SMax Filippov
349a9a28591SMax Filippov /* Put kernel bootparameters to the end of that SRAM */
350a9a28591SMax Filippov tagptr = (tagptr - bp_size) & ~0xff;
351a9a28591SMax Filippov cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);
352b6edea8bSMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,
353b6edea8bSMax Filippov sizeof(memory_location), &memory_location);
354a9a28591SMax Filippov
355a9a28591SMax Filippov if (kernel_cmdline) {
356a9a28591SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,
357a9a28591SMax Filippov strlen(kernel_cmdline) + 1, kernel_cmdline);
358a9a28591SMax Filippov }
359996dfe98SMax Filippov if (dtb_filename) {
360996dfe98SMax Filippov int fdt_size;
361996dfe98SMax Filippov void *fdt = load_device_tree(dtb_filename, &fdt_size);
362996dfe98SMax Filippov uint32_t dtb_addr = tswap32(cur_lowmem);
363996dfe98SMax Filippov
364996dfe98SMax Filippov if (!fdt) {
365ebbb419aSGonglei error_report("could not load DTB '%s'", dtb_filename);
366996dfe98SMax Filippov exit(EXIT_FAILURE);
367996dfe98SMax Filippov }
368996dfe98SMax Filippov
369996dfe98SMax Filippov cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);
370996dfe98SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
371996dfe98SMax Filippov sizeof(dtb_addr), &dtb_addr);
372b941329dSPhilippe Mathieu-Daudé cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4 * KiB);
373d1cb6784SChen Qun g_free(fdt);
374996dfe98SMax Filippov }
375f55b32e7SMax Filippov if (initrd_filename) {
376f55b32e7SMax Filippov BpMemInfo initrd_location = { 0 };
377f55b32e7SMax Filippov int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,
378f55b32e7SMax Filippov lowmem_end - cur_lowmem);
379f55b32e7SMax Filippov
380f55b32e7SMax Filippov if (initrd_size < 0) {
381f55b32e7SMax Filippov initrd_size = load_image_targphys(initrd_filename,
382f55b32e7SMax Filippov cur_lowmem,
383f55b32e7SMax Filippov lowmem_end - cur_lowmem);
384f55b32e7SMax Filippov }
385f55b32e7SMax Filippov if (initrd_size < 0) {
386ebbb419aSGonglei error_report("could not load initrd '%s'", initrd_filename);
387f55b32e7SMax Filippov exit(EXIT_FAILURE);
388f55b32e7SMax Filippov }
389f55b32e7SMax Filippov initrd_location.start = tswap32(cur_lowmem);
390f55b32e7SMax Filippov initrd_location.end = tswap32(cur_lowmem + initrd_size);
391f55b32e7SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
392f55b32e7SMax Filippov sizeof(initrd_location), &initrd_location);
393b941329dSPhilippe Mathieu-Daudé cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4 * KiB);
394f55b32e7SMax Filippov }
395a9a28591SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);
396b707ab75SMax Filippov env->regs[2] = tagptr;
397b707ab75SMax Filippov
398b707ab75SMax Filippov uint64_t elf_entry;
3994366e1dbSLiam Merwick int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
400ded625e7SThomas Huth &elf_entry, NULL, NULL, NULL, TARGET_BIG_ENDIAN,
401ded625e7SThomas Huth EM_XTENSA, 0, 0);
402b707ab75SMax Filippov if (success > 0) {
403364d4802SMax Filippov entry_point = elf_entry;
404364d4802SMax Filippov } else {
405364d4802SMax Filippov hwaddr ep;
406364d4802SMax Filippov int is_linux;
40725bda50aSMax Filippov success = load_uimage(kernel_filename, &ep, NULL, &is_linux,
4086d2e4530SMax Filippov translate_phys_addr, cpu);
409364d4802SMax Filippov if (success > 0 && is_linux) {
410364d4802SMax Filippov entry_point = ep;
411364d4802SMax Filippov } else {
412ebbb419aSGonglei error_report("could not load kernel '%s'",
413364d4802SMax Filippov kernel_filename);
414364d4802SMax Filippov exit(EXIT_FAILURE);
415364d4802SMax Filippov }
416364d4802SMax Filippov }
417364d4802SMax Filippov if (entry_point != env->pc) {
418339ef8fbSMax Filippov uint8_t boot[] = {
419ee3eb3a7SMarc-André Lureau #if TARGET_BIG_ENDIAN
420339ef8fbSMax Filippov 0x60, 0x00, 0x08, /* j 1f */
421339ef8fbSMax Filippov 0x00, /* .literal_position */
422339ef8fbSMax Filippov 0x00, 0x00, 0x00, 0x00, /* .literal entry_pc */
423339ef8fbSMax Filippov 0x00, 0x00, 0x00, 0x00, /* .literal entry_a2 */
424339ef8fbSMax Filippov /* 1: */
425339ef8fbSMax Filippov 0x10, 0xff, 0xfe, /* l32r a0, entry_pc */
426339ef8fbSMax Filippov 0x12, 0xff, 0xfe, /* l32r a2, entry_a2 */
427339ef8fbSMax Filippov 0x0a, 0x00, 0x00, /* jx a0 */
428364d4802SMax Filippov #else
429339ef8fbSMax Filippov 0x06, 0x02, 0x00, /* j 1f */
430339ef8fbSMax Filippov 0x00, /* .literal_position */
431339ef8fbSMax Filippov 0x00, 0x00, 0x00, 0x00, /* .literal entry_pc */
432339ef8fbSMax Filippov 0x00, 0x00, 0x00, 0x00, /* .literal entry_a2 */
433339ef8fbSMax Filippov /* 1: */
434339ef8fbSMax Filippov 0x01, 0xfe, 0xff, /* l32r a0, entry_pc */
435339ef8fbSMax Filippov 0x21, 0xfe, 0xff, /* l32r a2, entry_a2 */
436339ef8fbSMax Filippov 0xa0, 0x00, 0x00, /* jx a0 */
437364d4802SMax Filippov #endif
438364d4802SMax Filippov };
439339ef8fbSMax Filippov uint32_t entry_pc = tswap32(entry_point);
440339ef8fbSMax Filippov uint32_t entry_a2 = tswap32(tagptr);
441339ef8fbSMax Filippov
442339ef8fbSMax Filippov memcpy(boot + 4, &entry_pc, sizeof(entry_pc));
443339ef8fbSMax Filippov memcpy(boot + 8, &entry_a2, sizeof(entry_a2));
444339ef8fbSMax Filippov cpu_physical_memory_write(env->pc, boot, sizeof(boot));
445b707ab75SMax Filippov }
446b707ab75SMax Filippov } else {
447b707ab75SMax Filippov if (flash) {
448b707ab75SMax Filippov MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
449b707ab75SMax Filippov MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
450e53fa62cSMax Filippov uint32_t size = env->config->sysrom.location[0].size;
451e53fa62cSMax Filippov
452740ad9f7SMax Filippov if (board->flash->size - board->flash->boot_base < size) {
453740ad9f7SMax Filippov size = board->flash->size - board->flash->boot_base;
454e53fa62cSMax Filippov }
455b707ab75SMax Filippov
456188ce01dSMax Filippov memory_region_init_alias(flash_io, NULL, "xtfpga.flash",
457740ad9f7SMax Filippov flash_mr, board->flash->boot_base, size);
458e53fa62cSMax Filippov memory_region_add_subregion(system_memory,
459e53fa62cSMax Filippov env->config->sysrom.location[0].addr,
460b707ab75SMax Filippov flash_io);
461e53fa62cSMax Filippov } else {
462e53fa62cSMax Filippov xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom",
463e53fa62cSMax Filippov system_memory);
464b707ab75SMax Filippov }
465b707ab75SMax Filippov }
466b707ab75SMax Filippov }
467b707ab75SMax Filippov
46859b5e9bbSMax Filippov #define XTFPGA_MMU_RESERVED_MEMORY_SIZE (128 * MiB)
46959b5e9bbSMax Filippov
47085e2d8d5SMax Filippov static const hwaddr xtfpga_mmu_io[2] = {
47185e2d8d5SMax Filippov 0xf0000000,
47285e2d8d5SMax Filippov };
47385e2d8d5SMax Filippov
47485e2d8d5SMax Filippov static const hwaddr xtfpga_nommu_io[2] = {
47585e2d8d5SMax Filippov 0x90000000,
47685e2d8d5SMax Filippov 0x70000000,
47785e2d8d5SMax Filippov };
47885e2d8d5SMax Filippov
479740ad9f7SMax Filippov static const XtfpgaFlashDesc lx60_flash = {
480740ad9f7SMax Filippov .base = 0x08000000,
481740ad9f7SMax Filippov .size = 0x00400000,
482740ad9f7SMax Filippov .sector_size = 0x10000,
483740ad9f7SMax Filippov };
484740ad9f7SMax Filippov
xtfpga_lx60_init(MachineState * machine)485188ce01dSMax Filippov static void xtfpga_lx60_init(MachineState *machine)
486b707ab75SMax Filippov {
487188ce01dSMax Filippov static const XtfpgaBoardDesc lx60_board = {
488740ad9f7SMax Filippov .flash = &lx60_flash,
489b707ab75SMax Filippov .sram_size = 0x20000,
49085e2d8d5SMax Filippov .io = xtfpga_mmu_io,
49185e2d8d5SMax Filippov };
49285e2d8d5SMax Filippov xtfpga_init(&lx60_board, machine);
49385e2d8d5SMax Filippov }
49485e2d8d5SMax Filippov
xtfpga_lx60_nommu_init(MachineState * machine)49585e2d8d5SMax Filippov static void xtfpga_lx60_nommu_init(MachineState *machine)
49685e2d8d5SMax Filippov {
49785e2d8d5SMax Filippov static const XtfpgaBoardDesc lx60_board = {
49885e2d8d5SMax Filippov .flash = &lx60_flash,
49985e2d8d5SMax Filippov .sram_size = 0x20000,
50085e2d8d5SMax Filippov .io = xtfpga_nommu_io,
501b707ab75SMax Filippov };
502188ce01dSMax Filippov xtfpga_init(&lx60_board, machine);
503b707ab75SMax Filippov }
504b707ab75SMax Filippov
505740ad9f7SMax Filippov static const XtfpgaFlashDesc lx200_flash = {
506740ad9f7SMax Filippov .base = 0x08000000,
507740ad9f7SMax Filippov .size = 0x01000000,
508740ad9f7SMax Filippov .sector_size = 0x20000,
509740ad9f7SMax Filippov };
510740ad9f7SMax Filippov
xtfpga_lx200_init(MachineState * machine)511188ce01dSMax Filippov static void xtfpga_lx200_init(MachineState *machine)
512b707ab75SMax Filippov {
513188ce01dSMax Filippov static const XtfpgaBoardDesc lx200_board = {
514740ad9f7SMax Filippov .flash = &lx200_flash,
515b707ab75SMax Filippov .sram_size = 0x2000000,
51685e2d8d5SMax Filippov .io = xtfpga_mmu_io,
51785e2d8d5SMax Filippov };
51885e2d8d5SMax Filippov xtfpga_init(&lx200_board, machine);
51985e2d8d5SMax Filippov }
52085e2d8d5SMax Filippov
xtfpga_lx200_nommu_init(MachineState * machine)52185e2d8d5SMax Filippov static void xtfpga_lx200_nommu_init(MachineState *machine)
52285e2d8d5SMax Filippov {
52385e2d8d5SMax Filippov static const XtfpgaBoardDesc lx200_board = {
52485e2d8d5SMax Filippov .flash = &lx200_flash,
52585e2d8d5SMax Filippov .sram_size = 0x2000000,
52685e2d8d5SMax Filippov .io = xtfpga_nommu_io,
527b707ab75SMax Filippov };
528188ce01dSMax Filippov xtfpga_init(&lx200_board, machine);
529b707ab75SMax Filippov }
530b707ab75SMax Filippov
531740ad9f7SMax Filippov static const XtfpgaFlashDesc ml605_flash = {
532740ad9f7SMax Filippov .base = 0x08000000,
533740ad9f7SMax Filippov .size = 0x01000000,
534740ad9f7SMax Filippov .sector_size = 0x20000,
535740ad9f7SMax Filippov };
536740ad9f7SMax Filippov
xtfpga_ml605_init(MachineState * machine)537188ce01dSMax Filippov static void xtfpga_ml605_init(MachineState *machine)
538b707ab75SMax Filippov {
539188ce01dSMax Filippov static const XtfpgaBoardDesc ml605_board = {
540740ad9f7SMax Filippov .flash = &ml605_flash,
541b707ab75SMax Filippov .sram_size = 0x2000000,
54285e2d8d5SMax Filippov .io = xtfpga_mmu_io,
54385e2d8d5SMax Filippov };
54485e2d8d5SMax Filippov xtfpga_init(&ml605_board, machine);
54585e2d8d5SMax Filippov }
54685e2d8d5SMax Filippov
xtfpga_ml605_nommu_init(MachineState * machine)54785e2d8d5SMax Filippov static void xtfpga_ml605_nommu_init(MachineState *machine)
54885e2d8d5SMax Filippov {
54985e2d8d5SMax Filippov static const XtfpgaBoardDesc ml605_board = {
55085e2d8d5SMax Filippov .flash = &ml605_flash,
55185e2d8d5SMax Filippov .sram_size = 0x2000000,
55285e2d8d5SMax Filippov .io = xtfpga_nommu_io,
553b707ab75SMax Filippov };
554188ce01dSMax Filippov xtfpga_init(&ml605_board, machine);
555b707ab75SMax Filippov }
556b707ab75SMax Filippov
557740ad9f7SMax Filippov static const XtfpgaFlashDesc kc705_flash = {
558740ad9f7SMax Filippov .base = 0x00000000,
559740ad9f7SMax Filippov .size = 0x08000000,
560740ad9f7SMax Filippov .boot_base = 0x06000000,
561740ad9f7SMax Filippov .sector_size = 0x20000,
562740ad9f7SMax Filippov };
563740ad9f7SMax Filippov
xtfpga_kc705_init(MachineState * machine)564188ce01dSMax Filippov static void xtfpga_kc705_init(MachineState *machine)
565b707ab75SMax Filippov {
566188ce01dSMax Filippov static const XtfpgaBoardDesc kc705_board = {
567740ad9f7SMax Filippov .flash = &kc705_flash,
568b707ab75SMax Filippov .sram_size = 0x2000000,
56985e2d8d5SMax Filippov .io = xtfpga_mmu_io,
57085e2d8d5SMax Filippov };
57185e2d8d5SMax Filippov xtfpga_init(&kc705_board, machine);
57285e2d8d5SMax Filippov }
57385e2d8d5SMax Filippov
xtfpga_kc705_nommu_init(MachineState * machine)57485e2d8d5SMax Filippov static void xtfpga_kc705_nommu_init(MachineState *machine)
57585e2d8d5SMax Filippov {
57685e2d8d5SMax Filippov static const XtfpgaBoardDesc kc705_board = {
57785e2d8d5SMax Filippov .flash = &kc705_flash,
57885e2d8d5SMax Filippov .sram_size = 0x2000000,
57985e2d8d5SMax Filippov .io = xtfpga_nommu_io,
580b707ab75SMax Filippov };
581188ce01dSMax Filippov xtfpga_init(&kc705_board, machine);
582b707ab75SMax Filippov }
583b707ab75SMax Filippov
xtfpga_lx60_class_init(ObjectClass * oc,void * data)584188ce01dSMax Filippov static void xtfpga_lx60_class_init(ObjectClass *oc, void *data)
585b707ab75SMax Filippov {
5868a661aeaSAndreas Färber MachineClass *mc = MACHINE_CLASS(oc);
5878a661aeaSAndreas Färber
588e264d29dSEduardo Habkost mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
589188ce01dSMax Filippov mc->init = xtfpga_lx60_init;
590174e09b7SMax Filippov mc->max_cpus = 32;
591f83eb10dSIgor Mammedov mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
59259b5e9bbSMax Filippov mc->default_ram_size = 64 * MiB;
593b707ab75SMax Filippov }
594b707ab75SMax Filippov
595188ce01dSMax Filippov static const TypeInfo xtfpga_lx60_type = {
5968a661aeaSAndreas Färber .name = MACHINE_TYPE_NAME("lx60"),
5978a661aeaSAndreas Färber .parent = TYPE_MACHINE,
598188ce01dSMax Filippov .class_init = xtfpga_lx60_class_init,
5998a661aeaSAndreas Färber };
600e264d29dSEduardo Habkost
xtfpga_lx60_nommu_class_init(ObjectClass * oc,void * data)60185e2d8d5SMax Filippov static void xtfpga_lx60_nommu_class_init(ObjectClass *oc, void *data)
60285e2d8d5SMax Filippov {
60385e2d8d5SMax Filippov MachineClass *mc = MACHINE_CLASS(oc);
60485e2d8d5SMax Filippov
605a3c5e49dSMax Filippov mc->desc = "lx60 noMMU EVB (" XTENSA_DEFAULT_CPU_NOMMU_MODEL ")";
60685e2d8d5SMax Filippov mc->init = xtfpga_lx60_nommu_init;
607174e09b7SMax Filippov mc->max_cpus = 32;
608a3c5e49dSMax Filippov mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
60959b5e9bbSMax Filippov mc->default_ram_size = 64 * MiB;
61085e2d8d5SMax Filippov }
61185e2d8d5SMax Filippov
61285e2d8d5SMax Filippov static const TypeInfo xtfpga_lx60_nommu_type = {
61385e2d8d5SMax Filippov .name = MACHINE_TYPE_NAME("lx60-nommu"),
61485e2d8d5SMax Filippov .parent = TYPE_MACHINE,
61585e2d8d5SMax Filippov .class_init = xtfpga_lx60_nommu_class_init,
61685e2d8d5SMax Filippov };
61785e2d8d5SMax Filippov
xtfpga_lx200_class_init(ObjectClass * oc,void * data)618188ce01dSMax Filippov static void xtfpga_lx200_class_init(ObjectClass *oc, void *data)
619e264d29dSEduardo Habkost {
6208a661aeaSAndreas Färber MachineClass *mc = MACHINE_CLASS(oc);
6218a661aeaSAndreas Färber
622e264d29dSEduardo Habkost mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
623188ce01dSMax Filippov mc->init = xtfpga_lx200_init;
624174e09b7SMax Filippov mc->max_cpus = 32;
625f83eb10dSIgor Mammedov mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
62659b5e9bbSMax Filippov mc->default_ram_size = 96 * MiB;
627e264d29dSEduardo Habkost }
628e264d29dSEduardo Habkost
629188ce01dSMax Filippov static const TypeInfo xtfpga_lx200_type = {
6308a661aeaSAndreas Färber .name = MACHINE_TYPE_NAME("lx200"),
6318a661aeaSAndreas Färber .parent = TYPE_MACHINE,
632188ce01dSMax Filippov .class_init = xtfpga_lx200_class_init,
6338a661aeaSAndreas Färber };
634e264d29dSEduardo Habkost
xtfpga_lx200_nommu_class_init(ObjectClass * oc,void * data)63585e2d8d5SMax Filippov static void xtfpga_lx200_nommu_class_init(ObjectClass *oc, void *data)
63685e2d8d5SMax Filippov {
63785e2d8d5SMax Filippov MachineClass *mc = MACHINE_CLASS(oc);
63885e2d8d5SMax Filippov
639a3c5e49dSMax Filippov mc->desc = "lx200 noMMU EVB (" XTENSA_DEFAULT_CPU_NOMMU_MODEL ")";
64085e2d8d5SMax Filippov mc->init = xtfpga_lx200_nommu_init;
641174e09b7SMax Filippov mc->max_cpus = 32;
642a3c5e49dSMax Filippov mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
64359b5e9bbSMax Filippov mc->default_ram_size = 96 * MiB;
64485e2d8d5SMax Filippov }
64585e2d8d5SMax Filippov
64685e2d8d5SMax Filippov static const TypeInfo xtfpga_lx200_nommu_type = {
64785e2d8d5SMax Filippov .name = MACHINE_TYPE_NAME("lx200-nommu"),
64885e2d8d5SMax Filippov .parent = TYPE_MACHINE,
64985e2d8d5SMax Filippov .class_init = xtfpga_lx200_nommu_class_init,
65085e2d8d5SMax Filippov };
65185e2d8d5SMax Filippov
xtfpga_ml605_class_init(ObjectClass * oc,void * data)652188ce01dSMax Filippov static void xtfpga_ml605_class_init(ObjectClass *oc, void *data)
653e264d29dSEduardo Habkost {
6548a661aeaSAndreas Färber MachineClass *mc = MACHINE_CLASS(oc);
6558a661aeaSAndreas Färber
656e264d29dSEduardo Habkost mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
657188ce01dSMax Filippov mc->init = xtfpga_ml605_init;
658174e09b7SMax Filippov mc->max_cpus = 32;
659f83eb10dSIgor Mammedov mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
66059b5e9bbSMax Filippov mc->default_ram_size = 512 * MiB - XTFPGA_MMU_RESERVED_MEMORY_SIZE;
661e264d29dSEduardo Habkost }
662e264d29dSEduardo Habkost
663188ce01dSMax Filippov static const TypeInfo xtfpga_ml605_type = {
6648a661aeaSAndreas Färber .name = MACHINE_TYPE_NAME("ml605"),
6658a661aeaSAndreas Färber .parent = TYPE_MACHINE,
666188ce01dSMax Filippov .class_init = xtfpga_ml605_class_init,
6678a661aeaSAndreas Färber };
668e264d29dSEduardo Habkost
xtfpga_ml605_nommu_class_init(ObjectClass * oc,void * data)66985e2d8d5SMax Filippov static void xtfpga_ml605_nommu_class_init(ObjectClass *oc, void *data)
67085e2d8d5SMax Filippov {
67185e2d8d5SMax Filippov MachineClass *mc = MACHINE_CLASS(oc);
67285e2d8d5SMax Filippov
673a3c5e49dSMax Filippov mc->desc = "ml605 noMMU EVB (" XTENSA_DEFAULT_CPU_NOMMU_MODEL ")";
67485e2d8d5SMax Filippov mc->init = xtfpga_ml605_nommu_init;
675174e09b7SMax Filippov mc->max_cpus = 32;
676a3c5e49dSMax Filippov mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
67759b5e9bbSMax Filippov mc->default_ram_size = 256 * MiB;
67885e2d8d5SMax Filippov }
67985e2d8d5SMax Filippov
68085e2d8d5SMax Filippov static const TypeInfo xtfpga_ml605_nommu_type = {
68185e2d8d5SMax Filippov .name = MACHINE_TYPE_NAME("ml605-nommu"),
68285e2d8d5SMax Filippov .parent = TYPE_MACHINE,
68385e2d8d5SMax Filippov .class_init = xtfpga_ml605_nommu_class_init,
68485e2d8d5SMax Filippov };
68585e2d8d5SMax Filippov
xtfpga_kc705_class_init(ObjectClass * oc,void * data)686188ce01dSMax Filippov static void xtfpga_kc705_class_init(ObjectClass *oc, void *data)
687e264d29dSEduardo Habkost {
6888a661aeaSAndreas Färber MachineClass *mc = MACHINE_CLASS(oc);
6898a661aeaSAndreas Färber
690e264d29dSEduardo Habkost mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
691188ce01dSMax Filippov mc->init = xtfpga_kc705_init;
692174e09b7SMax Filippov mc->max_cpus = 32;
693f83eb10dSIgor Mammedov mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
69459b5e9bbSMax Filippov mc->default_ram_size = 1 * GiB - XTFPGA_MMU_RESERVED_MEMORY_SIZE;
695e264d29dSEduardo Habkost }
696e264d29dSEduardo Habkost
697188ce01dSMax Filippov static const TypeInfo xtfpga_kc705_type = {
6988a661aeaSAndreas Färber .name = MACHINE_TYPE_NAME("kc705"),
6998a661aeaSAndreas Färber .parent = TYPE_MACHINE,
700188ce01dSMax Filippov .class_init = xtfpga_kc705_class_init,
7018a661aeaSAndreas Färber };
7028a661aeaSAndreas Färber
xtfpga_kc705_nommu_class_init(ObjectClass * oc,void * data)70385e2d8d5SMax Filippov static void xtfpga_kc705_nommu_class_init(ObjectClass *oc, void *data)
70485e2d8d5SMax Filippov {
70585e2d8d5SMax Filippov MachineClass *mc = MACHINE_CLASS(oc);
70685e2d8d5SMax Filippov
707a3c5e49dSMax Filippov mc->desc = "kc705 noMMU EVB (" XTENSA_DEFAULT_CPU_NOMMU_MODEL ")";
70885e2d8d5SMax Filippov mc->init = xtfpga_kc705_nommu_init;
709174e09b7SMax Filippov mc->max_cpus = 32;
710a3c5e49dSMax Filippov mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
71159b5e9bbSMax Filippov mc->default_ram_size = 256 * MiB;
71285e2d8d5SMax Filippov }
71385e2d8d5SMax Filippov
71485e2d8d5SMax Filippov static const TypeInfo xtfpga_kc705_nommu_type = {
71585e2d8d5SMax Filippov .name = MACHINE_TYPE_NAME("kc705-nommu"),
71685e2d8d5SMax Filippov .parent = TYPE_MACHINE,
71785e2d8d5SMax Filippov .class_init = xtfpga_kc705_nommu_class_init,
71885e2d8d5SMax Filippov };
71985e2d8d5SMax Filippov
xtfpga_machines_init(void)720188ce01dSMax Filippov static void xtfpga_machines_init(void)
7218a661aeaSAndreas Färber {
722188ce01dSMax Filippov type_register_static(&xtfpga_lx60_type);
723188ce01dSMax Filippov type_register_static(&xtfpga_lx200_type);
724188ce01dSMax Filippov type_register_static(&xtfpga_ml605_type);
725188ce01dSMax Filippov type_register_static(&xtfpga_kc705_type);
72685e2d8d5SMax Filippov type_register_static(&xtfpga_lx60_nommu_type);
72785e2d8d5SMax Filippov type_register_static(&xtfpga_lx200_nommu_type);
72885e2d8d5SMax Filippov type_register_static(&xtfpga_ml605_nommu_type);
72985e2d8d5SMax Filippov type_register_static(&xtfpga_kc705_nommu_type);
7308a661aeaSAndreas Färber }
7318a661aeaSAndreas Färber
732188ce01dSMax Filippov type_init(xtfpga_machines_init)
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