1b707ab75SMax Filippov /* 2b707ab75SMax Filippov * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. 3b707ab75SMax Filippov * All rights reserved. 4b707ab75SMax Filippov * 5b707ab75SMax Filippov * Redistribution and use in source and binary forms, with or without 6b707ab75SMax Filippov * modification, are permitted provided that the following conditions are met: 7b707ab75SMax Filippov * * Redistributions of source code must retain the above copyright 8b707ab75SMax Filippov * notice, this list of conditions and the following disclaimer. 9b707ab75SMax Filippov * * Redistributions in binary form must reproduce the above copyright 10b707ab75SMax Filippov * notice, this list of conditions and the following disclaimer in the 11b707ab75SMax Filippov * documentation and/or other materials provided with the distribution. 12b707ab75SMax Filippov * * Neither the name of the Open Source and Linux Lab nor the 13b707ab75SMax Filippov * names of its contributors may be used to endorse or promote products 14b707ab75SMax Filippov * derived from this software without specific prior written permission. 15b707ab75SMax Filippov * 16b707ab75SMax Filippov * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17b707ab75SMax Filippov * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18b707ab75SMax Filippov * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19b707ab75SMax Filippov * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 20b707ab75SMax Filippov * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21b707ab75SMax Filippov * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22b707ab75SMax Filippov * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23b707ab75SMax Filippov * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24b707ab75SMax Filippov * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25b707ab75SMax Filippov * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26b707ab75SMax Filippov */ 27b707ab75SMax Filippov 28b707ab75SMax Filippov #include "sysemu/sysemu.h" 29b707ab75SMax Filippov #include "hw/boards.h" 30b707ab75SMax Filippov #include "hw/loader.h" 31b707ab75SMax Filippov #include "elf.h" 32b707ab75SMax Filippov #include "exec/memory.h" 33b707ab75SMax Filippov #include "exec/address-spaces.h" 34b707ab75SMax Filippov #include "hw/char/serial.h" 35b707ab75SMax Filippov #include "net/net.h" 36b707ab75SMax Filippov #include "hw/sysbus.h" 37b707ab75SMax Filippov #include "hw/block/flash.h" 38fa1d36dfSMarkus Armbruster #include "sysemu/block-backend.h" 39b707ab75SMax Filippov #include "sysemu/char.h" 40996dfe98SMax Filippov #include "sysemu/device_tree.h" 418488ab02SMax Filippov #include "qemu/error-report.h" 42b707ab75SMax Filippov #include "bootparam.h" 43b707ab75SMax Filippov 44b707ab75SMax Filippov typedef struct LxBoardDesc { 45b707ab75SMax Filippov hwaddr flash_base; 46b707ab75SMax Filippov size_t flash_size; 47b707ab75SMax Filippov size_t flash_boot_base; 48b707ab75SMax Filippov size_t flash_sector_size; 49b707ab75SMax Filippov size_t sram_size; 50b707ab75SMax Filippov } LxBoardDesc; 51b707ab75SMax Filippov 52b707ab75SMax Filippov typedef struct Lx60FpgaState { 53b707ab75SMax Filippov MemoryRegion iomem; 54b707ab75SMax Filippov uint32_t leds; 55b707ab75SMax Filippov uint32_t switches; 56b707ab75SMax Filippov } Lx60FpgaState; 57b707ab75SMax Filippov 58b707ab75SMax Filippov static void lx60_fpga_reset(void *opaque) 59b707ab75SMax Filippov { 60b707ab75SMax Filippov Lx60FpgaState *s = opaque; 61b707ab75SMax Filippov 62b707ab75SMax Filippov s->leds = 0; 63b707ab75SMax Filippov s->switches = 0; 64b707ab75SMax Filippov } 65b707ab75SMax Filippov 66b707ab75SMax Filippov static uint64_t lx60_fpga_read(void *opaque, hwaddr addr, 67b707ab75SMax Filippov unsigned size) 68b707ab75SMax Filippov { 69b707ab75SMax Filippov Lx60FpgaState *s = opaque; 70b707ab75SMax Filippov 71b707ab75SMax Filippov switch (addr) { 72b707ab75SMax Filippov case 0x0: /*build date code*/ 73b707ab75SMax Filippov return 0x09272011; 74b707ab75SMax Filippov 75b707ab75SMax Filippov case 0x4: /*processor clock frequency, Hz*/ 76b707ab75SMax Filippov return 10000000; 77b707ab75SMax Filippov 78b707ab75SMax Filippov case 0x8: /*LEDs (off = 0, on = 1)*/ 79b707ab75SMax Filippov return s->leds; 80b707ab75SMax Filippov 81b707ab75SMax Filippov case 0xc: /*DIP switches (off = 0, on = 1)*/ 82b707ab75SMax Filippov return s->switches; 83b707ab75SMax Filippov } 84b707ab75SMax Filippov return 0; 85b707ab75SMax Filippov } 86b707ab75SMax Filippov 87b707ab75SMax Filippov static void lx60_fpga_write(void *opaque, hwaddr addr, 88b707ab75SMax Filippov uint64_t val, unsigned size) 89b707ab75SMax Filippov { 90b707ab75SMax Filippov Lx60FpgaState *s = opaque; 91b707ab75SMax Filippov 92b707ab75SMax Filippov switch (addr) { 93b707ab75SMax Filippov case 0x8: /*LEDs (off = 0, on = 1)*/ 94b707ab75SMax Filippov s->leds = val; 95b707ab75SMax Filippov break; 96b707ab75SMax Filippov 97b707ab75SMax Filippov case 0x10: /*board reset*/ 98b707ab75SMax Filippov if (val == 0xdead) { 99b707ab75SMax Filippov qemu_system_reset_request(); 100b707ab75SMax Filippov } 101b707ab75SMax Filippov break; 102b707ab75SMax Filippov } 103b707ab75SMax Filippov } 104b707ab75SMax Filippov 105b707ab75SMax Filippov static const MemoryRegionOps lx60_fpga_ops = { 106b707ab75SMax Filippov .read = lx60_fpga_read, 107b707ab75SMax Filippov .write = lx60_fpga_write, 108b707ab75SMax Filippov .endianness = DEVICE_NATIVE_ENDIAN, 109b707ab75SMax Filippov }; 110b707ab75SMax Filippov 111b707ab75SMax Filippov static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space, 112b707ab75SMax Filippov hwaddr base) 113b707ab75SMax Filippov { 114b707ab75SMax Filippov Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState)); 115b707ab75SMax Filippov 116b707ab75SMax Filippov memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s, 117b707ab75SMax Filippov "lx60.fpga", 0x10000); 118b707ab75SMax Filippov memory_region_add_subregion(address_space, base, &s->iomem); 119b707ab75SMax Filippov lx60_fpga_reset(s); 120b707ab75SMax Filippov qemu_register_reset(lx60_fpga_reset, s); 121b707ab75SMax Filippov return s; 122b707ab75SMax Filippov } 123b707ab75SMax Filippov 124b707ab75SMax Filippov static void lx60_net_init(MemoryRegion *address_space, 125b707ab75SMax Filippov hwaddr base, 126b707ab75SMax Filippov hwaddr descriptors, 127b707ab75SMax Filippov hwaddr buffers, 128b707ab75SMax Filippov qemu_irq irq, NICInfo *nd) 129b707ab75SMax Filippov { 130b707ab75SMax Filippov DeviceState *dev; 131b707ab75SMax Filippov SysBusDevice *s; 132b707ab75SMax Filippov MemoryRegion *ram; 133b707ab75SMax Filippov 134b707ab75SMax Filippov dev = qdev_create(NULL, "open_eth"); 135b707ab75SMax Filippov qdev_set_nic_properties(dev, nd); 136b707ab75SMax Filippov qdev_init_nofail(dev); 137b707ab75SMax Filippov 138b707ab75SMax Filippov s = SYS_BUS_DEVICE(dev); 139b707ab75SMax Filippov sysbus_connect_irq(s, 0, irq); 140b707ab75SMax Filippov memory_region_add_subregion(address_space, base, 141b707ab75SMax Filippov sysbus_mmio_get_region(s, 0)); 142b707ab75SMax Filippov memory_region_add_subregion(address_space, descriptors, 143b707ab75SMax Filippov sysbus_mmio_get_region(s, 1)); 144b707ab75SMax Filippov 145b707ab75SMax Filippov ram = g_malloc(sizeof(*ram)); 146f8ed85acSMarkus Armbruster memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, 147f8ed85acSMarkus Armbruster &error_fatal); 148b707ab75SMax Filippov vmstate_register_ram_global(ram); 149b707ab75SMax Filippov memory_region_add_subregion(address_space, buffers, ram); 150b707ab75SMax Filippov } 151b707ab75SMax Filippov 152b707ab75SMax Filippov static uint64_t translate_phys_addr(void *opaque, uint64_t addr) 153b707ab75SMax Filippov { 154b707ab75SMax Filippov XtensaCPU *cpu = opaque; 155b707ab75SMax Filippov 156b707ab75SMax Filippov return cpu_get_phys_page_debug(CPU(cpu), addr); 157b707ab75SMax Filippov } 158b707ab75SMax Filippov 159b707ab75SMax Filippov static void lx60_reset(void *opaque) 160b707ab75SMax Filippov { 161b707ab75SMax Filippov XtensaCPU *cpu = opaque; 162b707ab75SMax Filippov 163b707ab75SMax Filippov cpu_reset(CPU(cpu)); 164b707ab75SMax Filippov } 165b707ab75SMax Filippov 1668bb3b575SMax Filippov static uint64_t lx60_io_read(void *opaque, hwaddr addr, 1678bb3b575SMax Filippov unsigned size) 1688bb3b575SMax Filippov { 1698bb3b575SMax Filippov return 0; 1708bb3b575SMax Filippov } 1718bb3b575SMax Filippov 1728bb3b575SMax Filippov static void lx60_io_write(void *opaque, hwaddr addr, 1738bb3b575SMax Filippov uint64_t val, unsigned size) 1748bb3b575SMax Filippov { 1758bb3b575SMax Filippov } 1768bb3b575SMax Filippov 1778bb3b575SMax Filippov static const MemoryRegionOps lx60_io_ops = { 1788bb3b575SMax Filippov .read = lx60_io_read, 1798bb3b575SMax Filippov .write = lx60_io_write, 1808bb3b575SMax Filippov .endianness = DEVICE_NATIVE_ENDIAN, 1818bb3b575SMax Filippov }; 1828bb3b575SMax Filippov 183b707ab75SMax Filippov static void lx_init(const LxBoardDesc *board, MachineState *machine) 184b707ab75SMax Filippov { 185b707ab75SMax Filippov #ifdef TARGET_WORDS_BIGENDIAN 186b707ab75SMax Filippov int be = 1; 187b707ab75SMax Filippov #else 188b707ab75SMax Filippov int be = 0; 189b707ab75SMax Filippov #endif 190b707ab75SMax Filippov MemoryRegion *system_memory = get_system_memory(); 191b707ab75SMax Filippov XtensaCPU *cpu = NULL; 192b707ab75SMax Filippov CPUXtensaState *env = NULL; 193b707ab75SMax Filippov MemoryRegion *ram, *rom, *system_io; 194b707ab75SMax Filippov DriveInfo *dinfo; 195b707ab75SMax Filippov pflash_t *flash = NULL; 19637b259d0SMax Filippov QemuOpts *machine_opts = qemu_get_machine_opts(); 197b707ab75SMax Filippov const char *cpu_model = machine->cpu_model; 19837b259d0SMax Filippov const char *kernel_filename = qemu_opt_get(machine_opts, "kernel"); 19937b259d0SMax Filippov const char *kernel_cmdline = qemu_opt_get(machine_opts, "append"); 200996dfe98SMax Filippov const char *dtb_filename = qemu_opt_get(machine_opts, "dtb"); 201f55b32e7SMax Filippov const char *initrd_filename = qemu_opt_get(machine_opts, "initrd"); 202b707ab75SMax Filippov int n; 203b707ab75SMax Filippov 204b707ab75SMax Filippov if (!cpu_model) { 205b707ab75SMax Filippov cpu_model = XTENSA_DEFAULT_CPU_MODEL; 206b707ab75SMax Filippov } 207b707ab75SMax Filippov 208b707ab75SMax Filippov for (n = 0; n < smp_cpus; n++) { 209b707ab75SMax Filippov cpu = cpu_xtensa_init(cpu_model); 210b707ab75SMax Filippov if (cpu == NULL) { 211ebbb419aSGonglei error_report("unable to find CPU definition '%s'", 2128488ab02SMax Filippov cpu_model); 2138488ab02SMax Filippov exit(EXIT_FAILURE); 214b707ab75SMax Filippov } 215b707ab75SMax Filippov env = &cpu->env; 216b707ab75SMax Filippov 217b707ab75SMax Filippov env->sregs[PRID] = n; 218b707ab75SMax Filippov qemu_register_reset(lx60_reset, cpu); 219b707ab75SMax Filippov /* Need MMU initialized prior to ELF loading, 220b707ab75SMax Filippov * so that ELF gets loaded into virtual addresses 221b707ab75SMax Filippov */ 222b707ab75SMax Filippov cpu_reset(CPU(cpu)); 223b707ab75SMax Filippov } 224b707ab75SMax Filippov 225b707ab75SMax Filippov ram = g_malloc(sizeof(*ram)); 22649946538SHu Tao memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size, 227f8ed85acSMarkus Armbruster &error_fatal); 228b707ab75SMax Filippov vmstate_register_ram_global(ram); 229b707ab75SMax Filippov memory_region_add_subregion(system_memory, 0, ram); 230b707ab75SMax Filippov 231b707ab75SMax Filippov system_io = g_malloc(sizeof(*system_io)); 2328bb3b575SMax Filippov memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io", 2338bb3b575SMax Filippov 224 * 1024 * 1024); 234b707ab75SMax Filippov memory_region_add_subregion(system_memory, 0xf0000000, system_io); 235b707ab75SMax Filippov lx60_fpga_init(system_io, 0x0d020000); 236b707ab75SMax Filippov if (nd_table[0].used) { 237b707ab75SMax Filippov lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000, 238b707ab75SMax Filippov xtensa_get_extint(env, 1), nd_table); 239b707ab75SMax Filippov } 240b707ab75SMax Filippov 241b707ab75SMax Filippov if (!serial_hds[0]) { 242b707ab75SMax Filippov serial_hds[0] = qemu_chr_new("serial0", "null", NULL); 243b707ab75SMax Filippov } 244b707ab75SMax Filippov 245b707ab75SMax Filippov serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0), 246b707ab75SMax Filippov 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); 247b707ab75SMax Filippov 248b707ab75SMax Filippov dinfo = drive_get(IF_PFLASH, 0, 0); 249b707ab75SMax Filippov if (dinfo) { 250b707ab75SMax Filippov flash = pflash_cfi01_register(board->flash_base, 251b707ab75SMax Filippov NULL, "lx60.io.flash", board->flash_size, 2524be74634SMarkus Armbruster blk_by_legacy_dinfo(dinfo), 253fa1d36dfSMarkus Armbruster board->flash_sector_size, 254b707ab75SMax Filippov board->flash_size / board->flash_sector_size, 255b707ab75SMax Filippov 4, 0x0000, 0x0000, 0x0000, 0x0000, be); 256b707ab75SMax Filippov if (flash == NULL) { 257ebbb419aSGonglei error_report("unable to mount pflash"); 2588488ab02SMax Filippov exit(EXIT_FAILURE); 259b707ab75SMax Filippov } 260b707ab75SMax Filippov } 261b707ab75SMax Filippov 262b707ab75SMax Filippov /* Use presence of kernel file name as 'boot from SRAM' switch. */ 263b707ab75SMax Filippov if (kernel_filename) { 264364d4802SMax Filippov uint32_t entry_point = env->pc; 265b6edea8bSMax Filippov size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */ 266a9a28591SMax Filippov uint32_t tagptr = 0xfe000000 + board->sram_size; 267a9a28591SMax Filippov uint32_t cur_tagptr; 268b6edea8bSMax Filippov BpMemInfo memory_location = { 269b6edea8bSMax Filippov .type = tswap32(MEMORY_TYPE_CONVENTIONAL), 270b6edea8bSMax Filippov .start = tswap32(0), 271b6edea8bSMax Filippov .end = tswap32(machine->ram_size), 272b6edea8bSMax Filippov }; 273996dfe98SMax Filippov uint32_t lowmem_end = machine->ram_size < 0x08000000 ? 274996dfe98SMax Filippov machine->ram_size : 0x08000000; 275996dfe98SMax Filippov uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); 276a9a28591SMax Filippov 277b707ab75SMax Filippov rom = g_malloc(sizeof(*rom)); 27849946538SHu Tao memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size, 279f8ed85acSMarkus Armbruster &error_fatal); 280b707ab75SMax Filippov vmstate_register_ram_global(rom); 281b707ab75SMax Filippov memory_region_add_subregion(system_memory, 0xfe000000, rom); 282b707ab75SMax Filippov 283b707ab75SMax Filippov if (kernel_cmdline) { 284a9a28591SMax Filippov bp_size += get_tag_size(strlen(kernel_cmdline) + 1); 285a9a28591SMax Filippov } 286996dfe98SMax Filippov if (dtb_filename) { 287996dfe98SMax Filippov bp_size += get_tag_size(sizeof(uint32_t)); 288996dfe98SMax Filippov } 289f55b32e7SMax Filippov if (initrd_filename) { 290f55b32e7SMax Filippov bp_size += get_tag_size(sizeof(BpMemInfo)); 291f55b32e7SMax Filippov } 292b707ab75SMax Filippov 293a9a28591SMax Filippov /* Put kernel bootparameters to the end of that SRAM */ 294a9a28591SMax Filippov tagptr = (tagptr - bp_size) & ~0xff; 295a9a28591SMax Filippov cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL); 296b6edea8bSMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY, 297b6edea8bSMax Filippov sizeof(memory_location), &memory_location); 298a9a28591SMax Filippov 299a9a28591SMax Filippov if (kernel_cmdline) { 300a9a28591SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE, 301a9a28591SMax Filippov strlen(kernel_cmdline) + 1, kernel_cmdline); 302a9a28591SMax Filippov } 303996dfe98SMax Filippov if (dtb_filename) { 304996dfe98SMax Filippov int fdt_size; 305996dfe98SMax Filippov void *fdt = load_device_tree(dtb_filename, &fdt_size); 306996dfe98SMax Filippov uint32_t dtb_addr = tswap32(cur_lowmem); 307996dfe98SMax Filippov 308996dfe98SMax Filippov if (!fdt) { 309ebbb419aSGonglei error_report("could not load DTB '%s'", dtb_filename); 310996dfe98SMax Filippov exit(EXIT_FAILURE); 311996dfe98SMax Filippov } 312996dfe98SMax Filippov 313996dfe98SMax Filippov cpu_physical_memory_write(cur_lowmem, fdt, fdt_size); 314996dfe98SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT, 315996dfe98SMax Filippov sizeof(dtb_addr), &dtb_addr); 316996dfe98SMax Filippov cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096); 317996dfe98SMax Filippov } 318f55b32e7SMax Filippov if (initrd_filename) { 319f55b32e7SMax Filippov BpMemInfo initrd_location = { 0 }; 320f55b32e7SMax Filippov int initrd_size = load_ramdisk(initrd_filename, cur_lowmem, 321f55b32e7SMax Filippov lowmem_end - cur_lowmem); 322f55b32e7SMax Filippov 323f55b32e7SMax Filippov if (initrd_size < 0) { 324f55b32e7SMax Filippov initrd_size = load_image_targphys(initrd_filename, 325f55b32e7SMax Filippov cur_lowmem, 326f55b32e7SMax Filippov lowmem_end - cur_lowmem); 327f55b32e7SMax Filippov } 328f55b32e7SMax Filippov if (initrd_size < 0) { 329ebbb419aSGonglei error_report("could not load initrd '%s'", initrd_filename); 330f55b32e7SMax Filippov exit(EXIT_FAILURE); 331f55b32e7SMax Filippov } 332f55b32e7SMax Filippov initrd_location.start = tswap32(cur_lowmem); 333f55b32e7SMax Filippov initrd_location.end = tswap32(cur_lowmem + initrd_size); 334f55b32e7SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD, 335f55b32e7SMax Filippov sizeof(initrd_location), &initrd_location); 336f55b32e7SMax Filippov cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096); 337f55b32e7SMax Filippov } 338a9a28591SMax Filippov cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL); 339b707ab75SMax Filippov env->regs[2] = tagptr; 340b707ab75SMax Filippov 341b707ab75SMax Filippov uint64_t elf_entry; 342b707ab75SMax Filippov uint64_t elf_lowaddr; 343b707ab75SMax Filippov int success = load_elf(kernel_filename, translate_phys_addr, cpu, 344b707ab75SMax Filippov &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0); 345b707ab75SMax Filippov if (success > 0) { 346364d4802SMax Filippov entry_point = elf_entry; 347364d4802SMax Filippov } else { 348364d4802SMax Filippov hwaddr ep; 349364d4802SMax Filippov int is_linux; 35025bda50aSMax Filippov success = load_uimage(kernel_filename, &ep, NULL, &is_linux, 3516d2e4530SMax Filippov translate_phys_addr, cpu); 352364d4802SMax Filippov if (success > 0 && is_linux) { 353364d4802SMax Filippov entry_point = ep; 354364d4802SMax Filippov } else { 355ebbb419aSGonglei error_report("could not load kernel '%s'", 356364d4802SMax Filippov kernel_filename); 357364d4802SMax Filippov exit(EXIT_FAILURE); 358364d4802SMax Filippov } 359364d4802SMax Filippov } 360364d4802SMax Filippov if (entry_point != env->pc) { 361364d4802SMax Filippov static const uint8_t jx_a0[] = { 362364d4802SMax Filippov #ifdef TARGET_WORDS_BIGENDIAN 363364d4802SMax Filippov 0x0a, 0, 0, 364364d4802SMax Filippov #else 365364d4802SMax Filippov 0xa0, 0, 0, 366364d4802SMax Filippov #endif 367364d4802SMax Filippov }; 368364d4802SMax Filippov env->regs[0] = entry_point; 369364d4802SMax Filippov cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0)); 370b707ab75SMax Filippov } 371b707ab75SMax Filippov } else { 372b707ab75SMax Filippov if (flash) { 373b707ab75SMax Filippov MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); 374b707ab75SMax Filippov MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); 375b707ab75SMax Filippov 376b707ab75SMax Filippov memory_region_init_alias(flash_io, NULL, "lx60.flash", 377b707ab75SMax Filippov flash_mr, board->flash_boot_base, 378b707ab75SMax Filippov board->flash_size - board->flash_boot_base < 0x02000000 ? 379b707ab75SMax Filippov board->flash_size - board->flash_boot_base : 0x02000000); 380b707ab75SMax Filippov memory_region_add_subregion(system_memory, 0xfe000000, 381b707ab75SMax Filippov flash_io); 382b707ab75SMax Filippov } 383b707ab75SMax Filippov } 384b707ab75SMax Filippov } 385b707ab75SMax Filippov 386b707ab75SMax Filippov static void xtensa_lx60_init(MachineState *machine) 387b707ab75SMax Filippov { 388b707ab75SMax Filippov static const LxBoardDesc lx60_board = { 389b707ab75SMax Filippov .flash_base = 0xf8000000, 390b707ab75SMax Filippov .flash_size = 0x00400000, 391b707ab75SMax Filippov .flash_sector_size = 0x10000, 392b707ab75SMax Filippov .sram_size = 0x20000, 393b707ab75SMax Filippov }; 394b707ab75SMax Filippov lx_init(&lx60_board, machine); 395b707ab75SMax Filippov } 396b707ab75SMax Filippov 397b707ab75SMax Filippov static void xtensa_lx200_init(MachineState *machine) 398b707ab75SMax Filippov { 399b707ab75SMax Filippov static const LxBoardDesc lx200_board = { 400b707ab75SMax Filippov .flash_base = 0xf8000000, 401b707ab75SMax Filippov .flash_size = 0x01000000, 402b707ab75SMax Filippov .flash_sector_size = 0x20000, 403b707ab75SMax Filippov .sram_size = 0x2000000, 404b707ab75SMax Filippov }; 405b707ab75SMax Filippov lx_init(&lx200_board, machine); 406b707ab75SMax Filippov } 407b707ab75SMax Filippov 408b707ab75SMax Filippov static void xtensa_ml605_init(MachineState *machine) 409b707ab75SMax Filippov { 410b707ab75SMax Filippov static const LxBoardDesc ml605_board = { 411b707ab75SMax Filippov .flash_base = 0xf8000000, 41212004c9eSMax Filippov .flash_size = 0x01000000, 413b707ab75SMax Filippov .flash_sector_size = 0x20000, 414b707ab75SMax Filippov .sram_size = 0x2000000, 415b707ab75SMax Filippov }; 416b707ab75SMax Filippov lx_init(&ml605_board, machine); 417b707ab75SMax Filippov } 418b707ab75SMax Filippov 419b707ab75SMax Filippov static void xtensa_kc705_init(MachineState *machine) 420b707ab75SMax Filippov { 421b707ab75SMax Filippov static const LxBoardDesc kc705_board = { 422b707ab75SMax Filippov .flash_base = 0xf0000000, 423b707ab75SMax Filippov .flash_size = 0x08000000, 424b707ab75SMax Filippov .flash_boot_base = 0x06000000, 425b707ab75SMax Filippov .flash_sector_size = 0x20000, 426b707ab75SMax Filippov .sram_size = 0x2000000, 427b707ab75SMax Filippov }; 428b707ab75SMax Filippov lx_init(&kc705_board, machine); 429b707ab75SMax Filippov } 430b707ab75SMax Filippov 431*e264d29dSEduardo Habkost static void xtensa_lx60_machine_init(MachineClass *mc) 432b707ab75SMax Filippov { 433*e264d29dSEduardo Habkost mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; 434*e264d29dSEduardo Habkost mc->init = xtensa_lx60_init; 435*e264d29dSEduardo Habkost mc->max_cpus = 4; 436b707ab75SMax Filippov } 437b707ab75SMax Filippov 438*e264d29dSEduardo Habkost DEFINE_MACHINE("lx60", xtensa_lx60_machine_init) 439*e264d29dSEduardo Habkost 440*e264d29dSEduardo Habkost static void xtensa_lx200_machine_init(MachineClass *mc) 441*e264d29dSEduardo Habkost { 442*e264d29dSEduardo Habkost mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; 443*e264d29dSEduardo Habkost mc->init = xtensa_lx200_init; 444*e264d29dSEduardo Habkost mc->max_cpus = 4; 445*e264d29dSEduardo Habkost } 446*e264d29dSEduardo Habkost 447*e264d29dSEduardo Habkost DEFINE_MACHINE("lx200", xtensa_lx200_machine_init) 448*e264d29dSEduardo Habkost 449*e264d29dSEduardo Habkost static void xtensa_ml605_machine_init(MachineClass *mc) 450*e264d29dSEduardo Habkost { 451*e264d29dSEduardo Habkost mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; 452*e264d29dSEduardo Habkost mc->init = xtensa_ml605_init; 453*e264d29dSEduardo Habkost mc->max_cpus = 4; 454*e264d29dSEduardo Habkost } 455*e264d29dSEduardo Habkost 456*e264d29dSEduardo Habkost DEFINE_MACHINE("ml605", xtensa_ml605_machine_init) 457*e264d29dSEduardo Habkost 458*e264d29dSEduardo Habkost static void xtensa_kc705_machine_init(MachineClass *mc) 459*e264d29dSEduardo Habkost { 460*e264d29dSEduardo Habkost mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; 461*e264d29dSEduardo Habkost mc->init = xtensa_kc705_init; 462*e264d29dSEduardo Habkost mc->max_cpus = 4; 463*e264d29dSEduardo Habkost } 464*e264d29dSEduardo Habkost 465*e264d29dSEduardo Habkost DEFINE_MACHINE("kc705", xtensa_kc705_machine_init) 466