1 /* 2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of the Open Source and Linux Lab nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include "sysemu/sysemu.h" 29 #include "hw/boards.h" 30 #include "hw/loader.h" 31 #include "elf.h" 32 #include "exec/memory.h" 33 #include "exec/address-spaces.h" 34 #include "hw/char/serial.h" 35 #include "net/net.h" 36 #include "hw/sysbus.h" 37 #include "hw/block/flash.h" 38 #include "sysemu/block-backend.h" 39 #include "sysemu/char.h" 40 #include "sysemu/device_tree.h" 41 #include "qemu/error-report.h" 42 #include "bootparam.h" 43 44 typedef struct LxBoardDesc { 45 hwaddr flash_base; 46 size_t flash_size; 47 size_t flash_boot_base; 48 size_t flash_sector_size; 49 size_t sram_size; 50 } LxBoardDesc; 51 52 typedef struct Lx60FpgaState { 53 MemoryRegion iomem; 54 uint32_t leds; 55 uint32_t switches; 56 } Lx60FpgaState; 57 58 static void lx60_fpga_reset(void *opaque) 59 { 60 Lx60FpgaState *s = opaque; 61 62 s->leds = 0; 63 s->switches = 0; 64 } 65 66 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr, 67 unsigned size) 68 { 69 Lx60FpgaState *s = opaque; 70 71 switch (addr) { 72 case 0x0: /*build date code*/ 73 return 0x09272011; 74 75 case 0x4: /*processor clock frequency, Hz*/ 76 return 10000000; 77 78 case 0x8: /*LEDs (off = 0, on = 1)*/ 79 return s->leds; 80 81 case 0xc: /*DIP switches (off = 0, on = 1)*/ 82 return s->switches; 83 } 84 return 0; 85 } 86 87 static void lx60_fpga_write(void *opaque, hwaddr addr, 88 uint64_t val, unsigned size) 89 { 90 Lx60FpgaState *s = opaque; 91 92 switch (addr) { 93 case 0x8: /*LEDs (off = 0, on = 1)*/ 94 s->leds = val; 95 break; 96 97 case 0x10: /*board reset*/ 98 if (val == 0xdead) { 99 qemu_system_reset_request(); 100 } 101 break; 102 } 103 } 104 105 static const MemoryRegionOps lx60_fpga_ops = { 106 .read = lx60_fpga_read, 107 .write = lx60_fpga_write, 108 .endianness = DEVICE_NATIVE_ENDIAN, 109 }; 110 111 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space, 112 hwaddr base) 113 { 114 Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState)); 115 116 memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s, 117 "lx60.fpga", 0x10000); 118 memory_region_add_subregion(address_space, base, &s->iomem); 119 lx60_fpga_reset(s); 120 qemu_register_reset(lx60_fpga_reset, s); 121 return s; 122 } 123 124 static void lx60_net_init(MemoryRegion *address_space, 125 hwaddr base, 126 hwaddr descriptors, 127 hwaddr buffers, 128 qemu_irq irq, NICInfo *nd) 129 { 130 DeviceState *dev; 131 SysBusDevice *s; 132 MemoryRegion *ram; 133 134 dev = qdev_create(NULL, "open_eth"); 135 qdev_set_nic_properties(dev, nd); 136 qdev_init_nofail(dev); 137 138 s = SYS_BUS_DEVICE(dev); 139 sysbus_connect_irq(s, 0, irq); 140 memory_region_add_subregion(address_space, base, 141 sysbus_mmio_get_region(s, 0)); 142 memory_region_add_subregion(address_space, descriptors, 143 sysbus_mmio_get_region(s, 1)); 144 145 ram = g_malloc(sizeof(*ram)); 146 memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, &error_abort); 147 vmstate_register_ram_global(ram); 148 memory_region_add_subregion(address_space, buffers, ram); 149 } 150 151 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) 152 { 153 XtensaCPU *cpu = opaque; 154 155 return cpu_get_phys_page_debug(CPU(cpu), addr); 156 } 157 158 static void lx60_reset(void *opaque) 159 { 160 XtensaCPU *cpu = opaque; 161 162 cpu_reset(CPU(cpu)); 163 } 164 165 static void lx_init(const LxBoardDesc *board, MachineState *machine) 166 { 167 #ifdef TARGET_WORDS_BIGENDIAN 168 int be = 1; 169 #else 170 int be = 0; 171 #endif 172 MemoryRegion *system_memory = get_system_memory(); 173 XtensaCPU *cpu = NULL; 174 CPUXtensaState *env = NULL; 175 MemoryRegion *ram, *rom, *system_io; 176 DriveInfo *dinfo; 177 pflash_t *flash = NULL; 178 QemuOpts *machine_opts = qemu_get_machine_opts(); 179 const char *cpu_model = machine->cpu_model; 180 const char *kernel_filename = qemu_opt_get(machine_opts, "kernel"); 181 const char *kernel_cmdline = qemu_opt_get(machine_opts, "append"); 182 const char *dtb_filename = qemu_opt_get(machine_opts, "dtb"); 183 const char *initrd_filename = qemu_opt_get(machine_opts, "initrd"); 184 int n; 185 186 if (!cpu_model) { 187 cpu_model = XTENSA_DEFAULT_CPU_MODEL; 188 } 189 190 for (n = 0; n < smp_cpus; n++) { 191 cpu = cpu_xtensa_init(cpu_model); 192 if (cpu == NULL) { 193 error_report("unable to find CPU definition '%s'\n", 194 cpu_model); 195 exit(EXIT_FAILURE); 196 } 197 env = &cpu->env; 198 199 env->sregs[PRID] = n; 200 qemu_register_reset(lx60_reset, cpu); 201 /* Need MMU initialized prior to ELF loading, 202 * so that ELF gets loaded into virtual addresses 203 */ 204 cpu_reset(CPU(cpu)); 205 } 206 207 ram = g_malloc(sizeof(*ram)); 208 memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size, 209 &error_abort); 210 vmstate_register_ram_global(ram); 211 memory_region_add_subregion(system_memory, 0, ram); 212 213 system_io = g_malloc(sizeof(*system_io)); 214 memory_region_init(system_io, NULL, "lx60.io", 224 * 1024 * 1024); 215 memory_region_add_subregion(system_memory, 0xf0000000, system_io); 216 lx60_fpga_init(system_io, 0x0d020000); 217 if (nd_table[0].used) { 218 lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000, 219 xtensa_get_extint(env, 1), nd_table); 220 } 221 222 if (!serial_hds[0]) { 223 serial_hds[0] = qemu_chr_new("serial0", "null", NULL); 224 } 225 226 serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0), 227 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); 228 229 dinfo = drive_get(IF_PFLASH, 0, 0); 230 if (dinfo) { 231 flash = pflash_cfi01_register(board->flash_base, 232 NULL, "lx60.io.flash", board->flash_size, 233 blk_by_legacy_dinfo(dinfo), 234 board->flash_sector_size, 235 board->flash_size / board->flash_sector_size, 236 4, 0x0000, 0x0000, 0x0000, 0x0000, be); 237 if (flash == NULL) { 238 error_report("unable to mount pflash\n"); 239 exit(EXIT_FAILURE); 240 } 241 } 242 243 /* Use presence of kernel file name as 'boot from SRAM' switch. */ 244 if (kernel_filename) { 245 uint32_t entry_point = env->pc; 246 size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */ 247 uint32_t tagptr = 0xfe000000 + board->sram_size; 248 uint32_t cur_tagptr; 249 BpMemInfo memory_location = { 250 .type = tswap32(MEMORY_TYPE_CONVENTIONAL), 251 .start = tswap32(0), 252 .end = tswap32(machine->ram_size), 253 }; 254 uint32_t lowmem_end = machine->ram_size < 0x08000000 ? 255 machine->ram_size : 0x08000000; 256 uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); 257 258 rom = g_malloc(sizeof(*rom)); 259 memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size, 260 &error_abort); 261 vmstate_register_ram_global(rom); 262 memory_region_add_subregion(system_memory, 0xfe000000, rom); 263 264 if (kernel_cmdline) { 265 bp_size += get_tag_size(strlen(kernel_cmdline) + 1); 266 } 267 if (dtb_filename) { 268 bp_size += get_tag_size(sizeof(uint32_t)); 269 } 270 if (initrd_filename) { 271 bp_size += get_tag_size(sizeof(BpMemInfo)); 272 } 273 274 /* Put kernel bootparameters to the end of that SRAM */ 275 tagptr = (tagptr - bp_size) & ~0xff; 276 cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL); 277 cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY, 278 sizeof(memory_location), &memory_location); 279 280 if (kernel_cmdline) { 281 cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE, 282 strlen(kernel_cmdline) + 1, kernel_cmdline); 283 } 284 if (dtb_filename) { 285 int fdt_size; 286 void *fdt = load_device_tree(dtb_filename, &fdt_size); 287 uint32_t dtb_addr = tswap32(cur_lowmem); 288 289 if (!fdt) { 290 error_report("could not load DTB '%s'\n", dtb_filename); 291 exit(EXIT_FAILURE); 292 } 293 294 cpu_physical_memory_write(cur_lowmem, fdt, fdt_size); 295 cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT, 296 sizeof(dtb_addr), &dtb_addr); 297 cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096); 298 } 299 if (initrd_filename) { 300 BpMemInfo initrd_location = { 0 }; 301 int initrd_size = load_ramdisk(initrd_filename, cur_lowmem, 302 lowmem_end - cur_lowmem); 303 304 if (initrd_size < 0) { 305 initrd_size = load_image_targphys(initrd_filename, 306 cur_lowmem, 307 lowmem_end - cur_lowmem); 308 } 309 if (initrd_size < 0) { 310 error_report("could not load initrd '%s'\n", initrd_filename); 311 exit(EXIT_FAILURE); 312 } 313 initrd_location.start = tswap32(cur_lowmem); 314 initrd_location.end = tswap32(cur_lowmem + initrd_size); 315 cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD, 316 sizeof(initrd_location), &initrd_location); 317 cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096); 318 } 319 cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL); 320 env->regs[2] = tagptr; 321 322 uint64_t elf_entry; 323 uint64_t elf_lowaddr; 324 int success = load_elf(kernel_filename, translate_phys_addr, cpu, 325 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0); 326 if (success > 0) { 327 entry_point = elf_entry; 328 } else { 329 hwaddr ep; 330 int is_linux; 331 success = load_uimage(kernel_filename, &ep, NULL, &is_linux, 332 translate_phys_addr, cpu); 333 if (success > 0 && is_linux) { 334 entry_point = ep; 335 } else { 336 error_report("could not load kernel '%s'\n", 337 kernel_filename); 338 exit(EXIT_FAILURE); 339 } 340 } 341 if (entry_point != env->pc) { 342 static const uint8_t jx_a0[] = { 343 #ifdef TARGET_WORDS_BIGENDIAN 344 0x0a, 0, 0, 345 #else 346 0xa0, 0, 0, 347 #endif 348 }; 349 env->regs[0] = entry_point; 350 cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0)); 351 } 352 } else { 353 if (flash) { 354 MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); 355 MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); 356 357 memory_region_init_alias(flash_io, NULL, "lx60.flash", 358 flash_mr, board->flash_boot_base, 359 board->flash_size - board->flash_boot_base < 0x02000000 ? 360 board->flash_size - board->flash_boot_base : 0x02000000); 361 memory_region_add_subregion(system_memory, 0xfe000000, 362 flash_io); 363 } 364 } 365 } 366 367 static void xtensa_lx60_init(MachineState *machine) 368 { 369 static const LxBoardDesc lx60_board = { 370 .flash_base = 0xf8000000, 371 .flash_size = 0x00400000, 372 .flash_sector_size = 0x10000, 373 .sram_size = 0x20000, 374 }; 375 lx_init(&lx60_board, machine); 376 } 377 378 static void xtensa_lx200_init(MachineState *machine) 379 { 380 static const LxBoardDesc lx200_board = { 381 .flash_base = 0xf8000000, 382 .flash_size = 0x01000000, 383 .flash_sector_size = 0x20000, 384 .sram_size = 0x2000000, 385 }; 386 lx_init(&lx200_board, machine); 387 } 388 389 static void xtensa_ml605_init(MachineState *machine) 390 { 391 static const LxBoardDesc ml605_board = { 392 .flash_base = 0xf8000000, 393 .flash_size = 0x02000000, 394 .flash_sector_size = 0x20000, 395 .sram_size = 0x2000000, 396 }; 397 lx_init(&ml605_board, machine); 398 } 399 400 static void xtensa_kc705_init(MachineState *machine) 401 { 402 static const LxBoardDesc kc705_board = { 403 .flash_base = 0xf0000000, 404 .flash_size = 0x08000000, 405 .flash_boot_base = 0x06000000, 406 .flash_sector_size = 0x20000, 407 .sram_size = 0x2000000, 408 }; 409 lx_init(&kc705_board, machine); 410 } 411 412 static QEMUMachine xtensa_lx60_machine = { 413 .name = "lx60", 414 .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 415 .init = xtensa_lx60_init, 416 .max_cpus = 4, 417 }; 418 419 static QEMUMachine xtensa_lx200_machine = { 420 .name = "lx200", 421 .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 422 .init = xtensa_lx200_init, 423 .max_cpus = 4, 424 }; 425 426 static QEMUMachine xtensa_ml605_machine = { 427 .name = "ml605", 428 .desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 429 .init = xtensa_ml605_init, 430 .max_cpus = 4, 431 }; 432 433 static QEMUMachine xtensa_kc705_machine = { 434 .name = "kc705", 435 .desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 436 .init = xtensa_kc705_init, 437 .max_cpus = 4, 438 }; 439 440 static void xtensa_lx_machines_init(void) 441 { 442 qemu_register_machine(&xtensa_lx60_machine); 443 qemu_register_machine(&xtensa_lx200_machine); 444 qemu_register_machine(&xtensa_ml605_machine); 445 qemu_register_machine(&xtensa_kc705_machine); 446 } 447 448 machine_init(xtensa_lx_machines_init); 449