1 /* 2 * common defines for all CPUs 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #ifndef CPU_DEFS_H 20 #define CPU_DEFS_H 21 22 #ifndef NEED_CPU_H 23 #error cpu.h included from common code 24 #endif 25 26 #include "qemu/host-utils.h" 27 #include "qemu/thread.h" 28 #ifndef CONFIG_USER_ONLY 29 #include "exec/hwaddr.h" 30 #endif 31 #include "exec/memattrs.h" 32 #include "hw/core/cpu.h" 33 34 #include "cpu-param.h" 35 36 #ifndef TARGET_LONG_BITS 37 # error TARGET_LONG_BITS must be defined in cpu-param.h 38 #endif 39 #ifndef TARGET_PHYS_ADDR_SPACE_BITS 40 # error TARGET_PHYS_ADDR_SPACE_BITS must be defined in cpu-param.h 41 #endif 42 #ifndef TARGET_VIRT_ADDR_SPACE_BITS 43 # error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h 44 #endif 45 #ifndef TARGET_PAGE_BITS 46 # ifdef TARGET_PAGE_BITS_VARY 47 # ifndef TARGET_PAGE_BITS_MIN 48 # error TARGET_PAGE_BITS_MIN must be defined in cpu-param.h 49 # endif 50 # else 51 # error TARGET_PAGE_BITS must be defined in cpu-param.h 52 # endif 53 #endif 54 55 #include "exec/target_long.h" 56 57 #if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG) 58 #define CPU_TLB_DYN_MIN_BITS 6 59 #define CPU_TLB_DYN_DEFAULT_BITS 8 60 61 # if HOST_LONG_BITS == 32 62 /* Make sure we do not require a double-word shift for the TLB load */ 63 # define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS) 64 # else /* HOST_LONG_BITS == 64 */ 65 /* 66 * Assuming TARGET_PAGE_BITS==12, with 2**22 entries we can cover 2**(22+12) == 67 * 2**34 == 16G of address space. This is roughly what one would expect a 68 * TLB to cover in a modern (as of 2018) x86_64 CPU. For instance, Intel 69 * Skylake's Level-2 STLB has 16 1G entries. 70 * Also, make sure we do not size the TLB past the guest's address space. 71 */ 72 # ifdef TARGET_PAGE_BITS_VARY 73 # define CPU_TLB_DYN_MAX_BITS \ 74 MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) 75 # else 76 # define CPU_TLB_DYN_MAX_BITS \ 77 MIN_CONST(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) 78 # endif 79 # endif 80 81 #endif /* CONFIG_SOFTMMU && CONFIG_TCG */ 82 83 #endif 84