10553d895SMarkus Armbruster #ifndef HW_ARM_ALLWINNER_A10_H 20553d895SMarkus Armbruster #define HW_ARM_ALLWINNER_A10_H 39158fa54Sliguang 49158fa54Sliguang #include "hw/timer/allwinner-a10-pit.h" 59158fa54Sliguang #include "hw/intc/allwinner-a10-pic.h" 6db7dfd4cSBeniamino Galvani #include "hw/net/allwinner_emac.h" 782e48382SNiek Linnenbank #include "hw/sd/allwinner-sdhost.h" 8*fbb5945eSPhilippe Mathieu-Daudé #include "hw/ide/ahci-sysbus.h" 97abc8cabSGuenter Roeck #include "hw/usb/hcd-ohci.h" 107abc8cabSGuenter Roeck #include "hw/usb/hcd-ehci.h" 11a9ad9e73SNiek Linnenbank #include "hw/rtc/allwinner-rtc.h" 12423ec28bSStrahinja Jankovic #include "hw/misc/allwinner-a10-ccm.h" 13edd3a59dSStrahinja Jankovic #include "hw/misc/allwinner-a10-dramc.h" 149be8a82cSStrahinja Jankovic #include "hw/i2c/allwinner-i2c.h" 15470f9f2dSStrahinja Jankovic #include "hw/watchdog/allwinner-wdt.h" 16bb9271caSStrahinja Jankovic #include "sysemu/block-backend.h" 179158fa54Sliguang 18ec150c7eSMarkus Armbruster #include "target/arm/cpu.h" 19db1015e9SEduardo Habkost #include "qom/object.h" 209158fa54Sliguang 219158fa54Sliguang 229158fa54Sliguang #define AW_A10_SDRAM_BASE 0x40000000 239158fa54Sliguang 247abc8cabSGuenter Roeck #define AW_A10_NUM_USB 2 257abc8cabSGuenter Roeck 269158fa54Sliguang #define TYPE_AW_A10 "allwinner-a10" 278063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(AwA10State, AW_A10) 289158fa54Sliguang 29db1015e9SEduardo Habkost struct AwA10State { 309158fa54Sliguang /*< private >*/ 319158fa54Sliguang DeviceState parent_obj; 329158fa54Sliguang /*< public >*/ 339158fa54Sliguang 349158fa54Sliguang ARMCPU cpu; 35423ec28bSStrahinja Jankovic AwA10ClockCtlState ccm; 36edd3a59dSStrahinja Jankovic AwA10DramControllerState dramc; 379158fa54Sliguang AwA10PITState timer; 389158fa54Sliguang AwA10PICState intc; 39db7dfd4cSBeniamino Galvani AwEmacState emac; 40dca62576SPeter Crosthwaite AllwinnerAHCIState sata; 4182e48382SNiek Linnenbank AwSdHostState mmc0; 429be8a82cSStrahinja Jankovic AWI2CState i2c0; 43a9ad9e73SNiek Linnenbank AwRtcState rtc; 44470f9f2dSStrahinja Jankovic AwWdtState wdt; 45ead07aa4SPhilippe Mathieu-Daudé MemoryRegion sram_a; 467abc8cabSGuenter Roeck EHCISysBusState ehci[AW_A10_NUM_USB]; 477abc8cabSGuenter Roeck OHCISysBusState ohci[AW_A10_NUM_USB]; 48db1015e9SEduardo Habkost }; 499158fa54Sliguang 50bb9271caSStrahinja Jankovic /** 51bb9271caSStrahinja Jankovic * Emulate Boot ROM firmware setup functionality. 52bb9271caSStrahinja Jankovic * 53bb9271caSStrahinja Jankovic * A real Allwinner A10 SoC contains a Boot ROM 54bb9271caSStrahinja Jankovic * which is the first code that runs right after 55bb9271caSStrahinja Jankovic * the SoC is powered on. The Boot ROM is responsible 56bb9271caSStrahinja Jankovic * for loading user code (e.g. a bootloader) from any 57bb9271caSStrahinja Jankovic * of the supported external devices and writing the 58bb9271caSStrahinja Jankovic * downloaded code to internal SRAM. After loading the SoC 59bb9271caSStrahinja Jankovic * begins executing the code written to SRAM. 60bb9271caSStrahinja Jankovic * 61bb9271caSStrahinja Jankovic * This function emulates the Boot ROM by copying 32 KiB 62bb9271caSStrahinja Jankovic * of data at offset 8 KiB from the given block device and writes it to 63bb9271caSStrahinja Jankovic * the start of the first internal SRAM memory. 64bb9271caSStrahinja Jankovic * 65bb9271caSStrahinja Jankovic * @s: Allwinner A10 state object pointer 66bb9271caSStrahinja Jankovic * @blk: Block backend device object pointer 67bb9271caSStrahinja Jankovic */ 68bb9271caSStrahinja Jankovic void allwinner_a10_bootrom_setup(AwA10State *s, BlockBackend *blk); 69bb9271caSStrahinja Jankovic 709158fa54Sliguang #endif 71