xref: /qemu/include/hw/arm/allwinner-a10.h (revision 470f9f2d)
10553d895SMarkus Armbruster #ifndef HW_ARM_ALLWINNER_A10_H
20553d895SMarkus Armbruster #define HW_ARM_ALLWINNER_A10_H
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412ec8bd5SPeter Maydell #include "hw/arm/boot.h"
59158fa54Sliguang #include "hw/timer/allwinner-a10-pit.h"
69158fa54Sliguang #include "hw/intc/allwinner-a10-pic.h"
7db7dfd4cSBeniamino Galvani #include "hw/net/allwinner_emac.h"
882e48382SNiek Linnenbank #include "hw/sd/allwinner-sdhost.h"
9dca62576SPeter Crosthwaite #include "hw/ide/ahci.h"
107abc8cabSGuenter Roeck #include "hw/usb/hcd-ohci.h"
117abc8cabSGuenter Roeck #include "hw/usb/hcd-ehci.h"
12a9ad9e73SNiek Linnenbank #include "hw/rtc/allwinner-rtc.h"
13423ec28bSStrahinja Jankovic #include "hw/misc/allwinner-a10-ccm.h"
14edd3a59dSStrahinja Jankovic #include "hw/misc/allwinner-a10-dramc.h"
159be8a82cSStrahinja Jankovic #include "hw/i2c/allwinner-i2c.h"
16470f9f2dSStrahinja Jankovic #include "hw/watchdog/allwinner-wdt.h"
17bb9271caSStrahinja Jankovic #include "sysemu/block-backend.h"
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19ec150c7eSMarkus Armbruster #include "target/arm/cpu.h"
20db1015e9SEduardo Habkost #include "qom/object.h"
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239158fa54Sliguang #define AW_A10_SDRAM_BASE       0x40000000
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257abc8cabSGuenter Roeck #define AW_A10_NUM_USB          2
267abc8cabSGuenter Roeck 
279158fa54Sliguang #define TYPE_AW_A10 "allwinner-a10"
288063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(AwA10State, AW_A10)
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30db1015e9SEduardo Habkost struct AwA10State {
319158fa54Sliguang     /*< private >*/
329158fa54Sliguang     DeviceState parent_obj;
339158fa54Sliguang     /*< public >*/
349158fa54Sliguang 
359158fa54Sliguang     ARMCPU cpu;
36423ec28bSStrahinja Jankovic     AwA10ClockCtlState ccm;
37edd3a59dSStrahinja Jankovic     AwA10DramControllerState dramc;
389158fa54Sliguang     AwA10PITState timer;
399158fa54Sliguang     AwA10PICState intc;
40db7dfd4cSBeniamino Galvani     AwEmacState emac;
41dca62576SPeter Crosthwaite     AllwinnerAHCIState sata;
4282e48382SNiek Linnenbank     AwSdHostState mmc0;
439be8a82cSStrahinja Jankovic     AWI2CState i2c0;
44a9ad9e73SNiek Linnenbank     AwRtcState rtc;
45470f9f2dSStrahinja Jankovic     AwWdtState wdt;
46ead07aa4SPhilippe Mathieu-Daudé     MemoryRegion sram_a;
477abc8cabSGuenter Roeck     EHCISysBusState ehci[AW_A10_NUM_USB];
487abc8cabSGuenter Roeck     OHCISysBusState ohci[AW_A10_NUM_USB];
49db1015e9SEduardo Habkost };
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51bb9271caSStrahinja Jankovic /**
52bb9271caSStrahinja Jankovic  * Emulate Boot ROM firmware setup functionality.
53bb9271caSStrahinja Jankovic  *
54bb9271caSStrahinja Jankovic  * A real Allwinner A10 SoC contains a Boot ROM
55bb9271caSStrahinja Jankovic  * which is the first code that runs right after
56bb9271caSStrahinja Jankovic  * the SoC is powered on. The Boot ROM is responsible
57bb9271caSStrahinja Jankovic  * for loading user code (e.g. a bootloader) from any
58bb9271caSStrahinja Jankovic  * of the supported external devices and writing the
59bb9271caSStrahinja Jankovic  * downloaded code to internal SRAM. After loading the SoC
60bb9271caSStrahinja Jankovic  * begins executing the code written to SRAM.
61bb9271caSStrahinja Jankovic  *
62bb9271caSStrahinja Jankovic  * This function emulates the Boot ROM by copying 32 KiB
63bb9271caSStrahinja Jankovic  * of data at offset 8 KiB from the given block device and writes it to
64bb9271caSStrahinja Jankovic  * the start of the first internal SRAM memory.
65bb9271caSStrahinja Jankovic  *
66bb9271caSStrahinja Jankovic  * @s: Allwinner A10 state object pointer
67bb9271caSStrahinja Jankovic  * @blk: Block backend device object pointer
68bb9271caSStrahinja Jankovic  */
69bb9271caSStrahinja Jankovic void allwinner_a10_bootrom_setup(AwA10State *s, BlockBackend *blk);
70bb9271caSStrahinja Jankovic 
719158fa54Sliguang #endif
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