1afe0b380SShannon Zhao /* 2afe0b380SShannon Zhao * 3afe0b380SShannon Zhao * Copyright (c) 2015 Linaro Limited 4afe0b380SShannon Zhao * 5afe0b380SShannon Zhao * This program is free software; you can redistribute it and/or modify it 6afe0b380SShannon Zhao * under the terms and conditions of the GNU General Public License, 7afe0b380SShannon Zhao * version 2 or later, as published by the Free Software Foundation. 8afe0b380SShannon Zhao * 9afe0b380SShannon Zhao * This program is distributed in the hope it will be useful, but WITHOUT 10afe0b380SShannon Zhao * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11afe0b380SShannon Zhao * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12afe0b380SShannon Zhao * more details. 13afe0b380SShannon Zhao * 14afe0b380SShannon Zhao * You should have received a copy of the GNU General Public License along with 15afe0b380SShannon Zhao * this program. If not, see <http://www.gnu.org/licenses/>. 16afe0b380SShannon Zhao * 17afe0b380SShannon Zhao * Emulate a virtual board which works by passing Linux all the information 18afe0b380SShannon Zhao * it needs about what devices are present via the device tree. 19afe0b380SShannon Zhao * There are some restrictions about what we can do here: 20afe0b380SShannon Zhao * + we can only present devices whose Linux drivers will work based 21afe0b380SShannon Zhao * purely on the device tree with no platform data at all 22afe0b380SShannon Zhao * + we want to present a very stripped-down minimalist platform, 23afe0b380SShannon Zhao * both because this reduces the security attack surface from the guest 24afe0b380SShannon Zhao * and also because it reduces our exposure to being broken when 25afe0b380SShannon Zhao * the kernel updates its device tree bindings and requires further 26afe0b380SShannon Zhao * information in a device binding that we aren't providing. 27afe0b380SShannon Zhao * This is essentially the same approach kvmtool uses. 28afe0b380SShannon Zhao */ 29afe0b380SShannon Zhao 30afe0b380SShannon Zhao #ifndef QEMU_ARM_VIRT_H 31afe0b380SShannon Zhao #define QEMU_ARM_VIRT_H 32afe0b380SShannon Zhao 3333c11879SPaolo Bonzini #include "exec/hwaddr.h" 34d05fdab4SAndrew Jones #include "qemu/notify.h" 35a72d4363SAndrew Jones #include "hw/boards.h" 3612ec8bd5SPeter Maydell #include "hw/arm/boot.h" 372419ce83SLeif Lindholm #include "hw/arm/bsa.h" 38e0561e60SMarkus Armbruster #include "hw/block/flash.h" 39f90747c4SEric Auger #include "sysemu/kvm.h" 40f90747c4SEric Auger #include "hw/intc/arm_gicv3_common.h" 41db1015e9SEduardo Habkost #include "qom/object.h" 42afe0b380SShannon Zhao 43bd204e63SChristoffer Dall #define NUM_GICV2M_SPIS 64 44afe0b380SShannon Zhao #define NUM_VIRTIO_TRANSPORTS 32 45584105eaSPrem Mallappa #define NUM_SMMU_IRQS 4 46afe0b380SShannon Zhao 4768970d1eSAndrew Jones /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ 4868970d1eSAndrew Jones #define PVTIME_SIZE_PER_CPU 64 4968970d1eSAndrew Jones 50afe0b380SShannon Zhao enum { 51afe0b380SShannon Zhao VIRT_FLASH, 52afe0b380SShannon Zhao VIRT_MEM, 53afe0b380SShannon Zhao VIRT_CPUPERIPHS, 54afe0b380SShannon Zhao VIRT_GIC_DIST, 55afe0b380SShannon Zhao VIRT_GIC_CPU, 56b92ad394SPavel Fedin VIRT_GIC_V2M, 5755ef3233SLuc Michel VIRT_GIC_HYP, 5855ef3233SLuc Michel VIRT_GIC_VCPU, 59b92ad394SPavel Fedin VIRT_GIC_ITS, 60b92ad394SPavel Fedin VIRT_GIC_REDIST, 61584105eaSPrem Mallappa VIRT_SMMU, 62afe0b380SShannon Zhao VIRT_UART, 63afe0b380SShannon Zhao VIRT_MMIO, 64afe0b380SShannon Zhao VIRT_RTC, 65afe0b380SShannon Zhao VIRT_FW_CFG, 66afe0b380SShannon Zhao VIRT_PCIE, 676a1f001bSShannon Zhao VIRT_PCIE_MMIO, 686a1f001bSShannon Zhao VIRT_PCIE_PIO, 696a1f001bSShannon Zhao VIRT_PCIE_ECAM, 705f7a5a0eSEric Auger VIRT_PLATFORM_BUS, 71b0a3721eSShannon Zhao VIRT_GPIO, 723df708ebSPeter Maydell VIRT_SECURE_UART, 7383ec1923SPeter Maydell VIRT_SECURE_MEM, 74daa726d9SMaxim Uvarov VIRT_SECURE_GPIO, 75cff51ac9SShameer Kolothum VIRT_PCDIMM_ACPI, 76cff51ac9SShameer Kolothum VIRT_ACPI_GED, 77b5a60beeSKwangwoo Lee VIRT_NVDIMM_ACPI, 7868970d1eSAndrew Jones VIRT_PVTIME, 79350a9c9eSEric Auger VIRT_LOWMEMMAP_LAST, 80350a9c9eSEric Auger }; 81350a9c9eSEric Auger 82350a9c9eSEric Auger /* indices of IO regions located after the RAM */ 83350a9c9eSEric Auger enum { 84350a9c9eSEric Auger VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST, 85350a9c9eSEric Auger VIRT_HIGH_PCIE_ECAM, 86350a9c9eSEric Auger VIRT_HIGH_PCIE_MMIO, 87afe0b380SShannon Zhao }; 88afe0b380SShannon Zhao 89584105eaSPrem Mallappa typedef enum VirtIOMMUType { 90584105eaSPrem Mallappa VIRT_IOMMU_NONE, 91584105eaSPrem Mallappa VIRT_IOMMU_SMMUV3, 92584105eaSPrem Mallappa VIRT_IOMMU_VIRTIO, 93584105eaSPrem Mallappa } VirtIOMMUType; 94584105eaSPrem Mallappa 951b6f99d8SEric Auger typedef enum VirtMSIControllerType { 961b6f99d8SEric Auger VIRT_MSI_CTRL_NONE, 971b6f99d8SEric Auger VIRT_MSI_CTRL_GICV2M, 981b6f99d8SEric Auger VIRT_MSI_CTRL_ITS, 991b6f99d8SEric Auger } VirtMSIControllerType; 1001b6f99d8SEric Auger 101d04460e5SEric Auger typedef enum VirtGICType { 102a3495d11SAlexander Graf VIRT_GIC_VERSION_MAX = 0, 103a3495d11SAlexander Graf VIRT_GIC_VERSION_HOST = 1, 104a3495d11SAlexander Graf /* The concrete GIC values have to match the GIC version number */ 105a3495d11SAlexander Graf VIRT_GIC_VERSION_2 = 2, 106a3495d11SAlexander Graf VIRT_GIC_VERSION_3 = 3, 107a3495d11SAlexander Graf VIRT_GIC_VERSION_4 = 4, 10836bf4ec8SEric Auger VIRT_GIC_VERSION_NOSEL, 109d04460e5SEric Auger } VirtGICType; 110d04460e5SEric Auger 111a3495d11SAlexander Graf #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2) 112a3495d11SAlexander Graf #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3) 113a3495d11SAlexander Graf #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4) 114a3495d11SAlexander Graf 115db1015e9SEduardo Habkost struct VirtMachineClass { 116a72d4363SAndrew Jones MachineClass parent; 117a72d4363SAndrew Jones bool disallow_affinity_adjustment; 118a72d4363SAndrew Jones bool no_its; 1190e5c1c9aSShashi Mallela bool no_tcg_its; 120a72d4363SAndrew Jones bool no_pmu; 121a72d4363SAndrew Jones bool claim_edge_triggered_timers; 122dfadc3bfSWei Huang bool smbios_old_sys_ver; 123f40408a9SGavin Shan bool no_highmem_compact; 12417ec075aSEric Auger bool no_highmem_ecam; 12531511b6fSYanan Wang bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */ 126dea101a1SAndrew Jones bool kvm_no_adjvtime; 12768970d1eSAndrew Jones bool no_kvm_steal_time; 1282c1fb4d5SAndrew Jones bool acpi_expose_flash; 129daa726d9SMaxim Uvarov bool no_secure_gpio; 13031511b6fSYanan Wang /* Machines < 6.2 have no support for describing cpu topology to guest */ 13131511b6fSYanan Wang bool no_cpu_topology; 13209428204SRichard Henderson bool no_tcg_lpa2; 133db1015e9SEduardo Habkost }; 134a72d4363SAndrew Jones 135db1015e9SEduardo Habkost struct VirtMachineState { 136a72d4363SAndrew Jones MachineState parent; 137a72d4363SAndrew Jones Notifier machine_done; 138a3fc8396SIgor Mammedov DeviceState *platform_bus_dev; 139af1f60a4SAndrew Jones FWCfgState *fw_cfg; 140e0561e60SMarkus Armbruster PFlashCFI01 *flash[2]; 141a72d4363SAndrew Jones bool secure; 142a72d4363SAndrew Jones bool highmem; 1434a4ff9edSGavin Shan bool highmem_compact; 144601d626dSEric Auger bool highmem_ecam; 145c8f008c4SMarc Zyngier bool highmem_mmio; 146a63618b1SMarc Zyngier bool highmem_redists; 147ccc11b02SEric Auger bool its; 1480e5c1c9aSShashi Mallela bool tcg_its; 149f29cacfbSPeter Maydell bool virt; 1502afa8c85SDongjiu Geng bool ras; 1516f4e1405SRichard Henderson bool mte; 1525242876fSJason A. Donenfeld bool dtb_randomness; 15317e89077SGerd Hoffmann OnOffAuto acpi; 154d04460e5SEric Auger VirtGICType gic_version; 155584105eaSPrem Mallappa VirtIOMMUType iommu; 1566d7a8548SXingang Wang bool default_bus_bypass_iommu; 1571b6f99d8SEric Auger VirtMSIControllerType msi_controller; 15870e89132SEric Auger uint16_t virtio_iommu_bdf; 159a72d4363SAndrew Jones struct arm_boot_info bootinfo; 160350a9c9eSEric Auger MemMapEntry *memmap; 16170e89132SEric Auger char *pciehb_nodename; 162a72d4363SAndrew Jones const int *irqmap; 163a72d4363SAndrew Jones int fdt_size; 164a72d4363SAndrew Jones uint32_t clock_phandle; 165a72d4363SAndrew Jones uint32_t gic_phandle; 166a72d4363SAndrew Jones uint32_t msi_phandle; 167584105eaSPrem Mallappa uint32_t iommu_phandle; 1682013c566SPeter Maydell int psci_conduit; 169957e32cfSEric Auger hwaddr highest_gpa; 170b8b69f4cSPhilippe Mathieu-Daudé DeviceState *gic; 171cff51ac9SShameer Kolothum DeviceState *acpi_dev; 172c345680cSShameer Kolothum Notifier powerdown_notifier; 17309fad167SJiahui Cen PCIBus *bus; 174602b4582SMarian Postevca char *oem_id; 175602b4582SMarian Postevca char *oem_table_id; 176db1015e9SEduardo Habkost }; 177a72d4363SAndrew Jones 178bf424a12SEric Auger #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) 179601d626dSEric Auger 180a72d4363SAndrew Jones #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 181a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE) 182a72d4363SAndrew Jones 183e9a8e474SAndrew Jones void virt_acpi_setup(VirtMachineState *vms); 18417e89077SGerd Hoffmann bool virt_is_acpi_enabled(VirtMachineState *vms); 185d05fdab4SAndrew Jones 186f31985a7SPeter Maydell /* Return number of redistributors that fit in the specified region */ 187f31985a7SPeter Maydell static uint32_t virt_redist_capacity(VirtMachineState *vms, int region) 188f31985a7SPeter Maydell { 1897cf3f8d2SPeter Maydell uint32_t redist_size; 1907cf3f8d2SPeter Maydell 1917cf3f8d2SPeter Maydell if (vms->gic_version == VIRT_GIC_VERSION_3) { 1927cf3f8d2SPeter Maydell redist_size = GICV3_REDIST_SIZE; 1937cf3f8d2SPeter Maydell } else { 1947cf3f8d2SPeter Maydell redist_size = GICV4_REDIST_SIZE; 1957cf3f8d2SPeter Maydell } 1967cf3f8d2SPeter Maydell return vms->memmap[region].size / redist_size; 197f31985a7SPeter Maydell } 198f31985a7SPeter Maydell 199f90747c4SEric Auger /* Return the number of used redistributor regions */ 200f90747c4SEric Auger static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 201f90747c4SEric Auger { 202f31985a7SPeter Maydell uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST); 203f90747c4SEric Auger 2047cf3f8d2SPeter Maydell assert(vms->gic_version != VIRT_GIC_VERSION_2); 205f90747c4SEric Auger 206a63618b1SMarc Zyngier return (MACHINE(vms)->smp.cpus > redist0_capacity && 207a63618b1SMarc Zyngier vms->highmem_redists) ? 2 : 1; 208f90747c4SEric Auger } 209f90747c4SEric Auger 210d05fdab4SAndrew Jones #endif /* QEMU_ARM_VIRT_H */ 211