xref: /qemu/include/hw/arm/virt.h (revision a3495d11)
1afe0b380SShannon Zhao /*
2afe0b380SShannon Zhao  *
3afe0b380SShannon Zhao  * Copyright (c) 2015 Linaro Limited
4afe0b380SShannon Zhao  *
5afe0b380SShannon Zhao  * This program is free software; you can redistribute it and/or modify it
6afe0b380SShannon Zhao  * under the terms and conditions of the GNU General Public License,
7afe0b380SShannon Zhao  * version 2 or later, as published by the Free Software Foundation.
8afe0b380SShannon Zhao  *
9afe0b380SShannon Zhao  * This program is distributed in the hope it will be useful, but WITHOUT
10afe0b380SShannon Zhao  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11afe0b380SShannon Zhao  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12afe0b380SShannon Zhao  * more details.
13afe0b380SShannon Zhao  *
14afe0b380SShannon Zhao  * You should have received a copy of the GNU General Public License along with
15afe0b380SShannon Zhao  * this program.  If not, see <http://www.gnu.org/licenses/>.
16afe0b380SShannon Zhao  *
17afe0b380SShannon Zhao  * Emulate a virtual board which works by passing Linux all the information
18afe0b380SShannon Zhao  * it needs about what devices are present via the device tree.
19afe0b380SShannon Zhao  * There are some restrictions about what we can do here:
20afe0b380SShannon Zhao  *  + we can only present devices whose Linux drivers will work based
21afe0b380SShannon Zhao  *    purely on the device tree with no platform data at all
22afe0b380SShannon Zhao  *  + we want to present a very stripped-down minimalist platform,
23afe0b380SShannon Zhao  *    both because this reduces the security attack surface from the guest
24afe0b380SShannon Zhao  *    and also because it reduces our exposure to being broken when
25afe0b380SShannon Zhao  *    the kernel updates its device tree bindings and requires further
26afe0b380SShannon Zhao  *    information in a device binding that we aren't providing.
27afe0b380SShannon Zhao  * This is essentially the same approach kvmtool uses.
28afe0b380SShannon Zhao  */
29afe0b380SShannon Zhao 
30afe0b380SShannon Zhao #ifndef QEMU_ARM_VIRT_H
31afe0b380SShannon Zhao #define QEMU_ARM_VIRT_H
32afe0b380SShannon Zhao 
3333c11879SPaolo Bonzini #include "exec/hwaddr.h"
34d05fdab4SAndrew Jones #include "qemu/notify.h"
35a72d4363SAndrew Jones #include "hw/boards.h"
3612ec8bd5SPeter Maydell #include "hw/arm/boot.h"
37e0561e60SMarkus Armbruster #include "hw/block/flash.h"
38f90747c4SEric Auger #include "sysemu/kvm.h"
39f90747c4SEric Auger #include "hw/intc/arm_gicv3_common.h"
40db1015e9SEduardo Habkost #include "qom/object.h"
41afe0b380SShannon Zhao 
42bd204e63SChristoffer Dall #define NUM_GICV2M_SPIS       64
43afe0b380SShannon Zhao #define NUM_VIRTIO_TRANSPORTS 32
44584105eaSPrem Mallappa #define NUM_SMMU_IRQS          4
45afe0b380SShannon Zhao 
4655ef3233SLuc Michel #define ARCH_GIC_MAINT_IRQ  9
475454006aSPeter Maydell 
48ee246400SShannon Zhao #define ARCH_TIMER_VIRT_IRQ   11
49ee246400SShannon Zhao #define ARCH_TIMER_S_EL1_IRQ  13
50ee246400SShannon Zhao #define ARCH_TIMER_NS_EL1_IRQ 14
51ee246400SShannon Zhao #define ARCH_TIMER_NS_EL2_IRQ 10
52ee246400SShannon Zhao 
5301fe6b60SShannon Zhao #define VIRTUAL_PMU_IRQ 7
5401fe6b60SShannon Zhao 
5501fe6b60SShannon Zhao #define PPI(irq) ((irq) + 16)
5601fe6b60SShannon Zhao 
5768970d1eSAndrew Jones /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
5868970d1eSAndrew Jones #define PVTIME_SIZE_PER_CPU 64
5968970d1eSAndrew Jones 
60afe0b380SShannon Zhao enum {
61afe0b380SShannon Zhao     VIRT_FLASH,
62afe0b380SShannon Zhao     VIRT_MEM,
63afe0b380SShannon Zhao     VIRT_CPUPERIPHS,
64afe0b380SShannon Zhao     VIRT_GIC_DIST,
65afe0b380SShannon Zhao     VIRT_GIC_CPU,
66b92ad394SPavel Fedin     VIRT_GIC_V2M,
6755ef3233SLuc Michel     VIRT_GIC_HYP,
6855ef3233SLuc Michel     VIRT_GIC_VCPU,
69b92ad394SPavel Fedin     VIRT_GIC_ITS,
70b92ad394SPavel Fedin     VIRT_GIC_REDIST,
71584105eaSPrem Mallappa     VIRT_SMMU,
72afe0b380SShannon Zhao     VIRT_UART,
73afe0b380SShannon Zhao     VIRT_MMIO,
74afe0b380SShannon Zhao     VIRT_RTC,
75afe0b380SShannon Zhao     VIRT_FW_CFG,
76afe0b380SShannon Zhao     VIRT_PCIE,
776a1f001bSShannon Zhao     VIRT_PCIE_MMIO,
786a1f001bSShannon Zhao     VIRT_PCIE_PIO,
796a1f001bSShannon Zhao     VIRT_PCIE_ECAM,
805f7a5a0eSEric Auger     VIRT_PLATFORM_BUS,
81b0a3721eSShannon Zhao     VIRT_GPIO,
823df708ebSPeter Maydell     VIRT_SECURE_UART,
8383ec1923SPeter Maydell     VIRT_SECURE_MEM,
84daa726d9SMaxim Uvarov     VIRT_SECURE_GPIO,
85cff51ac9SShameer Kolothum     VIRT_PCDIMM_ACPI,
86cff51ac9SShameer Kolothum     VIRT_ACPI_GED,
87b5a60beeSKwangwoo Lee     VIRT_NVDIMM_ACPI,
8868970d1eSAndrew Jones     VIRT_PVTIME,
89350a9c9eSEric Auger     VIRT_LOWMEMMAP_LAST,
90350a9c9eSEric Auger };
91350a9c9eSEric Auger 
92350a9c9eSEric Auger /* indices of IO regions located after the RAM */
93350a9c9eSEric Auger enum {
94350a9c9eSEric Auger     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
95350a9c9eSEric Auger     VIRT_HIGH_PCIE_ECAM,
96350a9c9eSEric Auger     VIRT_HIGH_PCIE_MMIO,
97afe0b380SShannon Zhao };
98afe0b380SShannon Zhao 
99584105eaSPrem Mallappa typedef enum VirtIOMMUType {
100584105eaSPrem Mallappa     VIRT_IOMMU_NONE,
101584105eaSPrem Mallappa     VIRT_IOMMU_SMMUV3,
102584105eaSPrem Mallappa     VIRT_IOMMU_VIRTIO,
103584105eaSPrem Mallappa } VirtIOMMUType;
104584105eaSPrem Mallappa 
1051b6f99d8SEric Auger typedef enum VirtMSIControllerType {
1061b6f99d8SEric Auger     VIRT_MSI_CTRL_NONE,
1071b6f99d8SEric Auger     VIRT_MSI_CTRL_GICV2M,
1081b6f99d8SEric Auger     VIRT_MSI_CTRL_ITS,
1091b6f99d8SEric Auger } VirtMSIControllerType;
1101b6f99d8SEric Auger 
111d04460e5SEric Auger typedef enum VirtGICType {
112a3495d11SAlexander Graf     VIRT_GIC_VERSION_MAX = 0,
113a3495d11SAlexander Graf     VIRT_GIC_VERSION_HOST = 1,
114a3495d11SAlexander Graf     /* The concrete GIC values have to match the GIC version number */
115a3495d11SAlexander Graf     VIRT_GIC_VERSION_2 = 2,
116a3495d11SAlexander Graf     VIRT_GIC_VERSION_3 = 3,
117a3495d11SAlexander Graf     VIRT_GIC_VERSION_4 = 4,
11836bf4ec8SEric Auger     VIRT_GIC_VERSION_NOSEL,
119d04460e5SEric Auger } VirtGICType;
120d04460e5SEric Auger 
121a3495d11SAlexander Graf #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2)
122a3495d11SAlexander Graf #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3)
123a3495d11SAlexander Graf #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4)
124a3495d11SAlexander Graf 
125db1015e9SEduardo Habkost struct VirtMachineClass {
126a72d4363SAndrew Jones     MachineClass parent;
127a72d4363SAndrew Jones     bool disallow_affinity_adjustment;
128a72d4363SAndrew Jones     bool no_its;
1290e5c1c9aSShashi Mallela     bool no_tcg_its;
130a72d4363SAndrew Jones     bool no_pmu;
131a72d4363SAndrew Jones     bool claim_edge_triggered_timers;
132dfadc3bfSWei Huang     bool smbios_old_sys_ver;
133f40408a9SGavin Shan     bool no_highmem_compact;
13417ec075aSEric Auger     bool no_highmem_ecam;
13531511b6fSYanan Wang     bool no_ged;   /* Machines < 4.2 have no support for ACPI GED device */
136dea101a1SAndrew Jones     bool kvm_no_adjvtime;
13768970d1eSAndrew Jones     bool no_kvm_steal_time;
1382c1fb4d5SAndrew Jones     bool acpi_expose_flash;
139daa726d9SMaxim Uvarov     bool no_secure_gpio;
14031511b6fSYanan Wang     /* Machines < 6.2 have no support for describing cpu topology to guest */
14131511b6fSYanan Wang     bool no_cpu_topology;
14209428204SRichard Henderson     bool no_tcg_lpa2;
143db1015e9SEduardo Habkost };
144a72d4363SAndrew Jones 
145db1015e9SEduardo Habkost struct VirtMachineState {
146a72d4363SAndrew Jones     MachineState parent;
147a72d4363SAndrew Jones     Notifier machine_done;
148a3fc8396SIgor Mammedov     DeviceState *platform_bus_dev;
149af1f60a4SAndrew Jones     FWCfgState *fw_cfg;
150e0561e60SMarkus Armbruster     PFlashCFI01 *flash[2];
151a72d4363SAndrew Jones     bool secure;
152a72d4363SAndrew Jones     bool highmem;
1534a4ff9edSGavin Shan     bool highmem_compact;
154601d626dSEric Auger     bool highmem_ecam;
155c8f008c4SMarc Zyngier     bool highmem_mmio;
156a63618b1SMarc Zyngier     bool highmem_redists;
157ccc11b02SEric Auger     bool its;
1580e5c1c9aSShashi Mallela     bool tcg_its;
159f29cacfbSPeter Maydell     bool virt;
1602afa8c85SDongjiu Geng     bool ras;
1616f4e1405SRichard Henderson     bool mte;
1625242876fSJason A. Donenfeld     bool dtb_randomness;
16317e89077SGerd Hoffmann     OnOffAuto acpi;
164d04460e5SEric Auger     VirtGICType gic_version;
165584105eaSPrem Mallappa     VirtIOMMUType iommu;
1666d7a8548SXingang Wang     bool default_bus_bypass_iommu;
1671b6f99d8SEric Auger     VirtMSIControllerType msi_controller;
16870e89132SEric Auger     uint16_t virtio_iommu_bdf;
169a72d4363SAndrew Jones     struct arm_boot_info bootinfo;
170350a9c9eSEric Auger     MemMapEntry *memmap;
17170e89132SEric Auger     char *pciehb_nodename;
172a72d4363SAndrew Jones     const int *irqmap;
173a72d4363SAndrew Jones     int fdt_size;
174a72d4363SAndrew Jones     uint32_t clock_phandle;
175a72d4363SAndrew Jones     uint32_t gic_phandle;
176a72d4363SAndrew Jones     uint32_t msi_phandle;
177584105eaSPrem Mallappa     uint32_t iommu_phandle;
1782013c566SPeter Maydell     int psci_conduit;
179957e32cfSEric Auger     hwaddr highest_gpa;
180b8b69f4cSPhilippe Mathieu-Daudé     DeviceState *gic;
181cff51ac9SShameer Kolothum     DeviceState *acpi_dev;
182c345680cSShameer Kolothum     Notifier powerdown_notifier;
18309fad167SJiahui Cen     PCIBus *bus;
184602b4582SMarian Postevca     char *oem_id;
185602b4582SMarian Postevca     char *oem_table_id;
186db1015e9SEduardo Habkost };
187a72d4363SAndrew Jones 
188bf424a12SEric Auger #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
189601d626dSEric Auger 
190a72d4363SAndrew Jones #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
191a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
192a72d4363SAndrew Jones 
193e9a8e474SAndrew Jones void virt_acpi_setup(VirtMachineState *vms);
19417e89077SGerd Hoffmann bool virt_is_acpi_enabled(VirtMachineState *vms);
195d05fdab4SAndrew Jones 
196f31985a7SPeter Maydell /* Return number of redistributors that fit in the specified region */
197f31985a7SPeter Maydell static uint32_t virt_redist_capacity(VirtMachineState *vms, int region)
198f31985a7SPeter Maydell {
1997cf3f8d2SPeter Maydell     uint32_t redist_size;
2007cf3f8d2SPeter Maydell 
2017cf3f8d2SPeter Maydell     if (vms->gic_version == VIRT_GIC_VERSION_3) {
2027cf3f8d2SPeter Maydell         redist_size = GICV3_REDIST_SIZE;
2037cf3f8d2SPeter Maydell     } else {
2047cf3f8d2SPeter Maydell         redist_size = GICV4_REDIST_SIZE;
2057cf3f8d2SPeter Maydell     }
2067cf3f8d2SPeter Maydell     return vms->memmap[region].size / redist_size;
207f31985a7SPeter Maydell }
208f31985a7SPeter Maydell 
209f90747c4SEric Auger /* Return the number of used redistributor regions  */
210f90747c4SEric Auger static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
211f90747c4SEric Auger {
212f31985a7SPeter Maydell     uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
213f90747c4SEric Auger 
2147cf3f8d2SPeter Maydell     assert(vms->gic_version != VIRT_GIC_VERSION_2);
215f90747c4SEric Auger 
216a63618b1SMarc Zyngier     return (MACHINE(vms)->smp.cpus > redist0_capacity &&
217a63618b1SMarc Zyngier             vms->highmem_redists) ? 2 : 1;
218f90747c4SEric Auger }
219f90747c4SEric Auger 
220d05fdab4SAndrew Jones #endif /* QEMU_ARM_VIRT_H */
221