xref: /qemu/include/hw/arm/virt.h (revision a489d195)
1afe0b380SShannon Zhao /*
2afe0b380SShannon Zhao  *
3afe0b380SShannon Zhao  * Copyright (c) 2015 Linaro Limited
4afe0b380SShannon Zhao  *
5afe0b380SShannon Zhao  * This program is free software; you can redistribute it and/or modify it
6afe0b380SShannon Zhao  * under the terms and conditions of the GNU General Public License,
7afe0b380SShannon Zhao  * version 2 or later, as published by the Free Software Foundation.
8afe0b380SShannon Zhao  *
9afe0b380SShannon Zhao  * This program is distributed in the hope it will be useful, but WITHOUT
10afe0b380SShannon Zhao  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11afe0b380SShannon Zhao  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12afe0b380SShannon Zhao  * more details.
13afe0b380SShannon Zhao  *
14afe0b380SShannon Zhao  * You should have received a copy of the GNU General Public License along with
15afe0b380SShannon Zhao  * this program.  If not, see <http://www.gnu.org/licenses/>.
16afe0b380SShannon Zhao  *
17afe0b380SShannon Zhao  * Emulate a virtual board which works by passing Linux all the information
18afe0b380SShannon Zhao  * it needs about what devices are present via the device tree.
19afe0b380SShannon Zhao  * There are some restrictions about what we can do here:
20afe0b380SShannon Zhao  *  + we can only present devices whose Linux drivers will work based
21afe0b380SShannon Zhao  *    purely on the device tree with no platform data at all
22afe0b380SShannon Zhao  *  + we want to present a very stripped-down minimalist platform,
23afe0b380SShannon Zhao  *    both because this reduces the security attack surface from the guest
24afe0b380SShannon Zhao  *    and also because it reduces our exposure to being broken when
25afe0b380SShannon Zhao  *    the kernel updates its device tree bindings and requires further
26afe0b380SShannon Zhao  *    information in a device binding that we aren't providing.
27afe0b380SShannon Zhao  * This is essentially the same approach kvmtool uses.
28afe0b380SShannon Zhao  */
29afe0b380SShannon Zhao 
30afe0b380SShannon Zhao #ifndef QEMU_ARM_VIRT_H
31afe0b380SShannon Zhao #define QEMU_ARM_VIRT_H
32afe0b380SShannon Zhao 
3333c11879SPaolo Bonzini #include "exec/hwaddr.h"
34d05fdab4SAndrew Jones #include "qemu/notify.h"
35a72d4363SAndrew Jones #include "hw/boards.h"
3612ec8bd5SPeter Maydell #include "hw/arm/boot.h"
37e0561e60SMarkus Armbruster #include "hw/block/flash.h"
38f90747c4SEric Auger #include "sysemu/kvm.h"
39f90747c4SEric Auger #include "hw/intc/arm_gicv3_common.h"
40db1015e9SEduardo Habkost #include "qom/object.h"
41afe0b380SShannon Zhao 
42bd204e63SChristoffer Dall #define NUM_GICV2M_SPIS       64
43afe0b380SShannon Zhao #define NUM_VIRTIO_TRANSPORTS 32
44584105eaSPrem Mallappa #define NUM_SMMU_IRQS          4
45afe0b380SShannon Zhao 
4655ef3233SLuc Michel #define ARCH_GIC_MAINT_IRQ  9
475454006aSPeter Maydell 
48ee246400SShannon Zhao #define ARCH_TIMER_VIRT_IRQ   11
49ee246400SShannon Zhao #define ARCH_TIMER_S_EL1_IRQ  13
50ee246400SShannon Zhao #define ARCH_TIMER_NS_EL1_IRQ 14
51ee246400SShannon Zhao #define ARCH_TIMER_NS_EL2_IRQ 10
52ee246400SShannon Zhao 
5301fe6b60SShannon Zhao #define VIRTUAL_PMU_IRQ 7
5401fe6b60SShannon Zhao 
5501fe6b60SShannon Zhao #define PPI(irq) ((irq) + 16)
5601fe6b60SShannon Zhao 
57afe0b380SShannon Zhao enum {
58afe0b380SShannon Zhao     VIRT_FLASH,
59afe0b380SShannon Zhao     VIRT_MEM,
60afe0b380SShannon Zhao     VIRT_CPUPERIPHS,
61afe0b380SShannon Zhao     VIRT_GIC_DIST,
62afe0b380SShannon Zhao     VIRT_GIC_CPU,
63b92ad394SPavel Fedin     VIRT_GIC_V2M,
6455ef3233SLuc Michel     VIRT_GIC_HYP,
6555ef3233SLuc Michel     VIRT_GIC_VCPU,
66b92ad394SPavel Fedin     VIRT_GIC_ITS,
67b92ad394SPavel Fedin     VIRT_GIC_REDIST,
68584105eaSPrem Mallappa     VIRT_SMMU,
69afe0b380SShannon Zhao     VIRT_UART,
70afe0b380SShannon Zhao     VIRT_MMIO,
71afe0b380SShannon Zhao     VIRT_RTC,
72afe0b380SShannon Zhao     VIRT_FW_CFG,
73afe0b380SShannon Zhao     VIRT_PCIE,
746a1f001bSShannon Zhao     VIRT_PCIE_MMIO,
756a1f001bSShannon Zhao     VIRT_PCIE_PIO,
766a1f001bSShannon Zhao     VIRT_PCIE_ECAM,
775f7a5a0eSEric Auger     VIRT_PLATFORM_BUS,
78b0a3721eSShannon Zhao     VIRT_GPIO,
793df708ebSPeter Maydell     VIRT_SECURE_UART,
8083ec1923SPeter Maydell     VIRT_SECURE_MEM,
81cff51ac9SShameer Kolothum     VIRT_PCDIMM_ACPI,
82cff51ac9SShameer Kolothum     VIRT_ACPI_GED,
83b5a60beeSKwangwoo Lee     VIRT_NVDIMM_ACPI,
84350a9c9eSEric Auger     VIRT_LOWMEMMAP_LAST,
85350a9c9eSEric Auger };
86350a9c9eSEric Auger 
87350a9c9eSEric Auger /* indices of IO regions located after the RAM */
88350a9c9eSEric Auger enum {
89350a9c9eSEric Auger     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
90350a9c9eSEric Auger     VIRT_HIGH_PCIE_ECAM,
91350a9c9eSEric Auger     VIRT_HIGH_PCIE_MMIO,
92afe0b380SShannon Zhao };
93afe0b380SShannon Zhao 
94584105eaSPrem Mallappa typedef enum VirtIOMMUType {
95584105eaSPrem Mallappa     VIRT_IOMMU_NONE,
96584105eaSPrem Mallappa     VIRT_IOMMU_SMMUV3,
97584105eaSPrem Mallappa     VIRT_IOMMU_VIRTIO,
98584105eaSPrem Mallappa } VirtIOMMUType;
99584105eaSPrem Mallappa 
1001b6f99d8SEric Auger typedef enum VirtMSIControllerType {
1011b6f99d8SEric Auger     VIRT_MSI_CTRL_NONE,
1021b6f99d8SEric Auger     VIRT_MSI_CTRL_GICV2M,
1031b6f99d8SEric Auger     VIRT_MSI_CTRL_ITS,
1041b6f99d8SEric Auger } VirtMSIControllerType;
1051b6f99d8SEric Auger 
106d04460e5SEric Auger typedef enum VirtGICType {
107d04460e5SEric Auger     VIRT_GIC_VERSION_MAX,
108d04460e5SEric Auger     VIRT_GIC_VERSION_HOST,
109d04460e5SEric Auger     VIRT_GIC_VERSION_2,
110d04460e5SEric Auger     VIRT_GIC_VERSION_3,
11136bf4ec8SEric Auger     VIRT_GIC_VERSION_NOSEL,
112d04460e5SEric Auger } VirtGICType;
113d04460e5SEric Auger 
114afe0b380SShannon Zhao typedef struct MemMapEntry {
115afe0b380SShannon Zhao     hwaddr base;
116afe0b380SShannon Zhao     hwaddr size;
117afe0b380SShannon Zhao } MemMapEntry;
118afe0b380SShannon Zhao 
119db1015e9SEduardo Habkost struct VirtMachineClass {
120a72d4363SAndrew Jones     MachineClass parent;
121a72d4363SAndrew Jones     bool disallow_affinity_adjustment;
122a72d4363SAndrew Jones     bool no_its;
123a72d4363SAndrew Jones     bool no_pmu;
124a72d4363SAndrew Jones     bool claim_edge_triggered_timers;
125dfadc3bfSWei Huang     bool smbios_old_sys_ver;
12617ec075aSEric Auger     bool no_highmem_ecam;
127cff51ac9SShameer Kolothum     bool no_ged;   /* Machines < 4.2 has no support for ACPI GED device */
128dea101a1SAndrew Jones     bool kvm_no_adjvtime;
1292c1fb4d5SAndrew Jones     bool acpi_expose_flash;
130db1015e9SEduardo Habkost };
131a72d4363SAndrew Jones 
132db1015e9SEduardo Habkost struct VirtMachineState {
133a72d4363SAndrew Jones     MachineState parent;
134a72d4363SAndrew Jones     Notifier machine_done;
135a3fc8396SIgor Mammedov     DeviceState *platform_bus_dev;
136af1f60a4SAndrew Jones     FWCfgState *fw_cfg;
137e0561e60SMarkus Armbruster     PFlashCFI01 *flash[2];
138a72d4363SAndrew Jones     bool secure;
139a72d4363SAndrew Jones     bool highmem;
140601d626dSEric Auger     bool highmem_ecam;
141ccc11b02SEric Auger     bool its;
142f29cacfbSPeter Maydell     bool virt;
1432afa8c85SDongjiu Geng     bool ras;
1446f4e1405SRichard Henderson     bool mte;
14517e89077SGerd Hoffmann     OnOffAuto acpi;
146d04460e5SEric Auger     VirtGICType gic_version;
147584105eaSPrem Mallappa     VirtIOMMUType iommu;
1481b6f99d8SEric Auger     VirtMSIControllerType msi_controller;
14970e89132SEric Auger     uint16_t virtio_iommu_bdf;
150a72d4363SAndrew Jones     struct arm_boot_info bootinfo;
151350a9c9eSEric Auger     MemMapEntry *memmap;
15270e89132SEric Auger     char *pciehb_nodename;
153a72d4363SAndrew Jones     const int *irqmap;
154a72d4363SAndrew Jones     int smp_cpus;
155a72d4363SAndrew Jones     void *fdt;
156a72d4363SAndrew Jones     int fdt_size;
157a72d4363SAndrew Jones     uint32_t clock_phandle;
158a72d4363SAndrew Jones     uint32_t gic_phandle;
159a72d4363SAndrew Jones     uint32_t msi_phandle;
160584105eaSPrem Mallappa     uint32_t iommu_phandle;
1612013c566SPeter Maydell     int psci_conduit;
162957e32cfSEric Auger     hwaddr highest_gpa;
163b8b69f4cSPhilippe Mathieu-Daudé     DeviceState *gic;
164cff51ac9SShameer Kolothum     DeviceState *acpi_dev;
165c345680cSShameer Kolothum     Notifier powerdown_notifier;
166db1015e9SEduardo Habkost };
167a72d4363SAndrew Jones 
168bf424a12SEric Auger #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
169601d626dSEric Auger 
170a72d4363SAndrew Jones #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
171*a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
172a72d4363SAndrew Jones 
173e9a8e474SAndrew Jones void virt_acpi_setup(VirtMachineState *vms);
17417e89077SGerd Hoffmann bool virt_is_acpi_enabled(VirtMachineState *vms);
175d05fdab4SAndrew Jones 
176f90747c4SEric Auger /* Return the number of used redistributor regions  */
177f90747c4SEric Auger static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
178f90747c4SEric Auger {
179f90747c4SEric Auger     uint32_t redist0_capacity =
180f90747c4SEric Auger                 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
181f90747c4SEric Auger 
182d04460e5SEric Auger     assert(vms->gic_version == VIRT_GIC_VERSION_3);
183f90747c4SEric Auger 
184f90747c4SEric Auger     return vms->smp_cpus > redist0_capacity ? 2 : 1;
185f90747c4SEric Auger }
186f90747c4SEric Auger 
187d05fdab4SAndrew Jones #endif /* QEMU_ARM_VIRT_H */
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