1afe0b380SShannon Zhao /* 2afe0b380SShannon Zhao * 3afe0b380SShannon Zhao * Copyright (c) 2015 Linaro Limited 4afe0b380SShannon Zhao * 5afe0b380SShannon Zhao * This program is free software; you can redistribute it and/or modify it 6afe0b380SShannon Zhao * under the terms and conditions of the GNU General Public License, 7afe0b380SShannon Zhao * version 2 or later, as published by the Free Software Foundation. 8afe0b380SShannon Zhao * 9afe0b380SShannon Zhao * This program is distributed in the hope it will be useful, but WITHOUT 10afe0b380SShannon Zhao * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11afe0b380SShannon Zhao * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12afe0b380SShannon Zhao * more details. 13afe0b380SShannon Zhao * 14afe0b380SShannon Zhao * You should have received a copy of the GNU General Public License along with 15afe0b380SShannon Zhao * this program. If not, see <http://www.gnu.org/licenses/>. 16afe0b380SShannon Zhao * 17afe0b380SShannon Zhao * Emulate a virtual board which works by passing Linux all the information 18afe0b380SShannon Zhao * it needs about what devices are present via the device tree. 19afe0b380SShannon Zhao * There are some restrictions about what we can do here: 20afe0b380SShannon Zhao * + we can only present devices whose Linux drivers will work based 21afe0b380SShannon Zhao * purely on the device tree with no platform data at all 22afe0b380SShannon Zhao * + we want to present a very stripped-down minimalist platform, 23afe0b380SShannon Zhao * both because this reduces the security attack surface from the guest 24afe0b380SShannon Zhao * and also because it reduces our exposure to being broken when 25afe0b380SShannon Zhao * the kernel updates its device tree bindings and requires further 26afe0b380SShannon Zhao * information in a device binding that we aren't providing. 27afe0b380SShannon Zhao * This is essentially the same approach kvmtool uses. 28afe0b380SShannon Zhao */ 29afe0b380SShannon Zhao 30afe0b380SShannon Zhao #ifndef QEMU_ARM_VIRT_H 31afe0b380SShannon Zhao #define QEMU_ARM_VIRT_H 32afe0b380SShannon Zhao 33afe0b380SShannon Zhao #include "qemu-common.h" 3433c11879SPaolo Bonzini #include "exec/hwaddr.h" 35d05fdab4SAndrew Jones #include "qemu/notify.h" 36a72d4363SAndrew Jones #include "hw/boards.h" 37a72d4363SAndrew Jones #include "hw/arm/arm.h" 38f90747c4SEric Auger #include "sysemu/kvm.h" 39f90747c4SEric Auger #include "hw/intc/arm_gicv3_common.h" 40afe0b380SShannon Zhao 41bd204e63SChristoffer Dall #define NUM_GICV2M_SPIS 64 42afe0b380SShannon Zhao #define NUM_VIRTIO_TRANSPORTS 32 43584105eaSPrem Mallappa #define NUM_SMMU_IRQS 4 44afe0b380SShannon Zhao 4555ef3233SLuc Michel #define ARCH_GIC_MAINT_IRQ 9 465454006aSPeter Maydell 47ee246400SShannon Zhao #define ARCH_TIMER_VIRT_IRQ 11 48ee246400SShannon Zhao #define ARCH_TIMER_S_EL1_IRQ 13 49ee246400SShannon Zhao #define ARCH_TIMER_NS_EL1_IRQ 14 50ee246400SShannon Zhao #define ARCH_TIMER_NS_EL2_IRQ 10 51ee246400SShannon Zhao 5201fe6b60SShannon Zhao #define VIRTUAL_PMU_IRQ 7 5301fe6b60SShannon Zhao 5401fe6b60SShannon Zhao #define PPI(irq) ((irq) + 16) 5501fe6b60SShannon Zhao 56afe0b380SShannon Zhao enum { 57afe0b380SShannon Zhao VIRT_FLASH, 58afe0b380SShannon Zhao VIRT_MEM, 59afe0b380SShannon Zhao VIRT_CPUPERIPHS, 60afe0b380SShannon Zhao VIRT_GIC_DIST, 61afe0b380SShannon Zhao VIRT_GIC_CPU, 62b92ad394SPavel Fedin VIRT_GIC_V2M, 6355ef3233SLuc Michel VIRT_GIC_HYP, 6455ef3233SLuc Michel VIRT_GIC_VCPU, 65b92ad394SPavel Fedin VIRT_GIC_ITS, 66b92ad394SPavel Fedin VIRT_GIC_REDIST, 67*bf424a12SEric Auger VIRT_HIGH_GIC_REDIST2, 68584105eaSPrem Mallappa VIRT_SMMU, 69afe0b380SShannon Zhao VIRT_UART, 70afe0b380SShannon Zhao VIRT_MMIO, 71afe0b380SShannon Zhao VIRT_RTC, 72afe0b380SShannon Zhao VIRT_FW_CFG, 73afe0b380SShannon Zhao VIRT_PCIE, 746a1f001bSShannon Zhao VIRT_PCIE_MMIO, 756a1f001bSShannon Zhao VIRT_PCIE_PIO, 766a1f001bSShannon Zhao VIRT_PCIE_ECAM, 77*bf424a12SEric Auger VIRT_HIGH_PCIE_ECAM, 785f7a5a0eSEric Auger VIRT_PLATFORM_BUS, 79*bf424a12SEric Auger VIRT_HIGH_PCIE_MMIO, 80b0a3721eSShannon Zhao VIRT_GPIO, 813df708ebSPeter Maydell VIRT_SECURE_UART, 8283ec1923SPeter Maydell VIRT_SECURE_MEM, 83afe0b380SShannon Zhao }; 84afe0b380SShannon Zhao 85584105eaSPrem Mallappa typedef enum VirtIOMMUType { 86584105eaSPrem Mallappa VIRT_IOMMU_NONE, 87584105eaSPrem Mallappa VIRT_IOMMU_SMMUV3, 88584105eaSPrem Mallappa VIRT_IOMMU_VIRTIO, 89584105eaSPrem Mallappa } VirtIOMMUType; 90584105eaSPrem Mallappa 91afe0b380SShannon Zhao typedef struct MemMapEntry { 92afe0b380SShannon Zhao hwaddr base; 93afe0b380SShannon Zhao hwaddr size; 94afe0b380SShannon Zhao } MemMapEntry; 95afe0b380SShannon Zhao 96a72d4363SAndrew Jones typedef struct { 97a72d4363SAndrew Jones MachineClass parent; 98a72d4363SAndrew Jones bool disallow_affinity_adjustment; 99a72d4363SAndrew Jones bool no_its; 100a72d4363SAndrew Jones bool no_pmu; 101a72d4363SAndrew Jones bool claim_edge_triggered_timers; 102dfadc3bfSWei Huang bool smbios_old_sys_ver; 10317ec075aSEric Auger bool no_highmem_ecam; 104a72d4363SAndrew Jones } VirtMachineClass; 105a72d4363SAndrew Jones 106a72d4363SAndrew Jones typedef struct { 107a72d4363SAndrew Jones MachineState parent; 108a72d4363SAndrew Jones Notifier machine_done; 109a3fc8396SIgor Mammedov DeviceState *platform_bus_dev; 110af1f60a4SAndrew Jones FWCfgState *fw_cfg; 111a72d4363SAndrew Jones bool secure; 112a72d4363SAndrew Jones bool highmem; 113601d626dSEric Auger bool highmem_ecam; 114ccc11b02SEric Auger bool its; 115f29cacfbSPeter Maydell bool virt; 116a72d4363SAndrew Jones int32_t gic_version; 117584105eaSPrem Mallappa VirtIOMMUType iommu; 118a72d4363SAndrew Jones struct arm_boot_info bootinfo; 119a72d4363SAndrew Jones const MemMapEntry *memmap; 120a72d4363SAndrew Jones const int *irqmap; 121a72d4363SAndrew Jones int smp_cpus; 122a72d4363SAndrew Jones void *fdt; 123a72d4363SAndrew Jones int fdt_size; 124a72d4363SAndrew Jones uint32_t clock_phandle; 125a72d4363SAndrew Jones uint32_t gic_phandle; 126a72d4363SAndrew Jones uint32_t msi_phandle; 127584105eaSPrem Mallappa uint32_t iommu_phandle; 1282013c566SPeter Maydell int psci_conduit; 129a72d4363SAndrew Jones } VirtMachineState; 130a72d4363SAndrew Jones 131*bf424a12SEric Auger #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) 132601d626dSEric Auger 133a72d4363SAndrew Jones #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 134a72d4363SAndrew Jones #define VIRT_MACHINE(obj) \ 135a72d4363SAndrew Jones OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE) 136a72d4363SAndrew Jones #define VIRT_MACHINE_GET_CLASS(obj) \ 137a72d4363SAndrew Jones OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE) 138a72d4363SAndrew Jones #define VIRT_MACHINE_CLASS(klass) \ 139a72d4363SAndrew Jones OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE) 140a72d4363SAndrew Jones 141e9a8e474SAndrew Jones void virt_acpi_setup(VirtMachineState *vms); 142d05fdab4SAndrew Jones 143f90747c4SEric Auger /* Return the number of used redistributor regions */ 144f90747c4SEric Auger static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 145f90747c4SEric Auger { 146f90747c4SEric Auger uint32_t redist0_capacity = 147f90747c4SEric Auger vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; 148f90747c4SEric Auger 149f90747c4SEric Auger assert(vms->gic_version == 3); 150f90747c4SEric Auger 151f90747c4SEric Auger return vms->smp_cpus > redist0_capacity ? 2 : 1; 152f90747c4SEric Auger } 153f90747c4SEric Auger 154d05fdab4SAndrew Jones #endif /* QEMU_ARM_VIRT_H */ 155