1b89de436SEdgar E. Iglesias /* 2b89de436SEdgar E. Iglesias * Model of the Xilinx Versal 3b89de436SEdgar E. Iglesias * 4b89de436SEdgar E. Iglesias * Copyright (c) 2018 Xilinx Inc. 5b89de436SEdgar E. Iglesias * Written by Edgar E. Iglesias 6b89de436SEdgar E. Iglesias * 7b89de436SEdgar E. Iglesias * This program is free software; you can redistribute it and/or modify 8b89de436SEdgar E. Iglesias * it under the terms of the GNU General Public License version 2 or 9b89de436SEdgar E. Iglesias * (at your option) any later version. 10b89de436SEdgar E. Iglesias */ 11b89de436SEdgar E. Iglesias 12b89de436SEdgar E. Iglesias #ifndef XLNX_VERSAL_H 13b89de436SEdgar E. Iglesias #define XLNX_VERSAL_H 14b89de436SEdgar E. Iglesias 15b89de436SEdgar E. Iglesias #include "hw/sysbus.h" 168779d00cSEdgar E. Iglesias #include "hw/cpu/cluster.h" 17a55b441bSEdgar E. Iglesias #include "hw/or-irq.h" 18724c6e12SEdgar E. Iglesias #include "hw/sd/sdhci.h" 19b89de436SEdgar E. Iglesias #include "hw/intc/arm_gicv3.h" 2088052ffdSEdgar E. Iglesias #include "hw/char/pl011.h" 21f4e3fa37SEdgar E. Iglesias #include "hw/dma/xlnx-zdma.h" 224bd9b59cSEdgar E. Iglesias #include "hw/net/cadence_gem.h" 23eb1221c5SEdgar E. Iglesias #include "hw/rtc/xlnx-zynqmp-rtc.h" 24db1015e9SEduardo Habkost #include "qom/object.h" 25144677d4SVikram Garhwal #include "hw/usb/xlnx-usb-subsystem.h" 26a55b441bSEdgar E. Iglesias #include "hw/misc/xlnx-versal-xramc.h" 27393185bcSTong Ho #include "hw/nvram/xlnx-bbram.h" 285f4910ffSTong Ho #include "hw/nvram/xlnx-versal-efuse.h" 29868d9680SFrancisco Iglesias #include "hw/ssi/xlnx-versal-ospi.h" 30868d9680SFrancisco Iglesias #include "hw/dma/xlnx_csu_dma.h" 31d6ccfc7eSEdgar E. Iglesias #include "hw/misc/xlnx-versal-crl.h" 32f7c9aecbSFrancisco Iglesias #include "hw/misc/xlnx-versal-pmc-iou-slcr.h" 333b22376bSTong Ho #include "hw/misc/xlnx-versal-trng.h" 34042d6b02SVikram Garhwal #include "hw/net/xlnx-versal-canfd.h" 35b286d08aSFrancisco Iglesias #include "hw/misc/xlnx-versal-cfu.h" 364a0244b4SFrancisco Iglesias #include "hw/misc/xlnx-versal-cframe-reg.h" 375b5f4169SPhilippe Mathieu-Daudé #include "target/arm/cpu.h" 38b89de436SEdgar E. Iglesias 39b89de436SEdgar E. Iglesias #define TYPE_XLNX_VERSAL "xlnx-versal" 408063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) 41b89de436SEdgar E. Iglesias 42b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_ACPUS 2 4367a645a3SEdgar E. Iglesias #define XLNX_VERSAL_NR_RCPUS 2 44b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_UARTS 2 45b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_GEMS 2 468a218651SEdgar E. Iglesias #define XLNX_VERSAL_NR_ADMAS 8 47724c6e12SEdgar E. Iglesias #define XLNX_VERSAL_NR_SDS 2 48a55b441bSEdgar E. Iglesias #define XLNX_VERSAL_NR_XRAM 4 49f6ef171dSEdgar E. Iglesias #define XLNX_VERSAL_NR_IRQS 192 50042d6b02SVikram Garhwal #define XLNX_VERSAL_NR_CANFD 2 51042d6b02SVikram Garhwal #define XLNX_VERSAL_CANFD_REF_CLK (24 * 1000 * 1000) 524a0244b4SFrancisco Iglesias #define XLNX_VERSAL_NR_CFRAME 15 53b89de436SEdgar E. Iglesias 54db1015e9SEduardo Habkost struct Versal { 55b89de436SEdgar E. Iglesias /*< private >*/ 56b89de436SEdgar E. Iglesias SysBusDevice parent_obj; 57b89de436SEdgar E. Iglesias 58b89de436SEdgar E. Iglesias /*< public >*/ 59b89de436SEdgar E. Iglesias struct { 60b89de436SEdgar E. Iglesias struct { 61b89de436SEdgar E. Iglesias MemoryRegion mr; 628779d00cSEdgar E. Iglesias CPUClusterState cluster; 63ced18d5eSEdgar E. Iglesias ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; 64b89de436SEdgar E. Iglesias GICv3State gic; 65b89de436SEdgar E. Iglesias } apu; 66b89de436SEdgar E. Iglesias } fpd; 67b89de436SEdgar E. Iglesias 68b89de436SEdgar E. Iglesias MemoryRegion mr_ps; 69b89de436SEdgar E. Iglesias 70b89de436SEdgar E. Iglesias struct { 71b89de436SEdgar E. Iglesias /* 4 ranges to access DDR. */ 72b89de436SEdgar E. Iglesias MemoryRegion mr_ddr_ranges[4]; 73b89de436SEdgar E. Iglesias } noc; 74b89de436SEdgar E. Iglesias 75b89de436SEdgar E. Iglesias struct { 76b89de436SEdgar E. Iglesias MemoryRegion mr_ocm; 77b89de436SEdgar E. Iglesias 78b89de436SEdgar E. Iglesias struct { 7988052ffdSEdgar E. Iglesias PL011State uart[XLNX_VERSAL_NR_UARTS]; 804bd9b59cSEdgar E. Iglesias CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; 81f4e3fa37SEdgar E. Iglesias XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; 82144677d4SVikram Garhwal VersalUsb2 usb; 83042d6b02SVikram Garhwal CanBusState *canbus[XLNX_VERSAL_NR_CANFD]; 84042d6b02SVikram Garhwal XlnxVersalCANFDState canfd[XLNX_VERSAL_NR_CANFD]; 85b89de436SEdgar E. Iglesias } iou; 86a55b441bSEdgar E. Iglesias 8767a645a3SEdgar E. Iglesias /* Real-time Processing Unit. */ 8867a645a3SEdgar E. Iglesias struct { 8967a645a3SEdgar E. Iglesias MemoryRegion mr; 9067a645a3SEdgar E. Iglesias MemoryRegion mr_ps_alias; 9167a645a3SEdgar E. Iglesias 9267a645a3SEdgar E. Iglesias CPUClusterState cluster; 9367a645a3SEdgar E. Iglesias ARMCPU cpu[XLNX_VERSAL_NR_RCPUS]; 9467a645a3SEdgar E. Iglesias } rpu; 9567a645a3SEdgar E. Iglesias 96a55b441bSEdgar E. Iglesias struct { 97e844f0c5SPhilippe Mathieu-Daudé OrIRQState irq_orgate; 98a55b441bSEdgar E. Iglesias XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM]; 99a55b441bSEdgar E. Iglesias } xram; 100d6ccfc7eSEdgar E. Iglesias 101d6ccfc7eSEdgar E. Iglesias XlnxVersalCRL crl; 102b89de436SEdgar E. Iglesias } lpd; 103b89de436SEdgar E. Iglesias 104724c6e12SEdgar E. Iglesias /* The Platform Management Controller subsystem. */ 105724c6e12SEdgar E. Iglesias struct { 106724c6e12SEdgar E. Iglesias struct { 107724c6e12SEdgar E. Iglesias SDHCIState sd[XLNX_VERSAL_NR_SDS]; 108f7c9aecbSFrancisco Iglesias XlnxVersalPmcIouSlcr slcr; 109868d9680SFrancisco Iglesias 110868d9680SFrancisco Iglesias struct { 111868d9680SFrancisco Iglesias XlnxVersalOspi ospi; 112868d9680SFrancisco Iglesias XlnxCSUDMA dma_src; 113868d9680SFrancisco Iglesias XlnxCSUDMA dma_dst; 114868d9680SFrancisco Iglesias MemoryRegion linear_mr; 115e844f0c5SPhilippe Mathieu-Daudé OrIRQState irq_orgate; 116868d9680SFrancisco Iglesias } ospi; 117724c6e12SEdgar E. Iglesias } iou; 118eb1221c5SEdgar E. Iglesias 119eb1221c5SEdgar E. Iglesias XlnxZynqMPRTC rtc; 1203b22376bSTong Ho XlnxVersalTRng trng; 121393185bcSTong Ho XlnxBBRam bbram; 1225f4910ffSTong Ho XlnxEFuse efuse; 1235f4910ffSTong Ho XlnxVersalEFuseCtrl efuse_ctrl; 1245f4910ffSTong Ho XlnxVersalEFuseCache efuse_cache; 125b286d08aSFrancisco Iglesias XlnxVersalCFUAPB cfu_apb; 126b286d08aSFrancisco Iglesias XlnxVersalCFUFDRO cfu_fdro; 127b286d08aSFrancisco Iglesias XlnxVersalCFUSFR cfu_sfr; 1284a0244b4SFrancisco Iglesias XlnxVersalCFrameReg cframe[XLNX_VERSAL_NR_CFRAME]; 1294a0244b4SFrancisco Iglesias XlnxVersalCFrameBcastReg cframe_bcast; 1309a6d4918SFrancisco Iglesias 131e844f0c5SPhilippe Mathieu-Daudé OrIRQState apb_irq_orgate; 132724c6e12SEdgar E. Iglesias } pmc; 133724c6e12SEdgar E. Iglesias 134b89de436SEdgar E. Iglesias struct { 135b89de436SEdgar E. Iglesias MemoryRegion *mr_ddr; 136b89de436SEdgar E. Iglesias } cfg; 137db1015e9SEduardo Habkost }; 138b89de436SEdgar E. Iglesias 139b89de436SEdgar E. Iglesias /* Memory-map and IRQ definitions. Copied a subset from 140b89de436SEdgar E. Iglesias * auto-generated files. */ 141b89de436SEdgar E. Iglesias 142b89de436SEdgar E. Iglesias #define VERSAL_GIC_MAINT_IRQ 9 143b89de436SEdgar E. Iglesias #define VERSAL_TIMER_VIRT_IRQ 11 144b89de436SEdgar E. Iglesias #define VERSAL_TIMER_S_EL1_IRQ 13 145b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL1_IRQ 14 146b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL2_IRQ 10 147b89de436SEdgar E. Iglesias 148d6ccfc7eSEdgar E. Iglesias #define VERSAL_CRL_IRQ 10 149b89de436SEdgar E. Iglesias #define VERSAL_UART0_IRQ_0 18 150b89de436SEdgar E. Iglesias #define VERSAL_UART1_IRQ_0 19 151042d6b02SVikram Garhwal #define VERSAL_CANFD0_IRQ_0 20 152042d6b02SVikram Garhwal #define VERSAL_CANFD1_IRQ_0 21 153144677d4SVikram Garhwal #define VERSAL_USB0_IRQ_0 22 154b89de436SEdgar E. Iglesias #define VERSAL_GEM0_IRQ_0 56 155b89de436SEdgar E. Iglesias #define VERSAL_GEM0_WAKE_IRQ_0 57 156b89de436SEdgar E. Iglesias #define VERSAL_GEM1_IRQ_0 58 157b89de436SEdgar E. Iglesias #define VERSAL_GEM1_WAKE_IRQ_0 59 1588a218651SEdgar E. Iglesias #define VERSAL_ADMA_IRQ_0 60 159a55b441bSEdgar E. Iglesias #define VERSAL_XRAM_IRQ_0 79 160b286d08aSFrancisco Iglesias #define VERSAL_CFU_IRQ_0 120 1619a6d4918SFrancisco Iglesias #define VERSAL_PMC_APB_IRQ 121 162868d9680SFrancisco Iglesias #define VERSAL_OSPI_IRQ 124 163724c6e12SEdgar E. Iglesias #define VERSAL_SD0_IRQ_0 126 1645f4910ffSTong Ho #define VERSAL_EFUSE_IRQ 139 1653b22376bSTong Ho #define VERSAL_TRNG_IRQ 141 166eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_ALARM_IRQ 142 167eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_SECONDS_IRQ 143 168b89de436SEdgar E. Iglesias 169fb179055SEdgar E. Iglesias /* Architecturally reserved IRQs suitable for virtualization. */ 170fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_FIRST 111 171fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_LAST 118 172b89de436SEdgar E. Iglesias 173b89de436SEdgar E. Iglesias #define MM_TOP_RSVD 0xa0000000U 174b89de436SEdgar E. Iglesias #define MM_TOP_RSVD_SIZE 0x4000000 175b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN 0xf9000000U 176b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN_SIZE 0x10000 177b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0 0xf9080000U 178b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0_SIZE 0x80000 179b89de436SEdgar E. Iglesias 180b89de436SEdgar E. Iglesias #define MM_UART0 0xff000000U 181b89de436SEdgar E. Iglesias #define MM_UART0_SIZE 0x10000 182b89de436SEdgar E. Iglesias #define MM_UART1 0xff010000U 183b89de436SEdgar E. Iglesias #define MM_UART1_SIZE 0x10000 184b89de436SEdgar E. Iglesias 185042d6b02SVikram Garhwal #define MM_CANFD0 0xff060000U 186042d6b02SVikram Garhwal #define MM_CANFD0_SIZE 0x10000 187042d6b02SVikram Garhwal #define MM_CANFD1 0xff070000U 188042d6b02SVikram Garhwal #define MM_CANFD1_SIZE 0x10000 189042d6b02SVikram Garhwal 190b89de436SEdgar E. Iglesias #define MM_GEM0 0xff0c0000U 191b89de436SEdgar E. Iglesias #define MM_GEM0_SIZE 0x10000 192b89de436SEdgar E. Iglesias #define MM_GEM1 0xff0d0000U 193b89de436SEdgar E. Iglesias #define MM_GEM1_SIZE 0x10000 194b89de436SEdgar E. Iglesias 1958a218651SEdgar E. Iglesias #define MM_ADMA_CH0 0xffa80000U 1968a218651SEdgar E. Iglesias #define MM_ADMA_CH0_SIZE 0x10000 1978a218651SEdgar E. Iglesias 198b89de436SEdgar E. Iglesias #define MM_OCM 0xfffc0000U 199b89de436SEdgar E. Iglesias #define MM_OCM_SIZE 0x40000 200b89de436SEdgar E. Iglesias 201a55b441bSEdgar E. Iglesias #define MM_XRAM 0xfe800000 202a55b441bSEdgar E. Iglesias #define MM_XRAMC 0xff8e0000 203a55b441bSEdgar E. Iglesias #define MM_XRAMC_SIZE 0x10000 204a55b441bSEdgar E. Iglesias 205144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS 0xFF9D0000 206144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS_SIZE 0x10000 207144677d4SVikram Garhwal 208144677d4SVikram Garhwal #define MM_USB_0 0xFE200000 209144677d4SVikram Garhwal #define MM_USB_0_SIZE 0x10000 210144677d4SVikram Garhwal 211b89de436SEdgar E. Iglesias #define MM_TOP_DDR 0x0 212b89de436SEdgar E. Iglesias #define MM_TOP_DDR_SIZE 0x80000000U 213b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2 0x800000000ULL 214b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2_SIZE 0x800000000ULL 215b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3 0xc000000000ULL 216b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3_SIZE 0x4000000000ULL 217b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4 0x10000000000ULL 218b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4_SIZE 0xb780000000ULL 219b89de436SEdgar E. Iglesias 220b89de436SEdgar E. Iglesias #define MM_PSM_START 0xffc80000U 221b89de436SEdgar E. Iglesias #define MM_PSM_END 0xffcf0000U 222b89de436SEdgar E. Iglesias 223b89de436SEdgar E. Iglesias #define MM_CRL 0xff5e0000U 224b89de436SEdgar E. Iglesias #define MM_CRL_SIZE 0x300000 225b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR 0xff130000U 226b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR_SIZE 0x10000 227b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS 0xff140000U 228b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS_SIZE 0x10000 229b89de436SEdgar E. Iglesias #define MM_FPD_CRF 0xfd1a0000U 230b89de436SEdgar E. Iglesias #define MM_FPD_CRF_SIZE 0x140000 2319a0fcb7fSTong Ho #define MM_FPD_FPD_APU 0xfd5c0000 2329a0fcb7fSTong Ho #define MM_FPD_FPD_APU_SIZE 0x100 233f0138990SEdgar E. Iglesias 234f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR 0xf1060000 235f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000 236f7c9aecbSFrancisco Iglesias 237868d9680SFrancisco Iglesias #define MM_PMC_OSPI 0xf1010000 238868d9680SFrancisco Iglesias #define MM_PMC_OSPI_SIZE 0x10000 239868d9680SFrancisco Iglesias 240868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DAC 0xc0000000 241868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DAC_SIZE 0x20000000 242868d9680SFrancisco Iglesias 243868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DMA_DST 0xf1011800 244868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DMA_SRC 0xf1011000 245868d9680SFrancisco Iglesias 246724c6e12SEdgar E. Iglesias #define MM_PMC_SD0 0xf1040000U 247724c6e12SEdgar E. Iglesias #define MM_PMC_SD0_SIZE 0x10000 248393185bcSTong Ho #define MM_PMC_BBRAM_CTRL 0xf11f0000 249393185bcSTong Ho #define MM_PMC_BBRAM_CTRL_SIZE 0x00050 2505f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL 0xf1240000 2515f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL_SIZE 0x00104 2525f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE 0xf1250000 2535f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE_SIZE 0x00C00 2545f4910ffSTong Ho 255b286d08aSFrancisco Iglesias #define MM_PMC_CFU_APB 0xf12b0000 256b286d08aSFrancisco Iglesias #define MM_PMC_CFU_APB_SIZE 0x10000 257b286d08aSFrancisco Iglesias #define MM_PMC_CFU_STREAM 0xf12c0000 258b286d08aSFrancisco Iglesias #define MM_PMC_CFU_STREAM_SIZE 0x1000 259b286d08aSFrancisco Iglesias #define MM_PMC_CFU_SFR 0xf12c1000 260b286d08aSFrancisco Iglesias #define MM_PMC_CFU_SFR_SIZE 0x1000 261b286d08aSFrancisco Iglesias #define MM_PMC_CFU_FDRO 0xf12c2000 262b286d08aSFrancisco Iglesias #define MM_PMC_CFU_FDRO_SIZE 0x1000 263b286d08aSFrancisco Iglesias #define MM_PMC_CFU_STREAM_2 0xf1f80000 264b286d08aSFrancisco Iglesias #define MM_PMC_CFU_STREAM_2_SIZE 0x40000 265b286d08aSFrancisco Iglesias 2664a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME0_REG 0xf12d0000 2674a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME0_REG_SIZE 0x1000 2684a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME0_FDRI 0xf12d1000 2694a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME0_FDRI_SIZE 0x1000 2704a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME1_REG 0xf12d2000 2714a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME1_REG_SIZE 0x1000 2724a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME1_FDRI 0xf12d3000 2734a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME1_FDRI_SIZE 0x1000 2744a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME2_REG 0xf12d4000 2754a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME2_REG_SIZE 0x1000 2764a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME2_FDRI 0xf12d5000 2774a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME2_FDRI_SIZE 0x1000 2784a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME3_REG 0xf12d6000 2794a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME3_REG_SIZE 0x1000 2804a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME3_FDRI 0xf12d7000 2814a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME3_FDRI_SIZE 0x1000 2824a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME4_REG 0xf12d8000 2834a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME4_REG_SIZE 0x1000 2844a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME4_FDRI 0xf12d9000 2854a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME4_FDRI_SIZE 0x1000 2864a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME5_REG 0xf12da000 2874a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME5_REG_SIZE 0x1000 2884a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME5_FDRI 0xf12db000 2894a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME5_FDRI_SIZE 0x1000 2904a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME6_REG 0xf12dc000 2914a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME6_REG_SIZE 0x1000 2924a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME6_FDRI 0xf12dd000 2934a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME6_FDRI_SIZE 0x1000 2944a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME7_REG 0xf12de000 2954a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME7_REG_SIZE 0x1000 2964a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME7_FDRI 0xf12df000 2974a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME7_FDRI_SIZE 0x1000 2984a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME8_REG 0xf12e0000 2994a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME8_REG_SIZE 0x1000 3004a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME8_FDRI 0xf12e1000 3014a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME8_FDRI_SIZE 0x1000 3024a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME9_REG 0xf12e2000 3034a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME9_REG_SIZE 0x1000 3044a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME9_FDRI 0xf12e3000 3054a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME9_FDRI_SIZE 0x1000 3064a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME10_REG 0xf12e4000 3074a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME10_REG_SIZE 0x1000 3084a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME10_FDRI 0xf12e5000 3094a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME10_FDRI_SIZE 0x1000 3104a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME11_REG 0xf12e6000 3114a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME11_REG_SIZE 0x1000 3124a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME11_FDRI 0xf12e7000 3134a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME11_FDRI_SIZE 0x1000 3144a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME12_REG 0xf12e8000 3154a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME12_REG_SIZE 0x1000 3164a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME12_FDRI 0xf12e9000 3174a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME12_FDRI_SIZE 0x1000 3184a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME13_REG 0xf12ea000 3194a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME13_REG_SIZE 0x1000 3204a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME13_FDRI 0xf12eb000 3214a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME13_FDRI_SIZE 0x1000 3224a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME14_REG 0xf12ec000 3234a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME14_REG_SIZE 0x1000 3244a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME14_FDRI 0xf12ed000 3254a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME14_FDRI_SIZE 0x1000 3264a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME_BCAST_REG 0xf12ee000 3274a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME_BCAST_REG_SIZE 0x1000 3284a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME_BCAST_FDRI 0xf12ef000 3294a0244b4SFrancisco Iglesias #define MM_PMC_CFRAME_BCAST_FDRI_SIZE 0x1000 3304a0244b4SFrancisco Iglesias 331f0138990SEdgar E. Iglesias #define MM_PMC_CRP 0xf1260000U 332f0138990SEdgar E. Iglesias #define MM_PMC_CRP_SIZE 0x10000 333eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC 0xf12a0000 334eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC_SIZE 0x10000 3353b22376bSTong Ho #define MM_PMC_TRNG 0xf1230000 3363b22376bSTong Ho #define MM_PMC_TRNG_SIZE 0x10000 337b89de436SEdgar E. Iglesias #endif 338