1b89de436SEdgar E. Iglesias /* 2b89de436SEdgar E. Iglesias * Model of the Xilinx Versal 3b89de436SEdgar E. Iglesias * 4b89de436SEdgar E. Iglesias * Copyright (c) 2018 Xilinx Inc. 5b89de436SEdgar E. Iglesias * Written by Edgar E. Iglesias 6b89de436SEdgar E. Iglesias * 7b89de436SEdgar E. Iglesias * This program is free software; you can redistribute it and/or modify 8b89de436SEdgar E. Iglesias * it under the terms of the GNU General Public License version 2 or 9b89de436SEdgar E. Iglesias * (at your option) any later version. 10b89de436SEdgar E. Iglesias */ 11b89de436SEdgar E. Iglesias 12b89de436SEdgar E. Iglesias #ifndef XLNX_VERSAL_H 13b89de436SEdgar E. Iglesias #define XLNX_VERSAL_H 14b89de436SEdgar E. Iglesias 15b89de436SEdgar E. Iglesias #include "hw/sysbus.h" 1612ec8bd5SPeter Maydell #include "hw/arm/boot.h" 178779d00cSEdgar E. Iglesias #include "hw/cpu/cluster.h" 18a55b441bSEdgar E. Iglesias #include "hw/or-irq.h" 19724c6e12SEdgar E. Iglesias #include "hw/sd/sdhci.h" 20b89de436SEdgar E. Iglesias #include "hw/intc/arm_gicv3.h" 2188052ffdSEdgar E. Iglesias #include "hw/char/pl011.h" 22f4e3fa37SEdgar E. Iglesias #include "hw/dma/xlnx-zdma.h" 234bd9b59cSEdgar E. Iglesias #include "hw/net/cadence_gem.h" 24eb1221c5SEdgar E. Iglesias #include "hw/rtc/xlnx-zynqmp-rtc.h" 25db1015e9SEduardo Habkost #include "qom/object.h" 26144677d4SVikram Garhwal #include "hw/usb/xlnx-usb-subsystem.h" 27a55b441bSEdgar E. Iglesias #include "hw/misc/xlnx-versal-xramc.h" 28393185bcSTong Ho #include "hw/nvram/xlnx-bbram.h" 295f4910ffSTong Ho #include "hw/nvram/xlnx-versal-efuse.h" 30868d9680SFrancisco Iglesias #include "hw/ssi/xlnx-versal-ospi.h" 31868d9680SFrancisco Iglesias #include "hw/dma/xlnx_csu_dma.h" 32d6ccfc7eSEdgar E. Iglesias #include "hw/misc/xlnx-versal-crl.h" 33f7c9aecbSFrancisco Iglesias #include "hw/misc/xlnx-versal-pmc-iou-slcr.h" 34042d6b02SVikram Garhwal #include "hw/net/xlnx-versal-canfd.h" 35b89de436SEdgar E. Iglesias 36b89de436SEdgar E. Iglesias #define TYPE_XLNX_VERSAL "xlnx-versal" 378063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) 38b89de436SEdgar E. Iglesias 39b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_ACPUS 2 4067a645a3SEdgar E. Iglesias #define XLNX_VERSAL_NR_RCPUS 2 41b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_UARTS 2 42b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_GEMS 2 438a218651SEdgar E. Iglesias #define XLNX_VERSAL_NR_ADMAS 8 44724c6e12SEdgar E. Iglesias #define XLNX_VERSAL_NR_SDS 2 45a55b441bSEdgar E. Iglesias #define XLNX_VERSAL_NR_XRAM 4 46f6ef171dSEdgar E. Iglesias #define XLNX_VERSAL_NR_IRQS 192 47042d6b02SVikram Garhwal #define XLNX_VERSAL_NR_CANFD 2 48042d6b02SVikram Garhwal #define XLNX_VERSAL_CANFD_REF_CLK (24 * 1000 * 1000) 49b89de436SEdgar E. Iglesias 50db1015e9SEduardo Habkost struct Versal { 51b89de436SEdgar E. Iglesias /*< private >*/ 52b89de436SEdgar E. Iglesias SysBusDevice parent_obj; 53b89de436SEdgar E. Iglesias 54b89de436SEdgar E. Iglesias /*< public >*/ 55b89de436SEdgar E. Iglesias struct { 56b89de436SEdgar E. Iglesias struct { 57b89de436SEdgar E. Iglesias MemoryRegion mr; 588779d00cSEdgar E. Iglesias CPUClusterState cluster; 59ced18d5eSEdgar E. Iglesias ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; 60b89de436SEdgar E. Iglesias GICv3State gic; 61b89de436SEdgar E. Iglesias } apu; 62b89de436SEdgar E. Iglesias } fpd; 63b89de436SEdgar E. Iglesias 64b89de436SEdgar E. Iglesias MemoryRegion mr_ps; 65b89de436SEdgar E. Iglesias 66b89de436SEdgar E. Iglesias struct { 67b89de436SEdgar E. Iglesias /* 4 ranges to access DDR. */ 68b89de436SEdgar E. Iglesias MemoryRegion mr_ddr_ranges[4]; 69b89de436SEdgar E. Iglesias } noc; 70b89de436SEdgar E. Iglesias 71b89de436SEdgar E. Iglesias struct { 72b89de436SEdgar E. Iglesias MemoryRegion mr_ocm; 73b89de436SEdgar E. Iglesias 74b89de436SEdgar E. Iglesias struct { 7588052ffdSEdgar E. Iglesias PL011State uart[XLNX_VERSAL_NR_UARTS]; 764bd9b59cSEdgar E. Iglesias CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; 77f4e3fa37SEdgar E. Iglesias XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; 78144677d4SVikram Garhwal VersalUsb2 usb; 79042d6b02SVikram Garhwal CanBusState *canbus[XLNX_VERSAL_NR_CANFD]; 80042d6b02SVikram Garhwal XlnxVersalCANFDState canfd[XLNX_VERSAL_NR_CANFD]; 81b89de436SEdgar E. Iglesias } iou; 82a55b441bSEdgar E. Iglesias 8367a645a3SEdgar E. Iglesias /* Real-time Processing Unit. */ 8467a645a3SEdgar E. Iglesias struct { 8567a645a3SEdgar E. Iglesias MemoryRegion mr; 8667a645a3SEdgar E. Iglesias MemoryRegion mr_ps_alias; 8767a645a3SEdgar E. Iglesias 8867a645a3SEdgar E. Iglesias CPUClusterState cluster; 8967a645a3SEdgar E. Iglesias ARMCPU cpu[XLNX_VERSAL_NR_RCPUS]; 9067a645a3SEdgar E. Iglesias } rpu; 9167a645a3SEdgar E. Iglesias 92a55b441bSEdgar E. Iglesias struct { 93e844f0c5SPhilippe Mathieu-Daudé OrIRQState irq_orgate; 94a55b441bSEdgar E. Iglesias XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM]; 95a55b441bSEdgar E. Iglesias } xram; 96d6ccfc7eSEdgar E. Iglesias 97d6ccfc7eSEdgar E. Iglesias XlnxVersalCRL crl; 98b89de436SEdgar E. Iglesias } lpd; 99b89de436SEdgar E. Iglesias 100724c6e12SEdgar E. Iglesias /* The Platform Management Controller subsystem. */ 101724c6e12SEdgar E. Iglesias struct { 102724c6e12SEdgar E. Iglesias struct { 103724c6e12SEdgar E. Iglesias SDHCIState sd[XLNX_VERSAL_NR_SDS]; 104f7c9aecbSFrancisco Iglesias XlnxVersalPmcIouSlcr slcr; 105868d9680SFrancisco Iglesias 106868d9680SFrancisco Iglesias struct { 107868d9680SFrancisco Iglesias XlnxVersalOspi ospi; 108868d9680SFrancisco Iglesias XlnxCSUDMA dma_src; 109868d9680SFrancisco Iglesias XlnxCSUDMA dma_dst; 110868d9680SFrancisco Iglesias MemoryRegion linear_mr; 111e844f0c5SPhilippe Mathieu-Daudé OrIRQState irq_orgate; 112868d9680SFrancisco Iglesias } ospi; 113724c6e12SEdgar E. Iglesias } iou; 114eb1221c5SEdgar E. Iglesias 115eb1221c5SEdgar E. Iglesias XlnxZynqMPRTC rtc; 116393185bcSTong Ho XlnxBBRam bbram; 1175f4910ffSTong Ho XlnxEFuse efuse; 1185f4910ffSTong Ho XlnxVersalEFuseCtrl efuse_ctrl; 1195f4910ffSTong Ho XlnxVersalEFuseCache efuse_cache; 1209a6d4918SFrancisco Iglesias 121e844f0c5SPhilippe Mathieu-Daudé OrIRQState apb_irq_orgate; 122724c6e12SEdgar E. Iglesias } pmc; 123724c6e12SEdgar E. Iglesias 124b89de436SEdgar E. Iglesias struct { 125b89de436SEdgar E. Iglesias MemoryRegion *mr_ddr; 126b89de436SEdgar E. Iglesias } cfg; 127db1015e9SEduardo Habkost }; 128b89de436SEdgar E. Iglesias 129b89de436SEdgar E. Iglesias /* Memory-map and IRQ definitions. Copied a subset from 130b89de436SEdgar E. Iglesias * auto-generated files. */ 131b89de436SEdgar E. Iglesias 132b89de436SEdgar E. Iglesias #define VERSAL_GIC_MAINT_IRQ 9 133b89de436SEdgar E. Iglesias #define VERSAL_TIMER_VIRT_IRQ 11 134b89de436SEdgar E. Iglesias #define VERSAL_TIMER_S_EL1_IRQ 13 135b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL1_IRQ 14 136b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL2_IRQ 10 137b89de436SEdgar E. Iglesias 138d6ccfc7eSEdgar E. Iglesias #define VERSAL_CRL_IRQ 10 139b89de436SEdgar E. Iglesias #define VERSAL_UART0_IRQ_0 18 140b89de436SEdgar E. Iglesias #define VERSAL_UART1_IRQ_0 19 141042d6b02SVikram Garhwal #define VERSAL_CANFD0_IRQ_0 20 142042d6b02SVikram Garhwal #define VERSAL_CANFD1_IRQ_0 21 143144677d4SVikram Garhwal #define VERSAL_USB0_IRQ_0 22 144b89de436SEdgar E. Iglesias #define VERSAL_GEM0_IRQ_0 56 145b89de436SEdgar E. Iglesias #define VERSAL_GEM0_WAKE_IRQ_0 57 146b89de436SEdgar E. Iglesias #define VERSAL_GEM1_IRQ_0 58 147b89de436SEdgar E. Iglesias #define VERSAL_GEM1_WAKE_IRQ_0 59 1488a218651SEdgar E. Iglesias #define VERSAL_ADMA_IRQ_0 60 149a55b441bSEdgar E. Iglesias #define VERSAL_XRAM_IRQ_0 79 1509a6d4918SFrancisco Iglesias #define VERSAL_PMC_APB_IRQ 121 151868d9680SFrancisco Iglesias #define VERSAL_OSPI_IRQ 124 152724c6e12SEdgar E. Iglesias #define VERSAL_SD0_IRQ_0 126 1535f4910ffSTong Ho #define VERSAL_EFUSE_IRQ 139 154eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_ALARM_IRQ 142 155eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_SECONDS_IRQ 143 156b89de436SEdgar E. Iglesias 157fb179055SEdgar E. Iglesias /* Architecturally reserved IRQs suitable for virtualization. */ 158fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_FIRST 111 159fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_LAST 118 160b89de436SEdgar E. Iglesias 161b89de436SEdgar E. Iglesias #define MM_TOP_RSVD 0xa0000000U 162b89de436SEdgar E. Iglesias #define MM_TOP_RSVD_SIZE 0x4000000 163b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN 0xf9000000U 164b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN_SIZE 0x10000 165b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0 0xf9080000U 166b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0_SIZE 0x80000 167b89de436SEdgar E. Iglesias 168b89de436SEdgar E. Iglesias #define MM_UART0 0xff000000U 169b89de436SEdgar E. Iglesias #define MM_UART0_SIZE 0x10000 170b89de436SEdgar E. Iglesias #define MM_UART1 0xff010000U 171b89de436SEdgar E. Iglesias #define MM_UART1_SIZE 0x10000 172b89de436SEdgar E. Iglesias 173042d6b02SVikram Garhwal #define MM_CANFD0 0xff060000U 174042d6b02SVikram Garhwal #define MM_CANFD0_SIZE 0x10000 175042d6b02SVikram Garhwal #define MM_CANFD1 0xff070000U 176042d6b02SVikram Garhwal #define MM_CANFD1_SIZE 0x10000 177042d6b02SVikram Garhwal 178b89de436SEdgar E. Iglesias #define MM_GEM0 0xff0c0000U 179b89de436SEdgar E. Iglesias #define MM_GEM0_SIZE 0x10000 180b89de436SEdgar E. Iglesias #define MM_GEM1 0xff0d0000U 181b89de436SEdgar E. Iglesias #define MM_GEM1_SIZE 0x10000 182b89de436SEdgar E. Iglesias 1838a218651SEdgar E. Iglesias #define MM_ADMA_CH0 0xffa80000U 1848a218651SEdgar E. Iglesias #define MM_ADMA_CH0_SIZE 0x10000 1858a218651SEdgar E. Iglesias 186b89de436SEdgar E. Iglesias #define MM_OCM 0xfffc0000U 187b89de436SEdgar E. Iglesias #define MM_OCM_SIZE 0x40000 188b89de436SEdgar E. Iglesias 189a55b441bSEdgar E. Iglesias #define MM_XRAM 0xfe800000 190a55b441bSEdgar E. Iglesias #define MM_XRAMC 0xff8e0000 191a55b441bSEdgar E. Iglesias #define MM_XRAMC_SIZE 0x10000 192a55b441bSEdgar E. Iglesias 193144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS 0xFF9D0000 194144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS_SIZE 0x10000 195144677d4SVikram Garhwal 196144677d4SVikram Garhwal #define MM_USB_0 0xFE200000 197144677d4SVikram Garhwal #define MM_USB_0_SIZE 0x10000 198144677d4SVikram Garhwal 199b89de436SEdgar E. Iglesias #define MM_TOP_DDR 0x0 200b89de436SEdgar E. Iglesias #define MM_TOP_DDR_SIZE 0x80000000U 201b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2 0x800000000ULL 202b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2_SIZE 0x800000000ULL 203b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3 0xc000000000ULL 204b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3_SIZE 0x4000000000ULL 205b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4 0x10000000000ULL 206b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4_SIZE 0xb780000000ULL 207b89de436SEdgar E. Iglesias 208b89de436SEdgar E. Iglesias #define MM_PSM_START 0xffc80000U 209b89de436SEdgar E. Iglesias #define MM_PSM_END 0xffcf0000U 210b89de436SEdgar E. Iglesias 211b89de436SEdgar E. Iglesias #define MM_CRL 0xff5e0000U 212b89de436SEdgar E. Iglesias #define MM_CRL_SIZE 0x300000 213b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR 0xff130000U 214b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR_SIZE 0x10000 215b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS 0xff140000U 216b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS_SIZE 0x10000 217b89de436SEdgar E. Iglesias #define MM_FPD_CRF 0xfd1a0000U 218b89de436SEdgar E. Iglesias #define MM_FPD_CRF_SIZE 0x140000 2199a0fcb7fSTong Ho #define MM_FPD_FPD_APU 0xfd5c0000 2209a0fcb7fSTong Ho #define MM_FPD_FPD_APU_SIZE 0x100 221f0138990SEdgar E. Iglesias 222f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR 0xf1060000 223f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000 224f7c9aecbSFrancisco Iglesias 225868d9680SFrancisco Iglesias #define MM_PMC_OSPI 0xf1010000 226868d9680SFrancisco Iglesias #define MM_PMC_OSPI_SIZE 0x10000 227868d9680SFrancisco Iglesias 228868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DAC 0xc0000000 229868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DAC_SIZE 0x20000000 230868d9680SFrancisco Iglesias 231868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DMA_DST 0xf1011800 232868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DMA_SRC 0xf1011000 233868d9680SFrancisco Iglesias 234724c6e12SEdgar E. Iglesias #define MM_PMC_SD0 0xf1040000U 235724c6e12SEdgar E. Iglesias #define MM_PMC_SD0_SIZE 0x10000 236393185bcSTong Ho #define MM_PMC_BBRAM_CTRL 0xf11f0000 237393185bcSTong Ho #define MM_PMC_BBRAM_CTRL_SIZE 0x00050 2385f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL 0xf1240000 2395f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL_SIZE 0x00104 2405f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE 0xf1250000 2415f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE_SIZE 0x00C00 2425f4910ffSTong Ho 243f0138990SEdgar E. Iglesias #define MM_PMC_CRP 0xf1260000U 244f0138990SEdgar E. Iglesias #define MM_PMC_CRP_SIZE 0x10000 245eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC 0xf12a0000 246eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC_SIZE 0x10000 247b89de436SEdgar E. Iglesias #endif 248