1b89de436SEdgar E. Iglesias /* 2b89de436SEdgar E. Iglesias * Model of the Xilinx Versal 3b89de436SEdgar E. Iglesias * 4b89de436SEdgar E. Iglesias * Copyright (c) 2018 Xilinx Inc. 5b89de436SEdgar E. Iglesias * Written by Edgar E. Iglesias 6b89de436SEdgar E. Iglesias * 7b89de436SEdgar E. Iglesias * This program is free software; you can redistribute it and/or modify 8b89de436SEdgar E. Iglesias * it under the terms of the GNU General Public License version 2 or 9b89de436SEdgar E. Iglesias * (at your option) any later version. 10b89de436SEdgar E. Iglesias */ 11b89de436SEdgar E. Iglesias 12b89de436SEdgar E. Iglesias #ifndef XLNX_VERSAL_H 13b89de436SEdgar E. Iglesias #define XLNX_VERSAL_H 14b89de436SEdgar E. Iglesias 15b89de436SEdgar E. Iglesias #include "hw/sysbus.h" 1612ec8bd5SPeter Maydell #include "hw/arm/boot.h" 17a55b441bSEdgar E. Iglesias #include "hw/or-irq.h" 18724c6e12SEdgar E. Iglesias #include "hw/sd/sdhci.h" 19b89de436SEdgar E. Iglesias #include "hw/intc/arm_gicv3.h" 2088052ffdSEdgar E. Iglesias #include "hw/char/pl011.h" 21f4e3fa37SEdgar E. Iglesias #include "hw/dma/xlnx-zdma.h" 224bd9b59cSEdgar E. Iglesias #include "hw/net/cadence_gem.h" 23eb1221c5SEdgar E. Iglesias #include "hw/rtc/xlnx-zynqmp-rtc.h" 24db1015e9SEduardo Habkost #include "qom/object.h" 25144677d4SVikram Garhwal #include "hw/usb/xlnx-usb-subsystem.h" 26a55b441bSEdgar E. Iglesias #include "hw/misc/xlnx-versal-xramc.h" 27393185bcSTong Ho #include "hw/nvram/xlnx-bbram.h" 285f4910ffSTong Ho #include "hw/nvram/xlnx-versal-efuse.h" 29*868d9680SFrancisco Iglesias #include "hw/ssi/xlnx-versal-ospi.h" 30*868d9680SFrancisco Iglesias #include "hw/dma/xlnx_csu_dma.h" 31f7c9aecbSFrancisco Iglesias #include "hw/misc/xlnx-versal-pmc-iou-slcr.h" 32b89de436SEdgar E. Iglesias 33b89de436SEdgar E. Iglesias #define TYPE_XLNX_VERSAL "xlnx-versal" 348063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) 35b89de436SEdgar E. Iglesias 36b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_ACPUS 2 37b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_UARTS 2 38b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_GEMS 2 398a218651SEdgar E. Iglesias #define XLNX_VERSAL_NR_ADMAS 8 40724c6e12SEdgar E. Iglesias #define XLNX_VERSAL_NR_SDS 2 41a55b441bSEdgar E. Iglesias #define XLNX_VERSAL_NR_XRAM 4 42f6ef171dSEdgar E. Iglesias #define XLNX_VERSAL_NR_IRQS 192 43b89de436SEdgar E. Iglesias 44db1015e9SEduardo Habkost struct Versal { 45b89de436SEdgar E. Iglesias /*< private >*/ 46b89de436SEdgar E. Iglesias SysBusDevice parent_obj; 47b89de436SEdgar E. Iglesias 48b89de436SEdgar E. Iglesias /*< public >*/ 49b89de436SEdgar E. Iglesias struct { 50b89de436SEdgar E. Iglesias struct { 51b89de436SEdgar E. Iglesias MemoryRegion mr; 52ced18d5eSEdgar E. Iglesias ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; 53b89de436SEdgar E. Iglesias GICv3State gic; 54b89de436SEdgar E. Iglesias } apu; 55b89de436SEdgar E. Iglesias } fpd; 56b89de436SEdgar E. Iglesias 57b89de436SEdgar E. Iglesias MemoryRegion mr_ps; 58b89de436SEdgar E. Iglesias 59b89de436SEdgar E. Iglesias struct { 60b89de436SEdgar E. Iglesias /* 4 ranges to access DDR. */ 61b89de436SEdgar E. Iglesias MemoryRegion mr_ddr_ranges[4]; 62b89de436SEdgar E. Iglesias } noc; 63b89de436SEdgar E. Iglesias 64b89de436SEdgar E. Iglesias struct { 65b89de436SEdgar E. Iglesias MemoryRegion mr_ocm; 66b89de436SEdgar E. Iglesias 67b89de436SEdgar E. Iglesias struct { 6888052ffdSEdgar E. Iglesias PL011State uart[XLNX_VERSAL_NR_UARTS]; 694bd9b59cSEdgar E. Iglesias CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; 70f4e3fa37SEdgar E. Iglesias XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; 71144677d4SVikram Garhwal VersalUsb2 usb; 72b89de436SEdgar E. Iglesias } iou; 73a55b441bSEdgar E. Iglesias 74a55b441bSEdgar E. Iglesias struct { 75a55b441bSEdgar E. Iglesias qemu_or_irq irq_orgate; 76a55b441bSEdgar E. Iglesias XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM]; 77a55b441bSEdgar E. Iglesias } xram; 78b89de436SEdgar E. Iglesias } lpd; 79b89de436SEdgar E. Iglesias 80724c6e12SEdgar E. Iglesias /* The Platform Management Controller subsystem. */ 81724c6e12SEdgar E. Iglesias struct { 82724c6e12SEdgar E. Iglesias struct { 83724c6e12SEdgar E. Iglesias SDHCIState sd[XLNX_VERSAL_NR_SDS]; 84f7c9aecbSFrancisco Iglesias XlnxVersalPmcIouSlcr slcr; 85*868d9680SFrancisco Iglesias 86*868d9680SFrancisco Iglesias struct { 87*868d9680SFrancisco Iglesias XlnxVersalOspi ospi; 88*868d9680SFrancisco Iglesias XlnxCSUDMA dma_src; 89*868d9680SFrancisco Iglesias XlnxCSUDMA dma_dst; 90*868d9680SFrancisco Iglesias MemoryRegion linear_mr; 91*868d9680SFrancisco Iglesias qemu_or_irq irq_orgate; 92*868d9680SFrancisco Iglesias } ospi; 93724c6e12SEdgar E. Iglesias } iou; 94eb1221c5SEdgar E. Iglesias 95eb1221c5SEdgar E. Iglesias XlnxZynqMPRTC rtc; 96393185bcSTong Ho XlnxBBRam bbram; 975f4910ffSTong Ho XlnxEFuse efuse; 985f4910ffSTong Ho XlnxVersalEFuseCtrl efuse_ctrl; 995f4910ffSTong Ho XlnxVersalEFuseCache efuse_cache; 1009a6d4918SFrancisco Iglesias 1019a6d4918SFrancisco Iglesias qemu_or_irq apb_irq_orgate; 102724c6e12SEdgar E. Iglesias } pmc; 103724c6e12SEdgar E. Iglesias 104b89de436SEdgar E. Iglesias struct { 105b89de436SEdgar E. Iglesias MemoryRegion *mr_ddr; 106b89de436SEdgar E. Iglesias uint32_t psci_conduit; 107b89de436SEdgar E. Iglesias } cfg; 108db1015e9SEduardo Habkost }; 109b89de436SEdgar E. Iglesias 110b89de436SEdgar E. Iglesias /* Memory-map and IRQ definitions. Copied a subset from 111b89de436SEdgar E. Iglesias * auto-generated files. */ 112b89de436SEdgar E. Iglesias 113b89de436SEdgar E. Iglesias #define VERSAL_GIC_MAINT_IRQ 9 114b89de436SEdgar E. Iglesias #define VERSAL_TIMER_VIRT_IRQ 11 115b89de436SEdgar E. Iglesias #define VERSAL_TIMER_S_EL1_IRQ 13 116b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL1_IRQ 14 117b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL2_IRQ 10 118b89de436SEdgar E. Iglesias 119b89de436SEdgar E. Iglesias #define VERSAL_UART0_IRQ_0 18 120b89de436SEdgar E. Iglesias #define VERSAL_UART1_IRQ_0 19 121144677d4SVikram Garhwal #define VERSAL_USB0_IRQ_0 22 122b89de436SEdgar E. Iglesias #define VERSAL_GEM0_IRQ_0 56 123b89de436SEdgar E. Iglesias #define VERSAL_GEM0_WAKE_IRQ_0 57 124b89de436SEdgar E. Iglesias #define VERSAL_GEM1_IRQ_0 58 125b89de436SEdgar E. Iglesias #define VERSAL_GEM1_WAKE_IRQ_0 59 1268a218651SEdgar E. Iglesias #define VERSAL_ADMA_IRQ_0 60 127a55b441bSEdgar E. Iglesias #define VERSAL_XRAM_IRQ_0 79 1289a6d4918SFrancisco Iglesias #define VERSAL_PMC_APB_IRQ 121 129*868d9680SFrancisco Iglesias #define VERSAL_OSPI_IRQ 124 130724c6e12SEdgar E. Iglesias #define VERSAL_SD0_IRQ_0 126 1315f4910ffSTong Ho #define VERSAL_EFUSE_IRQ 139 132eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_ALARM_IRQ 142 133eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_SECONDS_IRQ 143 134b89de436SEdgar E. Iglesias 135fb179055SEdgar E. Iglesias /* Architecturally reserved IRQs suitable for virtualization. */ 136fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_FIRST 111 137fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_LAST 118 138b89de436SEdgar E. Iglesias 139b89de436SEdgar E. Iglesias #define MM_TOP_RSVD 0xa0000000U 140b89de436SEdgar E. Iglesias #define MM_TOP_RSVD_SIZE 0x4000000 141b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN 0xf9000000U 142b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN_SIZE 0x10000 143b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0 0xf9080000U 144b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0_SIZE 0x80000 145b89de436SEdgar E. Iglesias 146b89de436SEdgar E. Iglesias #define MM_UART0 0xff000000U 147b89de436SEdgar E. Iglesias #define MM_UART0_SIZE 0x10000 148b89de436SEdgar E. Iglesias #define MM_UART1 0xff010000U 149b89de436SEdgar E. Iglesias #define MM_UART1_SIZE 0x10000 150b89de436SEdgar E. Iglesias 151b89de436SEdgar E. Iglesias #define MM_GEM0 0xff0c0000U 152b89de436SEdgar E. Iglesias #define MM_GEM0_SIZE 0x10000 153b89de436SEdgar E. Iglesias #define MM_GEM1 0xff0d0000U 154b89de436SEdgar E. Iglesias #define MM_GEM1_SIZE 0x10000 155b89de436SEdgar E. Iglesias 1568a218651SEdgar E. Iglesias #define MM_ADMA_CH0 0xffa80000U 1578a218651SEdgar E. Iglesias #define MM_ADMA_CH0_SIZE 0x10000 1588a218651SEdgar E. Iglesias 159b89de436SEdgar E. Iglesias #define MM_OCM 0xfffc0000U 160b89de436SEdgar E. Iglesias #define MM_OCM_SIZE 0x40000 161b89de436SEdgar E. Iglesias 162a55b441bSEdgar E. Iglesias #define MM_XRAM 0xfe800000 163a55b441bSEdgar E. Iglesias #define MM_XRAMC 0xff8e0000 164a55b441bSEdgar E. Iglesias #define MM_XRAMC_SIZE 0x10000 165a55b441bSEdgar E. Iglesias 166144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS 0xFF9D0000 167144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS_SIZE 0x10000 168144677d4SVikram Garhwal 169144677d4SVikram Garhwal #define MM_USB_0 0xFE200000 170144677d4SVikram Garhwal #define MM_USB_0_SIZE 0x10000 171144677d4SVikram Garhwal 172b89de436SEdgar E. Iglesias #define MM_TOP_DDR 0x0 173b89de436SEdgar E. Iglesias #define MM_TOP_DDR_SIZE 0x80000000U 174b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2 0x800000000ULL 175b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2_SIZE 0x800000000ULL 176b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3 0xc000000000ULL 177b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3_SIZE 0x4000000000ULL 178b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4 0x10000000000ULL 179b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4_SIZE 0xb780000000ULL 180b89de436SEdgar E. Iglesias 181b89de436SEdgar E. Iglesias #define MM_PSM_START 0xffc80000U 182b89de436SEdgar E. Iglesias #define MM_PSM_END 0xffcf0000U 183b89de436SEdgar E. Iglesias 184b89de436SEdgar E. Iglesias #define MM_CRL 0xff5e0000U 185b89de436SEdgar E. Iglesias #define MM_CRL_SIZE 0x300000 186b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR 0xff130000U 187b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR_SIZE 0x10000 188b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS 0xff140000U 189b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS_SIZE 0x10000 190b89de436SEdgar E. Iglesias #define MM_FPD_CRF 0xfd1a0000U 191b89de436SEdgar E. Iglesias #define MM_FPD_CRF_SIZE 0x140000 1929a0fcb7fSTong Ho #define MM_FPD_FPD_APU 0xfd5c0000 1939a0fcb7fSTong Ho #define MM_FPD_FPD_APU_SIZE 0x100 194f0138990SEdgar E. Iglesias 195f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR 0xf1060000 196f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000 197f7c9aecbSFrancisco Iglesias 198*868d9680SFrancisco Iglesias #define MM_PMC_OSPI 0xf1010000 199*868d9680SFrancisco Iglesias #define MM_PMC_OSPI_SIZE 0x10000 200*868d9680SFrancisco Iglesias 201*868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DAC 0xc0000000 202*868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DAC_SIZE 0x20000000 203*868d9680SFrancisco Iglesias 204*868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DMA_DST 0xf1011800 205*868d9680SFrancisco Iglesias #define MM_PMC_OSPI_DMA_SRC 0xf1011000 206*868d9680SFrancisco Iglesias 207724c6e12SEdgar E. Iglesias #define MM_PMC_SD0 0xf1040000U 208724c6e12SEdgar E. Iglesias #define MM_PMC_SD0_SIZE 0x10000 209393185bcSTong Ho #define MM_PMC_BBRAM_CTRL 0xf11f0000 210393185bcSTong Ho #define MM_PMC_BBRAM_CTRL_SIZE 0x00050 2115f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL 0xf1240000 2125f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL_SIZE 0x00104 2135f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE 0xf1250000 2145f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE_SIZE 0x00C00 2155f4910ffSTong Ho 216f0138990SEdgar E. Iglesias #define MM_PMC_CRP 0xf1260000U 217f0138990SEdgar E. Iglesias #define MM_PMC_CRP_SIZE 0x10000 218eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC 0xf12a0000 219eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC_SIZE 0x10000 220b89de436SEdgar E. Iglesias #endif 221