1b89de436SEdgar E. Iglesias /* 2b89de436SEdgar E. Iglesias * Model of the Xilinx Versal 3b89de436SEdgar E. Iglesias * 4b89de436SEdgar E. Iglesias * Copyright (c) 2018 Xilinx Inc. 5b89de436SEdgar E. Iglesias * Written by Edgar E. Iglesias 6b89de436SEdgar E. Iglesias * 7b89de436SEdgar E. Iglesias * This program is free software; you can redistribute it and/or modify 8b89de436SEdgar E. Iglesias * it under the terms of the GNU General Public License version 2 or 9b89de436SEdgar E. Iglesias * (at your option) any later version. 10b89de436SEdgar E. Iglesias */ 11b89de436SEdgar E. Iglesias 12b89de436SEdgar E. Iglesias #ifndef XLNX_VERSAL_H 13b89de436SEdgar E. Iglesias #define XLNX_VERSAL_H 14b89de436SEdgar E. Iglesias 15b89de436SEdgar E. Iglesias #include "hw/sysbus.h" 1612ec8bd5SPeter Maydell #include "hw/arm/boot.h" 17a55b441bSEdgar E. Iglesias #include "hw/or-irq.h" 18724c6e12SEdgar E. Iglesias #include "hw/sd/sdhci.h" 19b89de436SEdgar E. Iglesias #include "hw/intc/arm_gicv3.h" 2088052ffdSEdgar E. Iglesias #include "hw/char/pl011.h" 21f4e3fa37SEdgar E. Iglesias #include "hw/dma/xlnx-zdma.h" 224bd9b59cSEdgar E. Iglesias #include "hw/net/cadence_gem.h" 23eb1221c5SEdgar E. Iglesias #include "hw/rtc/xlnx-zynqmp-rtc.h" 24db1015e9SEduardo Habkost #include "qom/object.h" 25144677d4SVikram Garhwal #include "hw/usb/xlnx-usb-subsystem.h" 26a55b441bSEdgar E. Iglesias #include "hw/misc/xlnx-versal-xramc.h" 27393185bcSTong Ho #include "hw/nvram/xlnx-bbram.h" 285f4910ffSTong Ho #include "hw/nvram/xlnx-versal-efuse.h" 29*f7c9aecbSFrancisco Iglesias #include "hw/misc/xlnx-versal-pmc-iou-slcr.h" 30b89de436SEdgar E. Iglesias 31b89de436SEdgar E. Iglesias #define TYPE_XLNX_VERSAL "xlnx-versal" 328063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) 33b89de436SEdgar E. Iglesias 34b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_ACPUS 2 35b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_UARTS 2 36b89de436SEdgar E. Iglesias #define XLNX_VERSAL_NR_GEMS 2 378a218651SEdgar E. Iglesias #define XLNX_VERSAL_NR_ADMAS 8 38724c6e12SEdgar E. Iglesias #define XLNX_VERSAL_NR_SDS 2 39a55b441bSEdgar E. Iglesias #define XLNX_VERSAL_NR_XRAM 4 40f6ef171dSEdgar E. Iglesias #define XLNX_VERSAL_NR_IRQS 192 41b89de436SEdgar E. Iglesias 42db1015e9SEduardo Habkost struct Versal { 43b89de436SEdgar E. Iglesias /*< private >*/ 44b89de436SEdgar E. Iglesias SysBusDevice parent_obj; 45b89de436SEdgar E. Iglesias 46b89de436SEdgar E. Iglesias /*< public >*/ 47b89de436SEdgar E. Iglesias struct { 48b89de436SEdgar E. Iglesias struct { 49b89de436SEdgar E. Iglesias MemoryRegion mr; 50ced18d5eSEdgar E. Iglesias ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; 51b89de436SEdgar E. Iglesias GICv3State gic; 52b89de436SEdgar E. Iglesias } apu; 53b89de436SEdgar E. Iglesias } fpd; 54b89de436SEdgar E. Iglesias 55b89de436SEdgar E. Iglesias MemoryRegion mr_ps; 56b89de436SEdgar E. Iglesias 57b89de436SEdgar E. Iglesias struct { 58b89de436SEdgar E. Iglesias /* 4 ranges to access DDR. */ 59b89de436SEdgar E. Iglesias MemoryRegion mr_ddr_ranges[4]; 60b89de436SEdgar E. Iglesias } noc; 61b89de436SEdgar E. Iglesias 62b89de436SEdgar E. Iglesias struct { 63b89de436SEdgar E. Iglesias MemoryRegion mr_ocm; 64b89de436SEdgar E. Iglesias 65b89de436SEdgar E. Iglesias struct { 6688052ffdSEdgar E. Iglesias PL011State uart[XLNX_VERSAL_NR_UARTS]; 674bd9b59cSEdgar E. Iglesias CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; 68f4e3fa37SEdgar E. Iglesias XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; 69144677d4SVikram Garhwal VersalUsb2 usb; 70b89de436SEdgar E. Iglesias } iou; 71a55b441bSEdgar E. Iglesias 72a55b441bSEdgar E. Iglesias struct { 73a55b441bSEdgar E. Iglesias qemu_or_irq irq_orgate; 74a55b441bSEdgar E. Iglesias XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM]; 75a55b441bSEdgar E. Iglesias } xram; 76b89de436SEdgar E. Iglesias } lpd; 77b89de436SEdgar E. Iglesias 78724c6e12SEdgar E. Iglesias /* The Platform Management Controller subsystem. */ 79724c6e12SEdgar E. Iglesias struct { 80724c6e12SEdgar E. Iglesias struct { 81724c6e12SEdgar E. Iglesias SDHCIState sd[XLNX_VERSAL_NR_SDS]; 82*f7c9aecbSFrancisco Iglesias XlnxVersalPmcIouSlcr slcr; 83724c6e12SEdgar E. Iglesias } iou; 84eb1221c5SEdgar E. Iglesias 85eb1221c5SEdgar E. Iglesias XlnxZynqMPRTC rtc; 86393185bcSTong Ho XlnxBBRam bbram; 875f4910ffSTong Ho XlnxEFuse efuse; 885f4910ffSTong Ho XlnxVersalEFuseCtrl efuse_ctrl; 895f4910ffSTong Ho XlnxVersalEFuseCache efuse_cache; 909a6d4918SFrancisco Iglesias 919a6d4918SFrancisco Iglesias qemu_or_irq apb_irq_orgate; 92724c6e12SEdgar E. Iglesias } pmc; 93724c6e12SEdgar E. Iglesias 94b89de436SEdgar E. Iglesias struct { 95b89de436SEdgar E. Iglesias MemoryRegion *mr_ddr; 96b89de436SEdgar E. Iglesias uint32_t psci_conduit; 97b89de436SEdgar E. Iglesias } cfg; 98db1015e9SEduardo Habkost }; 99b89de436SEdgar E. Iglesias 100b89de436SEdgar E. Iglesias /* Memory-map and IRQ definitions. Copied a subset from 101b89de436SEdgar E. Iglesias * auto-generated files. */ 102b89de436SEdgar E. Iglesias 103b89de436SEdgar E. Iglesias #define VERSAL_GIC_MAINT_IRQ 9 104b89de436SEdgar E. Iglesias #define VERSAL_TIMER_VIRT_IRQ 11 105b89de436SEdgar E. Iglesias #define VERSAL_TIMER_S_EL1_IRQ 13 106b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL1_IRQ 14 107b89de436SEdgar E. Iglesias #define VERSAL_TIMER_NS_EL2_IRQ 10 108b89de436SEdgar E. Iglesias 109b89de436SEdgar E. Iglesias #define VERSAL_UART0_IRQ_0 18 110b89de436SEdgar E. Iglesias #define VERSAL_UART1_IRQ_0 19 111144677d4SVikram Garhwal #define VERSAL_USB0_IRQ_0 22 112b89de436SEdgar E. Iglesias #define VERSAL_GEM0_IRQ_0 56 113b89de436SEdgar E. Iglesias #define VERSAL_GEM0_WAKE_IRQ_0 57 114b89de436SEdgar E. Iglesias #define VERSAL_GEM1_IRQ_0 58 115b89de436SEdgar E. Iglesias #define VERSAL_GEM1_WAKE_IRQ_0 59 1168a218651SEdgar E. Iglesias #define VERSAL_ADMA_IRQ_0 60 117a55b441bSEdgar E. Iglesias #define VERSAL_XRAM_IRQ_0 79 1189a6d4918SFrancisco Iglesias #define VERSAL_PMC_APB_IRQ 121 119724c6e12SEdgar E. Iglesias #define VERSAL_SD0_IRQ_0 126 1205f4910ffSTong Ho #define VERSAL_EFUSE_IRQ 139 121eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_ALARM_IRQ 142 122eb1221c5SEdgar E. Iglesias #define VERSAL_RTC_SECONDS_IRQ 143 123b89de436SEdgar E. Iglesias 124fb179055SEdgar E. Iglesias /* Architecturally reserved IRQs suitable for virtualization. */ 125fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_FIRST 111 126fb179055SEdgar E. Iglesias #define VERSAL_RSVD_IRQ_LAST 118 127b89de436SEdgar E. Iglesias 128b89de436SEdgar E. Iglesias #define MM_TOP_RSVD 0xa0000000U 129b89de436SEdgar E. Iglesias #define MM_TOP_RSVD_SIZE 0x4000000 130b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN 0xf9000000U 131b89de436SEdgar E. Iglesias #define MM_GIC_APU_DIST_MAIN_SIZE 0x10000 132b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0 0xf9080000U 133b89de436SEdgar E. Iglesias #define MM_GIC_APU_REDIST_0_SIZE 0x80000 134b89de436SEdgar E. Iglesias 135b89de436SEdgar E. Iglesias #define MM_UART0 0xff000000U 136b89de436SEdgar E. Iglesias #define MM_UART0_SIZE 0x10000 137b89de436SEdgar E. Iglesias #define MM_UART1 0xff010000U 138b89de436SEdgar E. Iglesias #define MM_UART1_SIZE 0x10000 139b89de436SEdgar E. Iglesias 140b89de436SEdgar E. Iglesias #define MM_GEM0 0xff0c0000U 141b89de436SEdgar E. Iglesias #define MM_GEM0_SIZE 0x10000 142b89de436SEdgar E. Iglesias #define MM_GEM1 0xff0d0000U 143b89de436SEdgar E. Iglesias #define MM_GEM1_SIZE 0x10000 144b89de436SEdgar E. Iglesias 1458a218651SEdgar E. Iglesias #define MM_ADMA_CH0 0xffa80000U 1468a218651SEdgar E. Iglesias #define MM_ADMA_CH0_SIZE 0x10000 1478a218651SEdgar E. Iglesias 148b89de436SEdgar E. Iglesias #define MM_OCM 0xfffc0000U 149b89de436SEdgar E. Iglesias #define MM_OCM_SIZE 0x40000 150b89de436SEdgar E. Iglesias 151a55b441bSEdgar E. Iglesias #define MM_XRAM 0xfe800000 152a55b441bSEdgar E. Iglesias #define MM_XRAMC 0xff8e0000 153a55b441bSEdgar E. Iglesias #define MM_XRAMC_SIZE 0x10000 154a55b441bSEdgar E. Iglesias 155144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS 0xFF9D0000 156144677d4SVikram Garhwal #define MM_USB2_CTRL_REGS_SIZE 0x10000 157144677d4SVikram Garhwal 158144677d4SVikram Garhwal #define MM_USB_0 0xFE200000 159144677d4SVikram Garhwal #define MM_USB_0_SIZE 0x10000 160144677d4SVikram Garhwal 161b89de436SEdgar E. Iglesias #define MM_TOP_DDR 0x0 162b89de436SEdgar E. Iglesias #define MM_TOP_DDR_SIZE 0x80000000U 163b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2 0x800000000ULL 164b89de436SEdgar E. Iglesias #define MM_TOP_DDR_2_SIZE 0x800000000ULL 165b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3 0xc000000000ULL 166b89de436SEdgar E. Iglesias #define MM_TOP_DDR_3_SIZE 0x4000000000ULL 167b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4 0x10000000000ULL 168b89de436SEdgar E. Iglesias #define MM_TOP_DDR_4_SIZE 0xb780000000ULL 169b89de436SEdgar E. Iglesias 170b89de436SEdgar E. Iglesias #define MM_PSM_START 0xffc80000U 171b89de436SEdgar E. Iglesias #define MM_PSM_END 0xffcf0000U 172b89de436SEdgar E. Iglesias 173b89de436SEdgar E. Iglesias #define MM_CRL 0xff5e0000U 174b89de436SEdgar E. Iglesias #define MM_CRL_SIZE 0x300000 175b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR 0xff130000U 176b89de436SEdgar E. Iglesias #define MM_IOU_SCNTR_SIZE 0x10000 177b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS 0xff140000U 178b89de436SEdgar E. Iglesias #define MM_IOU_SCNTRS_SIZE 0x10000 179b89de436SEdgar E. Iglesias #define MM_FPD_CRF 0xfd1a0000U 180b89de436SEdgar E. Iglesias #define MM_FPD_CRF_SIZE 0x140000 1819a0fcb7fSTong Ho #define MM_FPD_FPD_APU 0xfd5c0000 1829a0fcb7fSTong Ho #define MM_FPD_FPD_APU_SIZE 0x100 183f0138990SEdgar E. Iglesias 184*f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR 0xf1060000 185*f7c9aecbSFrancisco Iglesias #define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000 186*f7c9aecbSFrancisco Iglesias 187724c6e12SEdgar E. Iglesias #define MM_PMC_SD0 0xf1040000U 188724c6e12SEdgar E. Iglesias #define MM_PMC_SD0_SIZE 0x10000 189393185bcSTong Ho #define MM_PMC_BBRAM_CTRL 0xf11f0000 190393185bcSTong Ho #define MM_PMC_BBRAM_CTRL_SIZE 0x00050 1915f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL 0xf1240000 1925f4910ffSTong Ho #define MM_PMC_EFUSE_CTRL_SIZE 0x00104 1935f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE 0xf1250000 1945f4910ffSTong Ho #define MM_PMC_EFUSE_CACHE_SIZE 0x00C00 1955f4910ffSTong Ho 196f0138990SEdgar E. Iglesias #define MM_PMC_CRP 0xf1260000U 197f0138990SEdgar E. Iglesias #define MM_PMC_CRP_SIZE 0x10000 198eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC 0xf12a0000 199eb1221c5SEdgar E. Iglesias #define MM_PMC_RTC_SIZE 0x10000 200b89de436SEdgar E. Iglesias #endif 201