xref: /qemu/include/hw/core/cpu.h (revision 6b40847a)
1 /*
2  * QEMU CPU model
3  *
4  * Copyright (c) 2012 SUSE LINUX Products GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see
18  * <http://www.gnu.org/licenses/gpl-2.0.html>
19  */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22 
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin-event.h"
34 #include "qom/object.h"
35 
36 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
37                                      void *opaque);
38 
39 /**
40  * SECTION:cpu
41  * @section_id: QEMU-cpu
42  * @title: CPU Class
43  * @short_description: Base class for all CPUs
44  */
45 
46 #define TYPE_CPU "cpu"
47 
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
50  * an unchecked cast.
51  */
52 #define CPU(obj) ((CPUState *)(obj))
53 
54 /*
55  * The class checkers bring in CPU_GET_CLASS() which is potentially
56  * expensive given the eventual call to
57  * object_class_dynamic_cast_assert(). Because of this the CPUState
58  * has a cached value for the class in cs->cc which is set up in
59  * cpu_exec_realizefn() for use in hot code paths.
60  */
61 typedef struct CPUClass CPUClass;
62 DECLARE_CLASS_CHECKERS(CPUClass, CPU,
63                        TYPE_CPU)
64 
65 /**
66  * OBJECT_DECLARE_CPU_TYPE:
67  * @CpuInstanceType: instance struct name
68  * @CpuClassType: class struct name
69  * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
70  *
71  * This macro is typically used in "cpu-qom.h" header file, and will:
72  *
73  *   - create the typedefs for the CPU object and class structs
74  *   - register the type for use with g_autoptr
75  *   - provide three standard type cast functions
76  *
77  * The object struct and class struct need to be declared manually.
78  */
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80     typedef struct ArchCPU CpuInstanceType; \
81     OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
82 
83 typedef enum MMUAccessType {
84     MMU_DATA_LOAD  = 0,
85     MMU_DATA_STORE = 1,
86     MMU_INST_FETCH = 2
87 } MMUAccessType;
88 
89 typedef struct CPUWatchpoint CPUWatchpoint;
90 
91 /* see tcg-cpu-ops.h */
92 struct TCGCPUOps;
93 
94 /* see accel-cpu.h */
95 struct AccelCPUClass;
96 
97 /* see sysemu-cpu-ops.h */
98 struct SysemuCPUOps;
99 
100 /**
101  * CPUClass:
102  * @class_by_name: Callback to map -cpu command line model name to an
103  * instantiatable CPU type.
104  * @parse_features: Callback to parse command line arguments.
105  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
106  * @has_work: Callback for checking if there is work to do.
107  * @memory_rw_debug: Callback for GDB memory access.
108  * @dump_state: Callback for dumping state.
109  * @query_cpu_fast:
110  *       Fill in target specific information for the "query-cpus-fast"
111  *       QAPI call.
112  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
113  * @set_pc: Callback for setting the Program Counter register. This
114  *       should have the semantics used by the target architecture when
115  *       setting the PC from a source such as an ELF file entry point;
116  *       for example on Arm it will also set the Thumb mode bit based
117  *       on the least significant bit of the new PC value.
118  *       If the target behaviour here is anything other than "set
119  *       the PC register to the value passed in" then the target must
120  *       also implement the synchronize_from_tb hook.
121  * @get_pc: Callback for getting the Program Counter register.
122  *       As above, with the semantics of the target architecture.
123  * @gdb_read_register: Callback for letting GDB read a register.
124  * @gdb_write_register: Callback for letting GDB write a register.
125  * @gdb_adjust_breakpoint: Callback for adjusting the address of a
126  *       breakpoint.  Used by AVR to handle a gdb mis-feature with
127  *       its Harvard architecture split code and data.
128  * @gdb_num_core_regs: Number of core registers accessible to GDB.
129  * @gdb_core_xml_file: File name for core registers GDB XML description.
130  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
131  *           before the insn which triggers a watchpoint rather than after it.
132  * @gdb_arch_name: Optional callback that returns the architecture name known
133  * to GDB. The caller must free the returned string with g_free.
134  * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
135  *   gdb stub. Returns a pointer to the XML contents for the specified XML file
136  *   or NULL if the CPU doesn't have a dynamically generated content for it.
137  * @disas_set_info: Setup architecture specific components of disassembly info
138  * @adjust_watchpoint_address: Perform a target-specific adjustment to an
139  * address before attempting to match it against watchpoints.
140  * @deprecation_note: If this CPUClass is deprecated, this field provides
141  *                    related information.
142  *
143  * Represents a CPU family or model.
144  */
145 struct CPUClass {
146     /*< private >*/
147     DeviceClass parent_class;
148     /*< public >*/
149 
150     ObjectClass *(*class_by_name)(const char *cpu_model);
151     void (*parse_features)(const char *typename, char *str, Error **errp);
152 
153     bool (*has_work)(CPUState *cpu);
154     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
155                            uint8_t *buf, int len, bool is_write);
156     void (*dump_state)(CPUState *cpu, FILE *, int flags);
157     void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value);
158     int64_t (*get_arch_id)(CPUState *cpu);
159     void (*set_pc)(CPUState *cpu, vaddr value);
160     vaddr (*get_pc)(CPUState *cpu);
161     int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
162     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
163     vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
164 
165     const char *gdb_core_xml_file;
166     gchar * (*gdb_arch_name)(CPUState *cpu);
167     const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
168 
169     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
170 
171     const char *deprecation_note;
172     struct AccelCPUClass *accel_cpu;
173 
174     /* when system emulation is not available, this pointer is NULL */
175     const struct SysemuCPUOps *sysemu_ops;
176 
177     /* when TCG is not available, this pointer is NULL */
178     const struct TCGCPUOps *tcg_ops;
179 
180     /*
181      * if not NULL, this is called in order for the CPUClass to initialize
182      * class data that depends on the accelerator, see accel/accel-common.c.
183      */
184     void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
185 
186     /*
187      * Keep non-pointer data at the end to minimize holes.
188      */
189     int reset_dump_flags;
190     int gdb_num_core_regs;
191     bool gdb_stop_before_watchpoint;
192 };
193 
194 /*
195  * Low 16 bits: number of cycles left, used only in icount mode.
196  * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
197  * for this CPU and return to its top level loop (even in non-icount mode).
198  * This allows a single read-compare-cbranch-write sequence to test
199  * for both decrementer underflow and exceptions.
200  */
201 typedef union IcountDecr {
202     uint32_t u32;
203     struct {
204 #if HOST_BIG_ENDIAN
205         uint16_t high;
206         uint16_t low;
207 #else
208         uint16_t low;
209         uint16_t high;
210 #endif
211     } u16;
212 } IcountDecr;
213 
214 typedef struct CPUBreakpoint {
215     vaddr pc;
216     int flags; /* BP_* */
217     QTAILQ_ENTRY(CPUBreakpoint) entry;
218 } CPUBreakpoint;
219 
220 struct CPUWatchpoint {
221     vaddr vaddr;
222     vaddr len;
223     vaddr hitaddr;
224     MemTxAttrs hitattrs;
225     int flags; /* BP_* */
226     QTAILQ_ENTRY(CPUWatchpoint) entry;
227 };
228 
229 #ifdef CONFIG_PLUGIN
230 /*
231  * For plugins we sometime need to save the resolved iotlb data before
232  * the memory regions get moved around  by io_writex.
233  */
234 typedef struct SavedIOTLB {
235     MemoryRegionSection *section;
236     hwaddr mr_offset;
237 } SavedIOTLB;
238 #endif
239 
240 struct KVMState;
241 struct kvm_run;
242 
243 struct hax_vcpu_state;
244 struct hvf_vcpu_state;
245 
246 /* work queue */
247 
248 /* The union type allows passing of 64 bit target pointers on 32 bit
249  * hosts in a single parameter
250  */
251 typedef union {
252     int           host_int;
253     unsigned long host_ulong;
254     void         *host_ptr;
255     vaddr         target_ptr;
256 } run_on_cpu_data;
257 
258 #define RUN_ON_CPU_HOST_PTR(p)    ((run_on_cpu_data){.host_ptr = (p)})
259 #define RUN_ON_CPU_HOST_INT(i)    ((run_on_cpu_data){.host_int = (i)})
260 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
261 #define RUN_ON_CPU_TARGET_PTR(v)  ((run_on_cpu_data){.target_ptr = (v)})
262 #define RUN_ON_CPU_NULL           RUN_ON_CPU_HOST_PTR(NULL)
263 
264 typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
265 
266 struct qemu_work_item;
267 
268 #define CPU_UNSET_NUMA_NODE_ID -1
269 
270 /**
271  * CPUState:
272  * @cpu_index: CPU index (informative).
273  * @cluster_index: Identifies which cluster this CPU is in.
274  *   For boards which don't define clusters or for "loose" CPUs not assigned
275  *   to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
276  *   be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
277  *   QOM parent.
278  *   Under TCG this value is propagated to @tcg_cflags.
279  *   See TranslationBlock::TCG CF_CLUSTER_MASK.
280  * @tcg_cflags: Pre-computed cflags for this cpu.
281  * @nr_cores: Number of cores within this CPU package.
282  * @nr_threads: Number of threads within this CPU.
283  * @running: #true if CPU is currently running (lockless).
284  * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
285  * valid under cpu_list_lock.
286  * @created: Indicates whether the CPU thread has been successfully created.
287  * @interrupt_request: Indicates a pending interrupt request.
288  * @halted: Nonzero if the CPU is in suspended state.
289  * @stop: Indicates a pending stop request.
290  * @stopped: Indicates the CPU has been artificially stopped.
291  * @unplug: Indicates a pending CPU unplug request.
292  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
293  * @singlestep_enabled: Flags for single-stepping.
294  * @icount_extra: Instructions until next timer event.
295  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
296  * requires that IO only be performed on the last instruction of a TB
297  * so that interrupts take effect immediately.
298  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
299  *            AddressSpaces this CPU has)
300  * @num_ases: number of CPUAddressSpaces in @cpu_ases
301  * @as: Pointer to the first AddressSpace, for the convenience of targets which
302  *      only have a single AddressSpace
303  * @env_ptr: Pointer to subclass-specific CPUArchState field.
304  * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
305  * @gdb_regs: Additional GDB registers.
306  * @gdb_num_regs: Number of total registers accessible to GDB.
307  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
308  * @next_cpu: Next CPU sharing TB cache.
309  * @opaque: User data.
310  * @mem_io_pc: Host Program Counter at which the memory was accessed.
311  * @kvm_fd: vCPU file descriptor for KVM.
312  * @work_mutex: Lock to prevent multiple access to @work_list.
313  * @work_list: List of pending asynchronous work.
314  * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
315  *                        to @trace_dstate).
316  * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
317  * @plugin_mask: Plugin event bitmap. Modified only via async work.
318  * @ignore_memory_transaction_failures: Cached copy of the MachineState
319  *    flag of the same name: allows the board to suppress calling of the
320  *    CPU do_transaction_failed hook function.
321  * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
322  *    ring is enabled.
323  * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
324  *    dirty ring structure.
325  *
326  * State of one CPU core or thread.
327  */
328 struct CPUState {
329     /*< private >*/
330     DeviceState parent_obj;
331     /* cache to avoid expensive CPU_GET_CLASS */
332     CPUClass *cc;
333     /*< public >*/
334 
335     int nr_cores;
336     int nr_threads;
337 
338     struct QemuThread *thread;
339 #ifdef _WIN32
340     HANDLE hThread;
341     QemuSemaphore sem;
342 #endif
343     int thread_id;
344     bool running, has_waiter;
345     struct QemuCond *halt_cond;
346     bool thread_kicked;
347     bool created;
348     bool stop;
349     bool stopped;
350 
351     /* Should CPU start in powered-off state? */
352     bool start_powered_off;
353 
354     bool unplug;
355     bool crash_occurred;
356     bool exit_request;
357     int exclusive_context_count;
358     uint32_t cflags_next_tb;
359     /* updates protected by BQL */
360     uint32_t interrupt_request;
361     int singlestep_enabled;
362     int64_t icount_budget;
363     int64_t icount_extra;
364     uint64_t random_seed;
365     sigjmp_buf jmp_env;
366 
367     QemuMutex work_mutex;
368     QSIMPLEQ_HEAD(, qemu_work_item) work_list;
369 
370     CPUAddressSpace *cpu_ases;
371     int num_ases;
372     AddressSpace *as;
373     MemoryRegion *memory;
374 
375     CPUArchState *env_ptr;
376     IcountDecr *icount_decr_ptr;
377 
378     CPUJumpCache *tb_jmp_cache;
379 
380     struct GDBRegisterState *gdb_regs;
381     int gdb_num_regs;
382     int gdb_num_g_regs;
383     QTAILQ_ENTRY(CPUState) node;
384 
385     /* ice debug support */
386     QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
387 
388     QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
389     CPUWatchpoint *watchpoint_hit;
390 
391     void *opaque;
392 
393     /* In order to avoid passing too many arguments to the MMIO helpers,
394      * we store some rarely used information in the CPU context.
395      */
396     uintptr_t mem_io_pc;
397 
398     /* Only used in KVM */
399     int kvm_fd;
400     struct KVMState *kvm_state;
401     struct kvm_run *kvm_run;
402     struct kvm_dirty_gfn *kvm_dirty_gfns;
403     uint32_t kvm_fetch_index;
404     uint64_t dirty_pages;
405 
406     /* Use by accel-block: CPU is executing an ioctl() */
407     QemuLockCnt in_ioctl_lock;
408 
409     DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
410 
411 #ifdef CONFIG_PLUGIN
412     GArray *plugin_mem_cbs;
413     /* saved iotlb data from io_writex */
414     SavedIOTLB saved_iotlb;
415 #endif
416 
417     /* TODO Move common fields from CPUArchState here. */
418     int cpu_index;
419     int cluster_index;
420     uint32_t tcg_cflags;
421     uint32_t halted;
422     uint32_t can_do_io;
423     int32_t exception_index;
424 
425     /* shared by kvm, hax and hvf */
426     bool vcpu_dirty;
427 
428     /* Used to keep track of an outstanding cpu throttle thread for migration
429      * autoconverge
430      */
431     bool throttle_thread_scheduled;
432 
433     /*
434      * Sleep throttle_us_per_full microseconds once dirty ring is full
435      * if dirty page rate limit is enabled.
436      */
437     int64_t throttle_us_per_full;
438 
439     bool ignore_memory_transaction_failures;
440 
441     /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
442     bool prctl_unalign_sigbus;
443 
444     struct hax_vcpu_state *hax_vcpu;
445 
446     struct hvf_vcpu_state *hvf;
447 
448     /* track IOMMUs whose translations we've cached in the TCG TLB */
449     GArray *iommu_notifiers;
450 };
451 
452 typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
453 extern CPUTailQ cpus;
454 
455 #define first_cpu        QTAILQ_FIRST_RCU(&cpus)
456 #define CPU_NEXT(cpu)    QTAILQ_NEXT_RCU(cpu, node)
457 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
458 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
459     QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
460 
461 extern __thread CPUState *current_cpu;
462 
463 /**
464  * qemu_tcg_mttcg_enabled:
465  * Check whether we are running MultiThread TCG or not.
466  *
467  * Returns: %true if we are in MTTCG mode %false otherwise.
468  */
469 extern bool mttcg_enabled;
470 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
471 
472 /**
473  * cpu_paging_enabled:
474  * @cpu: The CPU whose state is to be inspected.
475  *
476  * Returns: %true if paging is enabled, %false otherwise.
477  */
478 bool cpu_paging_enabled(const CPUState *cpu);
479 
480 /**
481  * cpu_get_memory_mapping:
482  * @cpu: The CPU whose memory mappings are to be obtained.
483  * @list: Where to write the memory mappings to.
484  * @errp: Pointer for reporting an #Error.
485  */
486 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
487                             Error **errp);
488 
489 #if !defined(CONFIG_USER_ONLY)
490 
491 /**
492  * cpu_write_elf64_note:
493  * @f: pointer to a function that writes memory to a file
494  * @cpu: The CPU whose memory is to be dumped
495  * @cpuid: ID number of the CPU
496  * @opaque: pointer to the CPUState struct
497  */
498 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
499                          int cpuid, void *opaque);
500 
501 /**
502  * cpu_write_elf64_qemunote:
503  * @f: pointer to a function that writes memory to a file
504  * @cpu: The CPU whose memory is to be dumped
505  * @cpuid: ID number of the CPU
506  * @opaque: pointer to the CPUState struct
507  */
508 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
509                              void *opaque);
510 
511 /**
512  * cpu_write_elf32_note:
513  * @f: pointer to a function that writes memory to a file
514  * @cpu: The CPU whose memory is to be dumped
515  * @cpuid: ID number of the CPU
516  * @opaque: pointer to the CPUState struct
517  */
518 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
519                          int cpuid, void *opaque);
520 
521 /**
522  * cpu_write_elf32_qemunote:
523  * @f: pointer to a function that writes memory to a file
524  * @cpu: The CPU whose memory is to be dumped
525  * @cpuid: ID number of the CPU
526  * @opaque: pointer to the CPUState struct
527  */
528 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
529                              void *opaque);
530 
531 /**
532  * cpu_get_crash_info:
533  * @cpu: The CPU to get crash information for
534  *
535  * Gets the previously saved crash information.
536  * Caller is responsible for freeing the data.
537  */
538 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
539 
540 #endif /* !CONFIG_USER_ONLY */
541 
542 /**
543  * CPUDumpFlags:
544  * @CPU_DUMP_CODE:
545  * @CPU_DUMP_FPU: dump FPU register state, not just integer
546  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
547  */
548 enum CPUDumpFlags {
549     CPU_DUMP_CODE = 0x00010000,
550     CPU_DUMP_FPU  = 0x00020000,
551     CPU_DUMP_CCOP = 0x00040000,
552 };
553 
554 /**
555  * cpu_dump_state:
556  * @cpu: The CPU whose state is to be dumped.
557  * @f: If non-null, dump to this stream, else to current print sink.
558  *
559  * Dumps CPU state.
560  */
561 void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
562 
563 #ifndef CONFIG_USER_ONLY
564 /**
565  * cpu_get_phys_page_attrs_debug:
566  * @cpu: The CPU to obtain the physical page address for.
567  * @addr: The virtual address.
568  * @attrs: Updated on return with the memory transaction attributes to use
569  *         for this access.
570  *
571  * Obtains the physical page corresponding to a virtual one, together
572  * with the corresponding memory transaction attributes to use for the access.
573  * Use it only for debugging because no protection checks are done.
574  *
575  * Returns: Corresponding physical page address or -1 if no page found.
576  */
577 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
578                                      MemTxAttrs *attrs);
579 
580 /**
581  * cpu_get_phys_page_debug:
582  * @cpu: The CPU to obtain the physical page address for.
583  * @addr: The virtual address.
584  *
585  * Obtains the physical page corresponding to a virtual one.
586  * Use it only for debugging because no protection checks are done.
587  *
588  * Returns: Corresponding physical page address or -1 if no page found.
589  */
590 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
591 
592 /** cpu_asidx_from_attrs:
593  * @cpu: CPU
594  * @attrs: memory transaction attributes
595  *
596  * Returns the address space index specifying the CPU AddressSpace
597  * to use for a memory access with the given transaction attributes.
598  */
599 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
600 
601 /**
602  * cpu_virtio_is_big_endian:
603  * @cpu: CPU
604 
605  * Returns %true if a CPU which supports runtime configurable endianness
606  * is currently big-endian.
607  */
608 bool cpu_virtio_is_big_endian(CPUState *cpu);
609 
610 #endif /* CONFIG_USER_ONLY */
611 
612 /**
613  * cpu_list_add:
614  * @cpu: The CPU to be added to the list of CPUs.
615  */
616 void cpu_list_add(CPUState *cpu);
617 
618 /**
619  * cpu_list_remove:
620  * @cpu: The CPU to be removed from the list of CPUs.
621  */
622 void cpu_list_remove(CPUState *cpu);
623 
624 /**
625  * cpu_reset:
626  * @cpu: The CPU whose state is to be reset.
627  */
628 void cpu_reset(CPUState *cpu);
629 
630 /**
631  * cpu_class_by_name:
632  * @typename: The CPU base type.
633  * @cpu_model: The model string without any parameters.
634  *
635  * Looks up a CPU #ObjectClass matching name @cpu_model.
636  *
637  * Returns: A #CPUClass or %NULL if not matching class is found.
638  */
639 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
640 
641 /**
642  * cpu_create:
643  * @typename: The CPU type.
644  *
645  * Instantiates a CPU and realizes the CPU.
646  *
647  * Returns: A #CPUState or %NULL if an error occurred.
648  */
649 CPUState *cpu_create(const char *typename);
650 
651 /**
652  * parse_cpu_option:
653  * @cpu_option: The -cpu option including optional parameters.
654  *
655  * processes optional parameters and registers them as global properties
656  *
657  * Returns: type of CPU to create or prints error and terminates process
658  *          if an error occurred.
659  */
660 const char *parse_cpu_option(const char *cpu_option);
661 
662 /**
663  * cpu_has_work:
664  * @cpu: The vCPU to check.
665  *
666  * Checks whether the CPU has work to do.
667  *
668  * Returns: %true if the CPU has work, %false otherwise.
669  */
670 static inline bool cpu_has_work(CPUState *cpu)
671 {
672     CPUClass *cc = CPU_GET_CLASS(cpu);
673 
674     g_assert(cc->has_work);
675     return cc->has_work(cpu);
676 }
677 
678 /**
679  * qemu_cpu_is_self:
680  * @cpu: The vCPU to check against.
681  *
682  * Checks whether the caller is executing on the vCPU thread.
683  *
684  * Returns: %true if called from @cpu's thread, %false otherwise.
685  */
686 bool qemu_cpu_is_self(CPUState *cpu);
687 
688 /**
689  * qemu_cpu_kick:
690  * @cpu: The vCPU to kick.
691  *
692  * Kicks @cpu's thread.
693  */
694 void qemu_cpu_kick(CPUState *cpu);
695 
696 /**
697  * cpu_is_stopped:
698  * @cpu: The CPU to check.
699  *
700  * Checks whether the CPU is stopped.
701  *
702  * Returns: %true if run state is not running or if artificially stopped;
703  * %false otherwise.
704  */
705 bool cpu_is_stopped(CPUState *cpu);
706 
707 /**
708  * do_run_on_cpu:
709  * @cpu: The vCPU to run on.
710  * @func: The function to be executed.
711  * @data: Data to pass to the function.
712  * @mutex: Mutex to release while waiting for @func to run.
713  *
714  * Used internally in the implementation of run_on_cpu.
715  */
716 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
717                    QemuMutex *mutex);
718 
719 /**
720  * run_on_cpu:
721  * @cpu: The vCPU to run on.
722  * @func: The function to be executed.
723  * @data: Data to pass to the function.
724  *
725  * Schedules the function @func for execution on the vCPU @cpu.
726  */
727 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
728 
729 /**
730  * async_run_on_cpu:
731  * @cpu: The vCPU to run on.
732  * @func: The function to be executed.
733  * @data: Data to pass to the function.
734  *
735  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
736  */
737 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
738 
739 /**
740  * async_safe_run_on_cpu:
741  * @cpu: The vCPU to run on.
742  * @func: The function to be executed.
743  * @data: Data to pass to the function.
744  *
745  * Schedules the function @func for execution on the vCPU @cpu asynchronously,
746  * while all other vCPUs are sleeping.
747  *
748  * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
749  * BQL.
750  */
751 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
752 
753 /**
754  * cpu_in_exclusive_context()
755  * @cpu: The vCPU to check
756  *
757  * Returns true if @cpu is an exclusive context, for example running
758  * something which has previously been queued via async_safe_run_on_cpu().
759  */
760 static inline bool cpu_in_exclusive_context(const CPUState *cpu)
761 {
762     return cpu->exclusive_context_count;
763 }
764 
765 /**
766  * qemu_get_cpu:
767  * @index: The CPUState@cpu_index value of the CPU to obtain.
768  *
769  * Gets a CPU matching @index.
770  *
771  * Returns: The CPU or %NULL if there is no matching CPU.
772  */
773 CPUState *qemu_get_cpu(int index);
774 
775 /**
776  * cpu_exists:
777  * @id: Guest-exposed CPU ID to lookup.
778  *
779  * Search for CPU with specified ID.
780  *
781  * Returns: %true - CPU is found, %false - CPU isn't found.
782  */
783 bool cpu_exists(int64_t id);
784 
785 /**
786  * cpu_by_arch_id:
787  * @id: Guest-exposed CPU ID of the CPU to obtain.
788  *
789  * Get a CPU with matching @id.
790  *
791  * Returns: The CPU or %NULL if there is no matching CPU.
792  */
793 CPUState *cpu_by_arch_id(int64_t id);
794 
795 /**
796  * cpu_interrupt:
797  * @cpu: The CPU to set an interrupt on.
798  * @mask: The interrupts to set.
799  *
800  * Invokes the interrupt handler.
801  */
802 
803 void cpu_interrupt(CPUState *cpu, int mask);
804 
805 /**
806  * cpu_set_pc:
807  * @cpu: The CPU to set the program counter for.
808  * @addr: Program counter value.
809  *
810  * Sets the program counter for a CPU.
811  */
812 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
813 {
814     CPUClass *cc = CPU_GET_CLASS(cpu);
815 
816     cc->set_pc(cpu, addr);
817 }
818 
819 /**
820  * cpu_reset_interrupt:
821  * @cpu: The CPU to clear the interrupt on.
822  * @mask: The interrupt mask to clear.
823  *
824  * Resets interrupts on the vCPU @cpu.
825  */
826 void cpu_reset_interrupt(CPUState *cpu, int mask);
827 
828 /**
829  * cpu_exit:
830  * @cpu: The CPU to exit.
831  *
832  * Requests the CPU @cpu to exit execution.
833  */
834 void cpu_exit(CPUState *cpu);
835 
836 /**
837  * cpu_resume:
838  * @cpu: The CPU to resume.
839  *
840  * Resumes CPU, i.e. puts CPU into runnable state.
841  */
842 void cpu_resume(CPUState *cpu);
843 
844 /**
845  * cpu_remove_sync:
846  * @cpu: The CPU to remove.
847  *
848  * Requests the CPU to be removed and waits till it is removed.
849  */
850 void cpu_remove_sync(CPUState *cpu);
851 
852 /**
853  * process_queued_cpu_work() - process all items on CPU work queue
854  * @cpu: The CPU which work queue to process.
855  */
856 void process_queued_cpu_work(CPUState *cpu);
857 
858 /**
859  * cpu_exec_start:
860  * @cpu: The CPU for the current thread.
861  *
862  * Record that a CPU has started execution and can be interrupted with
863  * cpu_exit.
864  */
865 void cpu_exec_start(CPUState *cpu);
866 
867 /**
868  * cpu_exec_end:
869  * @cpu: The CPU for the current thread.
870  *
871  * Record that a CPU has stopped execution and exclusive sections
872  * can be executed without interrupting it.
873  */
874 void cpu_exec_end(CPUState *cpu);
875 
876 /**
877  * start_exclusive:
878  *
879  * Wait for a concurrent exclusive section to end, and then start
880  * a section of work that is run while other CPUs are not running
881  * between cpu_exec_start and cpu_exec_end.  CPUs that are running
882  * cpu_exec are exited immediately.  CPUs that call cpu_exec_start
883  * during the exclusive section go to sleep until this CPU calls
884  * end_exclusive.
885  */
886 void start_exclusive(void);
887 
888 /**
889  * end_exclusive:
890  *
891  * Concludes an exclusive execution section started by start_exclusive.
892  */
893 void end_exclusive(void);
894 
895 /**
896  * qemu_init_vcpu:
897  * @cpu: The vCPU to initialize.
898  *
899  * Initializes a vCPU.
900  */
901 void qemu_init_vcpu(CPUState *cpu);
902 
903 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
904 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
905 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
906 
907 /**
908  * cpu_single_step:
909  * @cpu: CPU to the flags for.
910  * @enabled: Flags to enable.
911  *
912  * Enables or disables single-stepping for @cpu.
913  */
914 void cpu_single_step(CPUState *cpu, int enabled);
915 
916 /* Breakpoint/watchpoint flags */
917 #define BP_MEM_READ           0x01
918 #define BP_MEM_WRITE          0x02
919 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
920 #define BP_STOP_BEFORE_ACCESS 0x04
921 /* 0x08 currently unused */
922 #define BP_GDB                0x10
923 #define BP_CPU                0x20
924 #define BP_ANY                (BP_GDB | BP_CPU)
925 #define BP_HIT_SHIFT          6
926 #define BP_WATCHPOINT_HIT_READ  (BP_MEM_READ << BP_HIT_SHIFT)
927 #define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
928 #define BP_WATCHPOINT_HIT       (BP_MEM_ACCESS << BP_HIT_SHIFT)
929 
930 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
931                           CPUBreakpoint **breakpoint);
932 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
933 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
934 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
935 
936 /* Return true if PC matches an installed breakpoint.  */
937 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
938 {
939     CPUBreakpoint *bp;
940 
941     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
942         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
943             if (bp->pc == pc && (bp->flags & mask)) {
944                 return true;
945             }
946         }
947     }
948     return false;
949 }
950 
951 #if defined(CONFIG_USER_ONLY)
952 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
953                                         int flags, CPUWatchpoint **watchpoint)
954 {
955     return -ENOSYS;
956 }
957 
958 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
959                                         vaddr len, int flags)
960 {
961     return -ENOSYS;
962 }
963 
964 static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
965                                                 CPUWatchpoint *wp)
966 {
967 }
968 
969 static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
970 {
971 }
972 #else
973 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
974                           int flags, CPUWatchpoint **watchpoint);
975 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
976                           vaddr len, int flags);
977 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
978 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
979 #endif
980 
981 /**
982  * cpu_get_address_space:
983  * @cpu: CPU to get address space from
984  * @asidx: index identifying which address space to get
985  *
986  * Return the requested address space of this CPU. @asidx
987  * specifies which address space to read.
988  */
989 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
990 
991 G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
992     G_GNUC_PRINTF(2, 3);
993 
994 /* $(top_srcdir)/cpu.c */
995 void cpu_class_init_props(DeviceClass *dc);
996 void cpu_exec_initfn(CPUState *cpu);
997 void cpu_exec_realizefn(CPUState *cpu, Error **errp);
998 void cpu_exec_unrealizefn(CPUState *cpu);
999 
1000 /**
1001  * target_words_bigendian:
1002  * Returns true if the (default) endianness of the target is big endian,
1003  * false otherwise. Note that in target-specific code, you can use
1004  * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1005  * code should normally never need to know about the endianness of the
1006  * target, so please do *not* use this function unless you know very well
1007  * what you are doing!
1008  */
1009 bool target_words_bigendian(void);
1010 
1011 const char *target_name(void);
1012 
1013 void page_size_init(void);
1014 
1015 #ifdef NEED_CPU_H
1016 
1017 #ifdef CONFIG_SOFTMMU
1018 
1019 extern const VMStateDescription vmstate_cpu_common;
1020 
1021 #define VMSTATE_CPU() {                                                     \
1022     .name = "parent_obj",                                                   \
1023     .size = sizeof(CPUState),                                               \
1024     .vmsd = &vmstate_cpu_common,                                            \
1025     .flags = VMS_STRUCT,                                                    \
1026     .offset = 0,                                                            \
1027 }
1028 #endif /* CONFIG_SOFTMMU */
1029 
1030 #endif /* NEED_CPU_H */
1031 
1032 #define UNASSIGNED_CPU_INDEX -1
1033 #define UNASSIGNED_CLUSTER_INDEX -1
1034 
1035 #endif
1036