xref: /qemu/include/hw/core/cpu.h (revision 78f314cf)
1 /*
2  * QEMU CPU model
3  *
4  * Copyright (c) 2012 SUSE LINUX Products GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see
18  * <http://www.gnu.org/licenses/gpl-2.0.html>
19  */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22 
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin-event.h"
34 #include "qom/object.h"
35 
36 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
37                                      void *opaque);
38 
39 /**
40  * SECTION:cpu
41  * @section_id: QEMU-cpu
42  * @title: CPU Class
43  * @short_description: Base class for all CPUs
44  */
45 
46 #define TYPE_CPU "cpu"
47 
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
50  * an unchecked cast.
51  */
52 #define CPU(obj) ((CPUState *)(obj))
53 
54 /*
55  * The class checkers bring in CPU_GET_CLASS() which is potentially
56  * expensive given the eventual call to
57  * object_class_dynamic_cast_assert(). Because of this the CPUState
58  * has a cached value for the class in cs->cc which is set up in
59  * cpu_exec_realizefn() for use in hot code paths.
60  */
61 typedef struct CPUClass CPUClass;
62 DECLARE_CLASS_CHECKERS(CPUClass, CPU,
63                        TYPE_CPU)
64 
65 /**
66  * OBJECT_DECLARE_CPU_TYPE:
67  * @CpuInstanceType: instance struct name
68  * @CpuClassType: class struct name
69  * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
70  *
71  * This macro is typically used in "cpu-qom.h" header file, and will:
72  *
73  *   - create the typedefs for the CPU object and class structs
74  *   - register the type for use with g_autoptr
75  *   - provide three standard type cast functions
76  *
77  * The object struct and class struct need to be declared manually.
78  */
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80     typedef struct ArchCPU CpuInstanceType; \
81     OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
82 
83 typedef enum MMUAccessType {
84     MMU_DATA_LOAD  = 0,
85     MMU_DATA_STORE = 1,
86     MMU_INST_FETCH = 2
87 } MMUAccessType;
88 
89 typedef struct CPUWatchpoint CPUWatchpoint;
90 
91 /* see tcg-cpu-ops.h */
92 struct TCGCPUOps;
93 
94 /* see accel-cpu.h */
95 struct AccelCPUClass;
96 
97 /* see sysemu-cpu-ops.h */
98 struct SysemuCPUOps;
99 
100 /**
101  * CPUClass:
102  * @class_by_name: Callback to map -cpu command line model name to an
103  * instantiatable CPU type.
104  * @parse_features: Callback to parse command line arguments.
105  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
106  * @has_work: Callback for checking if there is work to do.
107  * @memory_rw_debug: Callback for GDB memory access.
108  * @dump_state: Callback for dumping state.
109  * @query_cpu_fast:
110  *       Fill in target specific information for the "query-cpus-fast"
111  *       QAPI call.
112  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
113  * @set_pc: Callback for setting the Program Counter register. This
114  *       should have the semantics used by the target architecture when
115  *       setting the PC from a source such as an ELF file entry point;
116  *       for example on Arm it will also set the Thumb mode bit based
117  *       on the least significant bit of the new PC value.
118  *       If the target behaviour here is anything other than "set
119  *       the PC register to the value passed in" then the target must
120  *       also implement the synchronize_from_tb hook.
121  * @get_pc: Callback for getting the Program Counter register.
122  *       As above, with the semantics of the target architecture.
123  * @gdb_read_register: Callback for letting GDB read a register.
124  * @gdb_write_register: Callback for letting GDB write a register.
125  * @gdb_adjust_breakpoint: Callback for adjusting the address of a
126  *       breakpoint.  Used by AVR to handle a gdb mis-feature with
127  *       its Harvard architecture split code and data.
128  * @gdb_num_core_regs: Number of core registers accessible to GDB.
129  * @gdb_core_xml_file: File name for core registers GDB XML description.
130  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
131  *           before the insn which triggers a watchpoint rather than after it.
132  * @gdb_arch_name: Optional callback that returns the architecture name known
133  * to GDB. The caller must free the returned string with g_free.
134  * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
135  *   gdb stub. Returns a pointer to the XML contents for the specified XML file
136  *   or NULL if the CPU doesn't have a dynamically generated content for it.
137  * @disas_set_info: Setup architecture specific components of disassembly info
138  * @adjust_watchpoint_address: Perform a target-specific adjustment to an
139  * address before attempting to match it against watchpoints.
140  * @deprecation_note: If this CPUClass is deprecated, this field provides
141  *                    related information.
142  *
143  * Represents a CPU family or model.
144  */
145 struct CPUClass {
146     /*< private >*/
147     DeviceClass parent_class;
148     /*< public >*/
149 
150     ObjectClass *(*class_by_name)(const char *cpu_model);
151     void (*parse_features)(const char *typename, char *str, Error **errp);
152 
153     bool (*has_work)(CPUState *cpu);
154     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
155                            uint8_t *buf, int len, bool is_write);
156     void (*dump_state)(CPUState *cpu, FILE *, int flags);
157     void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value);
158     int64_t (*get_arch_id)(CPUState *cpu);
159     void (*set_pc)(CPUState *cpu, vaddr value);
160     vaddr (*get_pc)(CPUState *cpu);
161     int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
162     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
163     vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
164 
165     const char *gdb_core_xml_file;
166     gchar * (*gdb_arch_name)(CPUState *cpu);
167     const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
168 
169     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
170 
171     const char *deprecation_note;
172     struct AccelCPUClass *accel_cpu;
173 
174     /* when system emulation is not available, this pointer is NULL */
175     const struct SysemuCPUOps *sysemu_ops;
176 
177     /* when TCG is not available, this pointer is NULL */
178     const struct TCGCPUOps *tcg_ops;
179 
180     /*
181      * if not NULL, this is called in order for the CPUClass to initialize
182      * class data that depends on the accelerator, see accel/accel-common.c.
183      */
184     void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
185 
186     /*
187      * Keep non-pointer data at the end to minimize holes.
188      */
189     int reset_dump_flags;
190     int gdb_num_core_regs;
191     bool gdb_stop_before_watchpoint;
192 };
193 
194 /*
195  * Low 16 bits: number of cycles left, used only in icount mode.
196  * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
197  * for this CPU and return to its top level loop (even in non-icount mode).
198  * This allows a single read-compare-cbranch-write sequence to test
199  * for both decrementer underflow and exceptions.
200  */
201 typedef union IcountDecr {
202     uint32_t u32;
203     struct {
204 #if HOST_BIG_ENDIAN
205         uint16_t high;
206         uint16_t low;
207 #else
208         uint16_t low;
209         uint16_t high;
210 #endif
211     } u16;
212 } IcountDecr;
213 
214 typedef struct CPUBreakpoint {
215     vaddr pc;
216     int flags; /* BP_* */
217     QTAILQ_ENTRY(CPUBreakpoint) entry;
218 } CPUBreakpoint;
219 
220 struct CPUWatchpoint {
221     vaddr vaddr;
222     vaddr len;
223     vaddr hitaddr;
224     MemTxAttrs hitattrs;
225     int flags; /* BP_* */
226     QTAILQ_ENTRY(CPUWatchpoint) entry;
227 };
228 
229 #ifdef CONFIG_PLUGIN
230 /*
231  * For plugins we sometime need to save the resolved iotlb data before
232  * the memory regions get moved around  by io_writex.
233  */
234 typedef struct SavedIOTLB {
235     MemoryRegionSection *section;
236     hwaddr mr_offset;
237 } SavedIOTLB;
238 #endif
239 
240 struct KVMState;
241 struct kvm_run;
242 
243 struct hax_vcpu_state;
244 struct hvf_vcpu_state;
245 
246 /* work queue */
247 
248 /* The union type allows passing of 64 bit target pointers on 32 bit
249  * hosts in a single parameter
250  */
251 typedef union {
252     int           host_int;
253     unsigned long host_ulong;
254     void         *host_ptr;
255     vaddr         target_ptr;
256 } run_on_cpu_data;
257 
258 #define RUN_ON_CPU_HOST_PTR(p)    ((run_on_cpu_data){.host_ptr = (p)})
259 #define RUN_ON_CPU_HOST_INT(i)    ((run_on_cpu_data){.host_int = (i)})
260 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
261 #define RUN_ON_CPU_TARGET_PTR(v)  ((run_on_cpu_data){.target_ptr = (v)})
262 #define RUN_ON_CPU_NULL           RUN_ON_CPU_HOST_PTR(NULL)
263 
264 typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
265 
266 struct qemu_work_item;
267 
268 #define CPU_UNSET_NUMA_NODE_ID -1
269 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
270 
271 /**
272  * CPUState:
273  * @cpu_index: CPU index (informative).
274  * @cluster_index: Identifies which cluster this CPU is in.
275  *   For boards which don't define clusters or for "loose" CPUs not assigned
276  *   to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
277  *   be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
278  *   QOM parent.
279  *   Under TCG this value is propagated to @tcg_cflags.
280  *   See TranslationBlock::TCG CF_CLUSTER_MASK.
281  * @tcg_cflags: Pre-computed cflags for this cpu.
282  * @nr_cores: Number of cores within this CPU package.
283  * @nr_threads: Number of threads within this CPU.
284  * @running: #true if CPU is currently running (lockless).
285  * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
286  * valid under cpu_list_lock.
287  * @created: Indicates whether the CPU thread has been successfully created.
288  * @interrupt_request: Indicates a pending interrupt request.
289  * @halted: Nonzero if the CPU is in suspended state.
290  * @stop: Indicates a pending stop request.
291  * @stopped: Indicates the CPU has been artificially stopped.
292  * @unplug: Indicates a pending CPU unplug request.
293  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
294  * @singlestep_enabled: Flags for single-stepping.
295  * @icount_extra: Instructions until next timer event.
296  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
297  * requires that IO only be performed on the last instruction of a TB
298  * so that interrupts take effect immediately.
299  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
300  *            AddressSpaces this CPU has)
301  * @num_ases: number of CPUAddressSpaces in @cpu_ases
302  * @as: Pointer to the first AddressSpace, for the convenience of targets which
303  *      only have a single AddressSpace
304  * @env_ptr: Pointer to subclass-specific CPUArchState field.
305  * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
306  * @gdb_regs: Additional GDB registers.
307  * @gdb_num_regs: Number of total registers accessible to GDB.
308  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
309  * @next_cpu: Next CPU sharing TB cache.
310  * @opaque: User data.
311  * @mem_io_pc: Host Program Counter at which the memory was accessed.
312  * @kvm_fd: vCPU file descriptor for KVM.
313  * @work_mutex: Lock to prevent multiple access to @work_list.
314  * @work_list: List of pending asynchronous work.
315  * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
316  *                        to @trace_dstate).
317  * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
318  * @plugin_mask: Plugin event bitmap. Modified only via async work.
319  * @ignore_memory_transaction_failures: Cached copy of the MachineState
320  *    flag of the same name: allows the board to suppress calling of the
321  *    CPU do_transaction_failed hook function.
322  * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
323  *    ring is enabled.
324  * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
325  *    dirty ring structure.
326  *
327  * State of one CPU core or thread.
328  */
329 struct CPUState {
330     /*< private >*/
331     DeviceState parent_obj;
332     /* cache to avoid expensive CPU_GET_CLASS */
333     CPUClass *cc;
334     /*< public >*/
335 
336     int nr_cores;
337     int nr_threads;
338 
339     struct QemuThread *thread;
340 #ifdef _WIN32
341     HANDLE hThread;
342     QemuSemaphore sem;
343 #endif
344     int thread_id;
345     bool running, has_waiter;
346     struct QemuCond *halt_cond;
347     bool thread_kicked;
348     bool created;
349     bool stop;
350     bool stopped;
351 
352     /* Should CPU start in powered-off state? */
353     bool start_powered_off;
354 
355     bool unplug;
356     bool crash_occurred;
357     bool exit_request;
358     int exclusive_context_count;
359     uint32_t cflags_next_tb;
360     /* updates protected by BQL */
361     uint32_t interrupt_request;
362     int singlestep_enabled;
363     int64_t icount_budget;
364     int64_t icount_extra;
365     uint64_t random_seed;
366     sigjmp_buf jmp_env;
367 
368     QemuMutex work_mutex;
369     QSIMPLEQ_HEAD(, qemu_work_item) work_list;
370 
371     CPUAddressSpace *cpu_ases;
372     int num_ases;
373     AddressSpace *as;
374     MemoryRegion *memory;
375 
376     CPUArchState *env_ptr;
377     IcountDecr *icount_decr_ptr;
378 
379     CPUJumpCache *tb_jmp_cache;
380 
381     struct GDBRegisterState *gdb_regs;
382     int gdb_num_regs;
383     int gdb_num_g_regs;
384     QTAILQ_ENTRY(CPUState) node;
385 
386     /* ice debug support */
387     QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
388 
389     QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
390     CPUWatchpoint *watchpoint_hit;
391 
392     void *opaque;
393 
394     /* In order to avoid passing too many arguments to the MMIO helpers,
395      * we store some rarely used information in the CPU context.
396      */
397     uintptr_t mem_io_pc;
398 
399     /* Only used in KVM */
400     int kvm_fd;
401     struct KVMState *kvm_state;
402     struct kvm_run *kvm_run;
403     struct kvm_dirty_gfn *kvm_dirty_gfns;
404     uint32_t kvm_fetch_index;
405     uint64_t dirty_pages;
406 
407     /* Use by accel-block: CPU is executing an ioctl() */
408     QemuLockCnt in_ioctl_lock;
409 
410     /* Used for events with 'vcpu' and *without* the 'disabled' properties */
411     DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS);
412     DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS);
413 
414     DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
415 
416 #ifdef CONFIG_PLUGIN
417     GArray *plugin_mem_cbs;
418     /* saved iotlb data from io_writex */
419     SavedIOTLB saved_iotlb;
420 #endif
421 
422     /* TODO Move common fields from CPUArchState here. */
423     int cpu_index;
424     int cluster_index;
425     uint32_t tcg_cflags;
426     uint32_t halted;
427     uint32_t can_do_io;
428     int32_t exception_index;
429 
430     /* shared by kvm, hax and hvf */
431     bool vcpu_dirty;
432 
433     /* Used to keep track of an outstanding cpu throttle thread for migration
434      * autoconverge
435      */
436     bool throttle_thread_scheduled;
437 
438     /*
439      * Sleep throttle_us_per_full microseconds once dirty ring is full
440      * if dirty page rate limit is enabled.
441      */
442     int64_t throttle_us_per_full;
443 
444     bool ignore_memory_transaction_failures;
445 
446     /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
447     bool prctl_unalign_sigbus;
448 
449     struct hax_vcpu_state *hax_vcpu;
450 
451     struct hvf_vcpu_state *hvf;
452 
453     /* track IOMMUs whose translations we've cached in the TCG TLB */
454     GArray *iommu_notifiers;
455 };
456 
457 typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
458 extern CPUTailQ cpus;
459 
460 #define first_cpu        QTAILQ_FIRST_RCU(&cpus)
461 #define CPU_NEXT(cpu)    QTAILQ_NEXT_RCU(cpu, node)
462 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
463 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
464     QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
465 
466 extern __thread CPUState *current_cpu;
467 
468 /**
469  * qemu_tcg_mttcg_enabled:
470  * Check whether we are running MultiThread TCG or not.
471  *
472  * Returns: %true if we are in MTTCG mode %false otherwise.
473  */
474 extern bool mttcg_enabled;
475 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
476 
477 /**
478  * cpu_paging_enabled:
479  * @cpu: The CPU whose state is to be inspected.
480  *
481  * Returns: %true if paging is enabled, %false otherwise.
482  */
483 bool cpu_paging_enabled(const CPUState *cpu);
484 
485 /**
486  * cpu_get_memory_mapping:
487  * @cpu: The CPU whose memory mappings are to be obtained.
488  * @list: Where to write the memory mappings to.
489  * @errp: Pointer for reporting an #Error.
490  */
491 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
492                             Error **errp);
493 
494 #if !defined(CONFIG_USER_ONLY)
495 
496 /**
497  * cpu_write_elf64_note:
498  * @f: pointer to a function that writes memory to a file
499  * @cpu: The CPU whose memory is to be dumped
500  * @cpuid: ID number of the CPU
501  * @opaque: pointer to the CPUState struct
502  */
503 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
504                          int cpuid, void *opaque);
505 
506 /**
507  * cpu_write_elf64_qemunote:
508  * @f: pointer to a function that writes memory to a file
509  * @cpu: The CPU whose memory is to be dumped
510  * @cpuid: ID number of the CPU
511  * @opaque: pointer to the CPUState struct
512  */
513 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
514                              void *opaque);
515 
516 /**
517  * cpu_write_elf32_note:
518  * @f: pointer to a function that writes memory to a file
519  * @cpu: The CPU whose memory is to be dumped
520  * @cpuid: ID number of the CPU
521  * @opaque: pointer to the CPUState struct
522  */
523 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
524                          int cpuid, void *opaque);
525 
526 /**
527  * cpu_write_elf32_qemunote:
528  * @f: pointer to a function that writes memory to a file
529  * @cpu: The CPU whose memory is to be dumped
530  * @cpuid: ID number of the CPU
531  * @opaque: pointer to the CPUState struct
532  */
533 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
534                              void *opaque);
535 
536 /**
537  * cpu_get_crash_info:
538  * @cpu: The CPU to get crash information for
539  *
540  * Gets the previously saved crash information.
541  * Caller is responsible for freeing the data.
542  */
543 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
544 
545 #endif /* !CONFIG_USER_ONLY */
546 
547 /**
548  * CPUDumpFlags:
549  * @CPU_DUMP_CODE:
550  * @CPU_DUMP_FPU: dump FPU register state, not just integer
551  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
552  */
553 enum CPUDumpFlags {
554     CPU_DUMP_CODE = 0x00010000,
555     CPU_DUMP_FPU  = 0x00020000,
556     CPU_DUMP_CCOP = 0x00040000,
557 };
558 
559 /**
560  * cpu_dump_state:
561  * @cpu: The CPU whose state is to be dumped.
562  * @f: If non-null, dump to this stream, else to current print sink.
563  *
564  * Dumps CPU state.
565  */
566 void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
567 
568 #ifndef CONFIG_USER_ONLY
569 /**
570  * cpu_get_phys_page_attrs_debug:
571  * @cpu: The CPU to obtain the physical page address for.
572  * @addr: The virtual address.
573  * @attrs: Updated on return with the memory transaction attributes to use
574  *         for this access.
575  *
576  * Obtains the physical page corresponding to a virtual one, together
577  * with the corresponding memory transaction attributes to use for the access.
578  * Use it only for debugging because no protection checks are done.
579  *
580  * Returns: Corresponding physical page address or -1 if no page found.
581  */
582 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
583                                      MemTxAttrs *attrs);
584 
585 /**
586  * cpu_get_phys_page_debug:
587  * @cpu: The CPU to obtain the physical page address for.
588  * @addr: The virtual address.
589  *
590  * Obtains the physical page corresponding to a virtual one.
591  * Use it only for debugging because no protection checks are done.
592  *
593  * Returns: Corresponding physical page address or -1 if no page found.
594  */
595 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
596 
597 /** cpu_asidx_from_attrs:
598  * @cpu: CPU
599  * @attrs: memory transaction attributes
600  *
601  * Returns the address space index specifying the CPU AddressSpace
602  * to use for a memory access with the given transaction attributes.
603  */
604 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
605 
606 /**
607  * cpu_virtio_is_big_endian:
608  * @cpu: CPU
609 
610  * Returns %true if a CPU which supports runtime configurable endianness
611  * is currently big-endian.
612  */
613 bool cpu_virtio_is_big_endian(CPUState *cpu);
614 
615 #endif /* CONFIG_USER_ONLY */
616 
617 /**
618  * cpu_list_add:
619  * @cpu: The CPU to be added to the list of CPUs.
620  */
621 void cpu_list_add(CPUState *cpu);
622 
623 /**
624  * cpu_list_remove:
625  * @cpu: The CPU to be removed from the list of CPUs.
626  */
627 void cpu_list_remove(CPUState *cpu);
628 
629 /**
630  * cpu_reset:
631  * @cpu: The CPU whose state is to be reset.
632  */
633 void cpu_reset(CPUState *cpu);
634 
635 /**
636  * cpu_class_by_name:
637  * @typename: The CPU base type.
638  * @cpu_model: The model string without any parameters.
639  *
640  * Looks up a CPU #ObjectClass matching name @cpu_model.
641  *
642  * Returns: A #CPUClass or %NULL if not matching class is found.
643  */
644 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
645 
646 /**
647  * cpu_create:
648  * @typename: The CPU type.
649  *
650  * Instantiates a CPU and realizes the CPU.
651  *
652  * Returns: A #CPUState or %NULL if an error occurred.
653  */
654 CPUState *cpu_create(const char *typename);
655 
656 /**
657  * parse_cpu_option:
658  * @cpu_option: The -cpu option including optional parameters.
659  *
660  * processes optional parameters and registers them as global properties
661  *
662  * Returns: type of CPU to create or prints error and terminates process
663  *          if an error occurred.
664  */
665 const char *parse_cpu_option(const char *cpu_option);
666 
667 /**
668  * cpu_has_work:
669  * @cpu: The vCPU to check.
670  *
671  * Checks whether the CPU has work to do.
672  *
673  * Returns: %true if the CPU has work, %false otherwise.
674  */
675 static inline bool cpu_has_work(CPUState *cpu)
676 {
677     CPUClass *cc = CPU_GET_CLASS(cpu);
678 
679     g_assert(cc->has_work);
680     return cc->has_work(cpu);
681 }
682 
683 /**
684  * qemu_cpu_is_self:
685  * @cpu: The vCPU to check against.
686  *
687  * Checks whether the caller is executing on the vCPU thread.
688  *
689  * Returns: %true if called from @cpu's thread, %false otherwise.
690  */
691 bool qemu_cpu_is_self(CPUState *cpu);
692 
693 /**
694  * qemu_cpu_kick:
695  * @cpu: The vCPU to kick.
696  *
697  * Kicks @cpu's thread.
698  */
699 void qemu_cpu_kick(CPUState *cpu);
700 
701 /**
702  * cpu_is_stopped:
703  * @cpu: The CPU to check.
704  *
705  * Checks whether the CPU is stopped.
706  *
707  * Returns: %true if run state is not running or if artificially stopped;
708  * %false otherwise.
709  */
710 bool cpu_is_stopped(CPUState *cpu);
711 
712 /**
713  * do_run_on_cpu:
714  * @cpu: The vCPU to run on.
715  * @func: The function to be executed.
716  * @data: Data to pass to the function.
717  * @mutex: Mutex to release while waiting for @func to run.
718  *
719  * Used internally in the implementation of run_on_cpu.
720  */
721 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
722                    QemuMutex *mutex);
723 
724 /**
725  * run_on_cpu:
726  * @cpu: The vCPU to run on.
727  * @func: The function to be executed.
728  * @data: Data to pass to the function.
729  *
730  * Schedules the function @func for execution on the vCPU @cpu.
731  */
732 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
733 
734 /**
735  * async_run_on_cpu:
736  * @cpu: The vCPU to run on.
737  * @func: The function to be executed.
738  * @data: Data to pass to the function.
739  *
740  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
741  */
742 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
743 
744 /**
745  * async_safe_run_on_cpu:
746  * @cpu: The vCPU to run on.
747  * @func: The function to be executed.
748  * @data: Data to pass to the function.
749  *
750  * Schedules the function @func for execution on the vCPU @cpu asynchronously,
751  * while all other vCPUs are sleeping.
752  *
753  * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
754  * BQL.
755  */
756 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
757 
758 /**
759  * cpu_in_exclusive_context()
760  * @cpu: The vCPU to check
761  *
762  * Returns true if @cpu is an exclusive context, for example running
763  * something which has previously been queued via async_safe_run_on_cpu().
764  */
765 static inline bool cpu_in_exclusive_context(const CPUState *cpu)
766 {
767     return cpu->exclusive_context_count;
768 }
769 
770 /**
771  * qemu_get_cpu:
772  * @index: The CPUState@cpu_index value of the CPU to obtain.
773  *
774  * Gets a CPU matching @index.
775  *
776  * Returns: The CPU or %NULL if there is no matching CPU.
777  */
778 CPUState *qemu_get_cpu(int index);
779 
780 /**
781  * cpu_exists:
782  * @id: Guest-exposed CPU ID to lookup.
783  *
784  * Search for CPU with specified ID.
785  *
786  * Returns: %true - CPU is found, %false - CPU isn't found.
787  */
788 bool cpu_exists(int64_t id);
789 
790 /**
791  * cpu_by_arch_id:
792  * @id: Guest-exposed CPU ID of the CPU to obtain.
793  *
794  * Get a CPU with matching @id.
795  *
796  * Returns: The CPU or %NULL if there is no matching CPU.
797  */
798 CPUState *cpu_by_arch_id(int64_t id);
799 
800 /**
801  * cpu_interrupt:
802  * @cpu: The CPU to set an interrupt on.
803  * @mask: The interrupts to set.
804  *
805  * Invokes the interrupt handler.
806  */
807 
808 void cpu_interrupt(CPUState *cpu, int mask);
809 
810 /**
811  * cpu_set_pc:
812  * @cpu: The CPU to set the program counter for.
813  * @addr: Program counter value.
814  *
815  * Sets the program counter for a CPU.
816  */
817 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
818 {
819     CPUClass *cc = CPU_GET_CLASS(cpu);
820 
821     cc->set_pc(cpu, addr);
822 }
823 
824 /**
825  * cpu_reset_interrupt:
826  * @cpu: The CPU to clear the interrupt on.
827  * @mask: The interrupt mask to clear.
828  *
829  * Resets interrupts on the vCPU @cpu.
830  */
831 void cpu_reset_interrupt(CPUState *cpu, int mask);
832 
833 /**
834  * cpu_exit:
835  * @cpu: The CPU to exit.
836  *
837  * Requests the CPU @cpu to exit execution.
838  */
839 void cpu_exit(CPUState *cpu);
840 
841 /**
842  * cpu_resume:
843  * @cpu: The CPU to resume.
844  *
845  * Resumes CPU, i.e. puts CPU into runnable state.
846  */
847 void cpu_resume(CPUState *cpu);
848 
849 /**
850  * cpu_remove_sync:
851  * @cpu: The CPU to remove.
852  *
853  * Requests the CPU to be removed and waits till it is removed.
854  */
855 void cpu_remove_sync(CPUState *cpu);
856 
857 /**
858  * process_queued_cpu_work() - process all items on CPU work queue
859  * @cpu: The CPU which work queue to process.
860  */
861 void process_queued_cpu_work(CPUState *cpu);
862 
863 /**
864  * cpu_exec_start:
865  * @cpu: The CPU for the current thread.
866  *
867  * Record that a CPU has started execution and can be interrupted with
868  * cpu_exit.
869  */
870 void cpu_exec_start(CPUState *cpu);
871 
872 /**
873  * cpu_exec_end:
874  * @cpu: The CPU for the current thread.
875  *
876  * Record that a CPU has stopped execution and exclusive sections
877  * can be executed without interrupting it.
878  */
879 void cpu_exec_end(CPUState *cpu);
880 
881 /**
882  * start_exclusive:
883  *
884  * Wait for a concurrent exclusive section to end, and then start
885  * a section of work that is run while other CPUs are not running
886  * between cpu_exec_start and cpu_exec_end.  CPUs that are running
887  * cpu_exec are exited immediately.  CPUs that call cpu_exec_start
888  * during the exclusive section go to sleep until this CPU calls
889  * end_exclusive.
890  */
891 void start_exclusive(void);
892 
893 /**
894  * end_exclusive:
895  *
896  * Concludes an exclusive execution section started by start_exclusive.
897  */
898 void end_exclusive(void);
899 
900 /**
901  * qemu_init_vcpu:
902  * @cpu: The vCPU to initialize.
903  *
904  * Initializes a vCPU.
905  */
906 void qemu_init_vcpu(CPUState *cpu);
907 
908 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
909 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
910 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
911 
912 /**
913  * cpu_single_step:
914  * @cpu: CPU to the flags for.
915  * @enabled: Flags to enable.
916  *
917  * Enables or disables single-stepping for @cpu.
918  */
919 void cpu_single_step(CPUState *cpu, int enabled);
920 
921 /* Breakpoint/watchpoint flags */
922 #define BP_MEM_READ           0x01
923 #define BP_MEM_WRITE          0x02
924 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
925 #define BP_STOP_BEFORE_ACCESS 0x04
926 /* 0x08 currently unused */
927 #define BP_GDB                0x10
928 #define BP_CPU                0x20
929 #define BP_ANY                (BP_GDB | BP_CPU)
930 #define BP_HIT_SHIFT          6
931 #define BP_WATCHPOINT_HIT_READ  (BP_MEM_READ << BP_HIT_SHIFT)
932 #define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
933 #define BP_WATCHPOINT_HIT       (BP_MEM_ACCESS << BP_HIT_SHIFT)
934 
935 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
936                           CPUBreakpoint **breakpoint);
937 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
938 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
939 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
940 
941 /* Return true if PC matches an installed breakpoint.  */
942 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
943 {
944     CPUBreakpoint *bp;
945 
946     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
947         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
948             if (bp->pc == pc && (bp->flags & mask)) {
949                 return true;
950             }
951         }
952     }
953     return false;
954 }
955 
956 #if defined(CONFIG_USER_ONLY)
957 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
958                                         int flags, CPUWatchpoint **watchpoint)
959 {
960     return -ENOSYS;
961 }
962 
963 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
964                                         vaddr len, int flags)
965 {
966     return -ENOSYS;
967 }
968 
969 static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
970                                                 CPUWatchpoint *wp)
971 {
972 }
973 
974 static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
975 {
976 }
977 #else
978 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
979                           int flags, CPUWatchpoint **watchpoint);
980 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
981                           vaddr len, int flags);
982 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
983 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
984 #endif
985 
986 /**
987  * cpu_get_address_space:
988  * @cpu: CPU to get address space from
989  * @asidx: index identifying which address space to get
990  *
991  * Return the requested address space of this CPU. @asidx
992  * specifies which address space to read.
993  */
994 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
995 
996 G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
997     G_GNUC_PRINTF(2, 3);
998 
999 /* $(top_srcdir)/cpu.c */
1000 void cpu_class_init_props(DeviceClass *dc);
1001 void cpu_exec_initfn(CPUState *cpu);
1002 void cpu_exec_realizefn(CPUState *cpu, Error **errp);
1003 void cpu_exec_unrealizefn(CPUState *cpu);
1004 
1005 /**
1006  * target_words_bigendian:
1007  * Returns true if the (default) endianness of the target is big endian,
1008  * false otherwise. Note that in target-specific code, you can use
1009  * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1010  * code should normally never need to know about the endianness of the
1011  * target, so please do *not* use this function unless you know very well
1012  * what you are doing!
1013  */
1014 bool target_words_bigendian(void);
1015 
1016 const char *target_name(void);
1017 
1018 void page_size_init(void);
1019 
1020 #ifdef NEED_CPU_H
1021 
1022 #ifdef CONFIG_SOFTMMU
1023 
1024 extern const VMStateDescription vmstate_cpu_common;
1025 
1026 #define VMSTATE_CPU() {                                                     \
1027     .name = "parent_obj",                                                   \
1028     .size = sizeof(CPUState),                                               \
1029     .vmsd = &vmstate_cpu_common,                                            \
1030     .flags = VMS_STRUCT,                                                    \
1031     .offset = 0,                                                            \
1032 }
1033 #endif /* CONFIG_SOFTMMU */
1034 
1035 #endif /* NEED_CPU_H */
1036 
1037 #define UNASSIGNED_CPU_INDEX -1
1038 #define UNASSIGNED_CLUSTER_INDEX -1
1039 
1040 #endif
1041