xref: /qemu/include/hw/cxl/cxl_cdat.h (revision 4a1babe5)
1 /*
2  * CXL CDAT Structure
3  *
4  * Copyright (C) 2021 Avery Design Systems, Inc.
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
7  * See the COPYING file in the top-level directory.
8  */
9 
10 #ifndef CXL_CDAT_H
11 #define CXL_CDAT_H
12 
13 #include "hw/cxl/cxl_pci.h"
14 #include "hw/pci/pcie_doe.h"
15 
16 /*
17  * Reference:
18  *   Coherent Device Attribute Table (CDAT) Specification, Rev. 1.03, July. 2022
19  *   Compute Express Link (CXL) Specification, Rev. 3.1, Aug. 2023
20  */
21 /* Table Access DOE - CXL r3.1 8.1.11 */
22 #define CXL_DOE_TABLE_ACCESS      2
23 #define CXL_DOE_PROTOCOL_CDAT     ((CXL_DOE_TABLE_ACCESS << 16) | CXL_VENDOR_ID)
24 
25 /* Read Entry - CXL r3.1 8.1.11.1 */
26 #define CXL_DOE_TAB_TYPE_CDAT 0
27 #define CXL_DOE_TAB_ENT_MAX 0xFFFF
28 
29 /* Read Entry Request - CXL r3.1 8.1.11.1 Table 8-13 */
30 #define CXL_DOE_TAB_REQ 0
31 typedef struct CDATReq {
32     DOEHeader header;
33     uint8_t req_code;
34     uint8_t table_type;
35     uint16_t entry_handle;
36 } QEMU_PACKED CDATReq;
37 
38 /* Read Entry Response - CXL r3.1 8.1.11.1 Table 8-14 */
39 #define CXL_DOE_TAB_RSP 0
40 typedef struct CDATRsp {
41     DOEHeader header;
42     uint8_t rsp_code;
43     uint8_t table_type;
44     uint16_t entry_handle;
45 } QEMU_PACKED CDATRsp;
46 
47 /* CDAT Table Format - CDAT Table 1 */
48 #define CXL_CDAT_REV 2
49 typedef struct CDATTableHeader {
50     uint32_t length;
51     uint8_t revision;
52     uint8_t checksum;
53     uint8_t reserved[6];
54     uint32_t sequence;
55 } QEMU_PACKED CDATTableHeader;
56 
57 /* CDAT Structure Types - CDAT Table 2 */
58 typedef enum {
59     CDAT_TYPE_DSMAS = 0,
60     CDAT_TYPE_DSLBIS = 1,
61     CDAT_TYPE_DSMSCIS = 2,
62     CDAT_TYPE_DSIS = 3,
63     CDAT_TYPE_DSEMTS = 4,
64     CDAT_TYPE_SSLBIS = 5,
65 } CDATType;
66 
67 typedef struct CDATSubHeader {
68     uint8_t type;
69     uint8_t reserved;
70     uint16_t length;
71 } CDATSubHeader;
72 
73 /* Device Scoped Memory Affinity Structure - CDAT Table 3 */
74 typedef struct CDATDsmas {
75     CDATSubHeader header;
76     uint8_t DSMADhandle;
77     uint8_t flags;
78 #define CDAT_DSMAS_FLAG_NV              (1 << 2)
79 #define CDAT_DSMAS_FLAG_SHAREABLE       (1 << 3)
80 #define CDAT_DSMAS_FLAG_HW_COHERENT     (1 << 4)
81 #define CDAT_DSMAS_FLAG_DYNAMIC_CAP     (1 << 5)
82     uint16_t reserved;
83     uint64_t DPA_base;
84     uint64_t DPA_length;
85 } CDATDsmas;
86 QEMU_BUILD_BUG_ON(sizeof(CDATDsmas) != 24);
87 
88 /* Device Scoped Latency and Bandwidth Information Structure - CDAT Table 5 */
89 typedef struct CDATDslbis {
90     CDATSubHeader header;
91     uint8_t handle;
92     /* Definitions of these fields refer directly to HMAT fields */
93     uint8_t flags;
94     uint8_t data_type;
95     uint8_t reserved;
96     uint64_t entry_base_unit;
97     uint16_t entry[3];
98     uint16_t reserved2;
99 } CDATDslbis;
100 QEMU_BUILD_BUG_ON(sizeof(CDATDslbis) != 24);
101 
102 /* Device Scoped Memory Side Cache Information Structure - CDAT Table 6 */
103 typedef struct CDATDsmscis {
104     CDATSubHeader header;
105     uint8_t DSMAS_handle;
106     uint8_t reserved[3];
107     uint64_t memory_side_cache_size;
108     uint32_t cache_attributes;
109 } QEMU_PACKED CDATDsmscis;
110 
111 /* Device Scoped Initiator Structure - CDAT Table 7 */
112 typedef struct CDATDsis {
113     CDATSubHeader header;
114     uint8_t flags;
115     uint8_t handle;
116     uint16_t reserved;
117 } QEMU_PACKED CDATDsis;
118 
119 /* Device Scoped EFI Memory Type Structure - CDAT Table 8 */
120 typedef struct CDATDsemts {
121     CDATSubHeader header;
122     uint8_t DSMAS_handle;
123     uint8_t EFI_memory_type_attr;
124     uint16_t reserved;
125     uint64_t DPA_offset;
126     uint64_t DPA_length;
127 } CDATDsemts;
128 QEMU_BUILD_BUG_ON(sizeof(CDATDsemts) != 24);
129 
130 /* Switch Scoped Latency and Bandwidth Information Structure - CDAT Table 9 */
131 typedef struct CDATSslbisHeader {
132     CDATSubHeader header;
133     uint8_t data_type;
134     uint8_t reserved[3];
135     uint64_t entry_base_unit;
136 } CDATSslbisHeader;
137 QEMU_BUILD_BUG_ON(sizeof(CDATSslbisHeader) != 16);
138 
139 #define CDAT_PORT_ID_USP 0x100
140 /* Switch Scoped Latency and Bandwidth Entry - CDAT Table 10 */
141 typedef struct CDATSslbe {
142     uint16_t port_x_id;
143     uint16_t port_y_id;
144     uint16_t latency_bandwidth;
145     uint16_t reserved;
146 } CDATSslbe;
147 QEMU_BUILD_BUG_ON(sizeof(CDATSslbe) != 8);
148 
149 typedef struct CDATSslbis {
150     CDATSslbisHeader sslbis_header;
151     CDATSslbe sslbe[];
152 } CDATSslbis;
153 
154 typedef struct CDATEntry {
155     void *base;
156     uint32_t length;
157 } CDATEntry;
158 
159 typedef struct CDATObject {
160     CDATEntry *entry;
161     int entry_len;
162 
163     int (*build_cdat_table)(CDATSubHeader ***cdat_table, void *priv);
164     void (*free_cdat_table)(CDATSubHeader **cdat_table, int num, void *priv);
165     bool to_update;
166     void *private;
167     char *filename;
168     uint8_t *buf;
169     struct CDATSubHeader **built_buf;
170     int built_buf_len;
171 } CDATObject;
172 #endif /* CXL_CDAT_H */
173