xref: /qemu/include/hw/i2c/bcm2835_i2c.h (revision 9cf3bc65)
1*9cf3bc65SRayhan Faizel /*
2*9cf3bc65SRayhan Faizel  * Broadcom Serial Controller (BSC)
3*9cf3bc65SRayhan Faizel  *
4*9cf3bc65SRayhan Faizel  * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
5*9cf3bc65SRayhan Faizel  *
6*9cf3bc65SRayhan Faizel  * SPDX-License-Identifier: MIT
7*9cf3bc65SRayhan Faizel  *
8*9cf3bc65SRayhan Faizel  * Permission is hereby granted, free of charge, to any person obtaining a copy
9*9cf3bc65SRayhan Faizel  * of this software and associated documentation files (the "Software"), to deal
10*9cf3bc65SRayhan Faizel  * in the Software without restriction, including without limitation the rights
11*9cf3bc65SRayhan Faizel  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12*9cf3bc65SRayhan Faizel  * copies of the Software, and to permit persons to whom the Software is
13*9cf3bc65SRayhan Faizel  * furnished to do so, subject to the following conditions:
14*9cf3bc65SRayhan Faizel  *
15*9cf3bc65SRayhan Faizel  * The above copyright notice and this permission notice shall be included in
16*9cf3bc65SRayhan Faizel  * all copies or substantial portions of the Software.
17*9cf3bc65SRayhan Faizel  *
18*9cf3bc65SRayhan Faizel  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19*9cf3bc65SRayhan Faizel  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20*9cf3bc65SRayhan Faizel  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21*9cf3bc65SRayhan Faizel  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22*9cf3bc65SRayhan Faizel  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23*9cf3bc65SRayhan Faizel  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24*9cf3bc65SRayhan Faizel  * THE SOFTWARE.
25*9cf3bc65SRayhan Faizel  */
26*9cf3bc65SRayhan Faizel 
27*9cf3bc65SRayhan Faizel #include "hw/sysbus.h"
28*9cf3bc65SRayhan Faizel #include "hw/i2c/i2c.h"
29*9cf3bc65SRayhan Faizel #include "qom/object.h"
30*9cf3bc65SRayhan Faizel 
31*9cf3bc65SRayhan Faizel #define TYPE_BCM2835_I2C "bcm2835-i2c"
32*9cf3bc65SRayhan Faizel OBJECT_DECLARE_SIMPLE_TYPE(BCM2835I2CState, BCM2835_I2C)
33*9cf3bc65SRayhan Faizel 
34*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C       0x0                   /* Control */
35*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S       0x4                   /* Status */
36*9cf3bc65SRayhan Faizel #define BCM2835_I2C_DLEN    0x8                   /* Data Length */
37*9cf3bc65SRayhan Faizel #define BCM2835_I2C_A       0xc                   /* Slave Address */
38*9cf3bc65SRayhan Faizel #define BCM2835_I2C_FIFO    0x10                  /* FIFO */
39*9cf3bc65SRayhan Faizel #define BCM2835_I2C_DIV     0x14                  /* Clock Divider */
40*9cf3bc65SRayhan Faizel #define BCM2835_I2C_DEL     0x18                  /* Data Delay */
41*9cf3bc65SRayhan Faizel #define BCM2835_I2C_CLKT    0x20                  /* Clock Stretch Timeout */
42*9cf3bc65SRayhan Faizel 
43*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_I2CEN     BIT(15)           /* I2C enable */
44*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_INTR      BIT(10)           /* Interrupt on RXR */
45*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_INTT      BIT(9)            /* Interrupt on TXW */
46*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_INTD      BIT(8)            /* Interrupt on DONE */
47*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_ST        BIT(7)            /* Start transfer */
48*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_CLEAR     (BIT(5) | BIT(4)) /* Clear FIFO */
49*9cf3bc65SRayhan Faizel #define BCM2835_I2C_C_READ      BIT(0)            /* I2C read mode */
50*9cf3bc65SRayhan Faizel 
51*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_CLKT      BIT(9)            /* Clock stretch timeout */
52*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_ERR       BIT(8)            /* Slave error */
53*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_RXF       BIT(7)            /* RX FIFO full */
54*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_TXE       BIT(6)            /* TX FIFO empty */
55*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_RXD       BIT(5)            /* RX bytes available */
56*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_TXD       BIT(4)            /* TX space available */
57*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_RXR       BIT(3)            /* RX FIFO needs reading */
58*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_TXW       BIT(2)            /* TX FIFO needs writing */
59*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_DONE      BIT(1)            /* I2C Transfer complete */
60*9cf3bc65SRayhan Faizel #define BCM2835_I2C_S_TA        BIT(0)            /* I2C Transfer active */
61*9cf3bc65SRayhan Faizel 
62*9cf3bc65SRayhan Faizel struct BCM2835I2CState {
63*9cf3bc65SRayhan Faizel     /* <private> */
64*9cf3bc65SRayhan Faizel     SysBusDevice parent_obj;
65*9cf3bc65SRayhan Faizel 
66*9cf3bc65SRayhan Faizel     /* <public> */
67*9cf3bc65SRayhan Faizel     MemoryRegion iomem;
68*9cf3bc65SRayhan Faizel     I2CBus *bus;
69*9cf3bc65SRayhan Faizel     qemu_irq irq;
70*9cf3bc65SRayhan Faizel 
71*9cf3bc65SRayhan Faizel     uint32_t c;
72*9cf3bc65SRayhan Faizel     uint32_t s;
73*9cf3bc65SRayhan Faizel     uint32_t dlen;
74*9cf3bc65SRayhan Faizel     uint32_t a;
75*9cf3bc65SRayhan Faizel     uint32_t div;
76*9cf3bc65SRayhan Faizel     uint32_t del;
77*9cf3bc65SRayhan Faizel     uint32_t clkt;
78*9cf3bc65SRayhan Faizel 
79*9cf3bc65SRayhan Faizel     uint32_t last_dlen;
80*9cf3bc65SRayhan Faizel };
81