1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 #include "hw/compat.h" 18 #include "hw/mem/pc-dimm.h" 19 #include "hw/mem/nvdimm.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 #ifdef CONFIG_KVM 24 #define kvm_pit_in_kernel() \ 25 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 26 #define kvm_pic_in_kernel() \ 27 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 28 #define kvm_ioapic_in_kernel() \ 29 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 30 #else 31 #define kvm_pit_in_kernel() 0 32 #define kvm_pic_in_kernel() 0 33 #define kvm_ioapic_in_kernel() 0 34 #endif 35 36 /** 37 * PCMachineState: 38 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 39 */ 40 struct PCMachineState { 41 /*< private >*/ 42 MachineState parent_obj; 43 44 /* <public> */ 45 46 /* State for other subsystems/APIs: */ 47 MemoryHotplugState hotplug_memory; 48 Notifier machine_done; 49 50 /* Pointers to devices and objects: */ 51 HotplugHandler *acpi_dev; 52 ISADevice *rtc; 53 PCIBus *bus; 54 FWCfgState *fw_cfg; 55 56 /* Configuration options: */ 57 uint64_t max_ram_below_4g; 58 OnOffAuto vmport; 59 OnOffAuto smm; 60 61 AcpiNVDIMMState acpi_nvdimm_state; 62 63 /* RAM information (sizes, addresses, configuration): */ 64 ram_addr_t below_4g_mem_size, above_4g_mem_size; 65 66 /* CPU and apic information: */ 67 bool apic_xrupt_override; 68 unsigned apic_id_limit; 69 CPUArchIdList *possible_cpus; 70 71 /* NUMA information: */ 72 uint64_t numa_nodes; 73 uint64_t *node_mem; 74 uint64_t *node_cpu; 75 }; 76 77 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 78 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 79 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 80 #define PC_MACHINE_VMPORT "vmport" 81 #define PC_MACHINE_SMM "smm" 82 #define PC_MACHINE_NVDIMM "nvdimm" 83 84 /** 85 * PCMachineClass: 86 * 87 * Methods: 88 * 89 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 90 * 91 * Compat fields: 92 * 93 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 94 * backend's alignment value if provided 95 * @acpi_data_size: Size of the chunk of memory at the top of RAM 96 * for the BIOS ACPI tables and other BIOS 97 * datastructures. 98 * @gigabyte_align: Make sure that guest addresses aligned at 99 * 1Gbyte boundaries get mapped to host 100 * addresses aligned at 1Gbyte boundaries. This 101 * way we can use 1GByte pages in the host. 102 * 103 */ 104 struct PCMachineClass { 105 /*< private >*/ 106 MachineClass parent_class; 107 108 /*< public >*/ 109 110 /* Methods: */ 111 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 112 DeviceState *dev); 113 114 /* Device configuration: */ 115 bool pci_enabled; 116 bool kvmclock_enabled; 117 118 /* Compat options: */ 119 120 /* ACPI compat: */ 121 bool has_acpi_build; 122 bool rsdp_in_ram; 123 int legacy_acpi_table_size; 124 unsigned acpi_data_size; 125 126 /* SMBIOS compat: */ 127 bool smbios_defaults; 128 bool smbios_legacy_mode; 129 bool smbios_uuid_encoded; 130 131 /* RAM / address space compat: */ 132 bool gigabyte_align; 133 bool has_reserved_memory; 134 bool enforce_aligned_dimm; 135 bool broken_reserved_end; 136 137 /* TSC rate migration: */ 138 bool save_tsc_khz; 139 }; 140 141 #define TYPE_PC_MACHINE "generic-pc-machine" 142 #define PC_MACHINE(obj) \ 143 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_GET_CLASS(obj) \ 145 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 146 #define PC_MACHINE_CLASS(klass) \ 147 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 148 149 /* PC-style peripherals (also used by other machines). */ 150 151 typedef struct PcPciInfo { 152 Range w32; 153 Range w64; 154 } PcPciInfo; 155 156 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 157 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 158 #define ACPI_PM_PROP_S4_VAL "s4_val" 159 #define ACPI_PM_PROP_SCI_INT "sci_int" 160 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 161 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 162 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 163 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 164 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 165 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 166 167 /* parallel.c */ 168 169 void parallel_hds_isa_init(ISABus *bus, int n); 170 171 bool parallel_mm_init(MemoryRegion *address_space, 172 hwaddr base, int it_shift, qemu_irq irq, 173 CharDriverState *chr); 174 175 /* i8259.c */ 176 177 extern DeviceState *isa_pic; 178 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 179 qemu_irq *kvm_i8259_init(ISABus *bus); 180 int pic_read_irq(DeviceState *d); 181 int pic_get_output(DeviceState *d); 182 void hmp_info_pic(Monitor *mon, const QDict *qdict); 183 void hmp_info_irq(Monitor *mon, const QDict *qdict); 184 185 /* ioapic.c */ 186 187 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 188 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 189 190 /* Global System Interrupts */ 191 192 #define GSI_NUM_PINS IOAPIC_NUM_PINS 193 194 typedef struct GSIState { 195 qemu_irq i8259_irq[ISA_NUM_IRQS]; 196 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 197 } GSIState; 198 199 void gsi_handler(void *opaque, int n, int level); 200 201 /* vmport.c */ 202 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 203 204 static inline void vmport_init(ISABus *bus) 205 { 206 isa_create_simple(bus, "vmport"); 207 } 208 209 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 210 void vmmouse_get_data(uint32_t *data); 211 void vmmouse_set_data(const uint32_t *data); 212 213 /* pckbd.c */ 214 215 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 216 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 217 MemoryRegion *region, ram_addr_t size, 218 hwaddr mask); 219 void i8042_isa_mouse_fake_event(void *opaque); 220 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 221 222 /* pc.c */ 223 extern int fd_bootchk; 224 225 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 226 void pc_register_ferr_irq(qemu_irq irq); 227 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 228 229 void pc_cpus_init(PCMachineState *pcms); 230 void pc_hot_add_cpu(const int64_t id, Error **errp); 231 void pc_acpi_init(const char *default_dsdt); 232 233 void pc_guest_info_init(PCMachineState *pcms); 234 235 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 236 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 237 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 238 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 239 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 240 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 241 242 243 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 244 MemoryRegion *pci_address_space); 245 246 void xen_load_linux(PCMachineState *pcms); 247 void pc_memory_init(PCMachineState *pcms, 248 MemoryRegion *system_memory, 249 MemoryRegion *rom_memory, 250 MemoryRegion **ram_memory); 251 qemu_irq pc_allocate_cpu_irq(void); 252 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 253 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 254 ISADevice **rtc_state, 255 bool create_fdctrl, 256 bool no_vmport, 257 uint32_t hpet_irqs); 258 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 259 void pc_cmos_init(PCMachineState *pcms, 260 BusState *ide0, BusState *ide1, 261 ISADevice *s); 262 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 263 void pc_pci_device_init(PCIBus *pci_bus); 264 265 typedef void (*cpu_set_smm_t)(int smm, void *arg); 266 267 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 268 269 ISADevice *pc_find_fdc0(void); 270 int cmos_get_fd_drive_type(FloppyDriveType fd0); 271 272 #define FW_CFG_IO_BASE 0x510 273 274 /* acpi_piix.c */ 275 276 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 277 qemu_irq sci_irq, qemu_irq smi_irq, 278 int smm_enabled, DeviceState **piix4_pm); 279 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 280 281 /* hpet.c */ 282 extern int no_hpet; 283 284 /* piix_pci.c */ 285 struct PCII440FXState; 286 typedef struct PCII440FXState PCII440FXState; 287 288 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 289 #define TYPE_I440FX_PCI_DEVICE "i440FX" 290 291 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 292 293 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 294 PCII440FXState **pi440fx_state, int *piix_devfn, 295 ISABus **isa_bus, qemu_irq *pic, 296 MemoryRegion *address_space_mem, 297 MemoryRegion *address_space_io, 298 ram_addr_t ram_size, 299 ram_addr_t below_4g_mem_size, 300 ram_addr_t above_4g_mem_size, 301 MemoryRegion *pci_memory, 302 MemoryRegion *ram_memory); 303 304 PCIBus *find_i440fx(void); 305 /* piix4.c */ 306 extern PCIDevice *piix4_dev; 307 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 308 309 /* vga.c */ 310 enum vga_retrace_method { 311 VGA_RETRACE_DUMB, 312 VGA_RETRACE_PRECISE 313 }; 314 315 extern enum vga_retrace_method vga_retrace_method; 316 317 int isa_vga_mm_init(hwaddr vram_base, 318 hwaddr ctrl_base, int it_shift, 319 MemoryRegion *address_space); 320 321 /* ne2000.c */ 322 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 323 { 324 DeviceState *dev; 325 ISADevice *isadev; 326 327 qemu_check_nic_model(nd, "ne2k_isa"); 328 329 isadev = isa_try_create(bus, "ne2k_isa"); 330 if (!isadev) { 331 return false; 332 } 333 dev = DEVICE(isadev); 334 qdev_prop_set_uint32(dev, "iobase", base); 335 qdev_prop_set_uint32(dev, "irq", irq); 336 qdev_set_nic_properties(dev, nd); 337 qdev_init_nofail(dev); 338 return true; 339 } 340 341 /* pc_sysfw.c */ 342 void pc_system_firmware_init(MemoryRegion *rom_memory, 343 bool isapc_ram_fw); 344 345 /* pvpanic.c */ 346 uint16_t pvpanic_port(void); 347 348 /* e820 types */ 349 #define E820_RAM 1 350 #define E820_RESERVED 2 351 #define E820_ACPI 3 352 #define E820_NVS 4 353 #define E820_UNUSABLE 5 354 355 int e820_add_entry(uint64_t, uint64_t, uint32_t); 356 int e820_get_num_entries(void); 357 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 358 359 #define PC_COMPAT_2_5 \ 360 HW_COMPAT_2_5 361 362 /* Helper for setting model-id for CPU models that changed model-id 363 * depending on QEMU versions up to QEMU 2.4. 364 */ 365 #define PC_CPU_MODEL_IDS(v) \ 366 {\ 367 .driver = "qemu32-" TYPE_X86_CPU,\ 368 .property = "model-id",\ 369 .value = "QEMU Virtual CPU version " v,\ 370 },\ 371 {\ 372 .driver = "qemu64-" TYPE_X86_CPU,\ 373 .property = "model-id",\ 374 .value = "QEMU Virtual CPU version " v,\ 375 },\ 376 {\ 377 .driver = "athlon-" TYPE_X86_CPU,\ 378 .property = "model-id",\ 379 .value = "QEMU Virtual CPU version " v,\ 380 }, 381 382 #define PC_COMPAT_2_4 \ 383 HW_COMPAT_2_4 \ 384 PC_CPU_MODEL_IDS("2.4.0") \ 385 {\ 386 .driver = "Haswell-" TYPE_X86_CPU,\ 387 .property = "abm",\ 388 .value = "off",\ 389 },\ 390 {\ 391 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 392 .property = "abm",\ 393 .value = "off",\ 394 },\ 395 {\ 396 .driver = "Broadwell-" TYPE_X86_CPU,\ 397 .property = "abm",\ 398 .value = "off",\ 399 },\ 400 {\ 401 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 402 .property = "abm",\ 403 .value = "off",\ 404 },\ 405 {\ 406 .driver = "host" "-" TYPE_X86_CPU,\ 407 .property = "host-cache-info",\ 408 .value = "on",\ 409 },\ 410 {\ 411 .driver = TYPE_X86_CPU,\ 412 .property = "check",\ 413 .value = "off",\ 414 },\ 415 {\ 416 .driver = "qemu64" "-" TYPE_X86_CPU,\ 417 .property = "sse4a",\ 418 .value = "on",\ 419 },\ 420 {\ 421 .driver = "qemu64" "-" TYPE_X86_CPU,\ 422 .property = "abm",\ 423 .value = "on",\ 424 },\ 425 {\ 426 .driver = "qemu64" "-" TYPE_X86_CPU,\ 427 .property = "popcnt",\ 428 .value = "on",\ 429 },\ 430 {\ 431 .driver = "qemu32" "-" TYPE_X86_CPU,\ 432 .property = "popcnt",\ 433 .value = "on",\ 434 },{\ 435 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 436 .property = "rdtscp",\ 437 .value = "on",\ 438 },{\ 439 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 440 .property = "rdtscp",\ 441 .value = "on",\ 442 },{\ 443 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 444 .property = "rdtscp",\ 445 .value = "on",\ 446 },{\ 447 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 448 .property = "rdtscp",\ 449 .value = "on",\ 450 }, 451 452 453 #define PC_COMPAT_2_3 \ 454 HW_COMPAT_2_3 \ 455 PC_CPU_MODEL_IDS("2.3.0") \ 456 {\ 457 .driver = TYPE_X86_CPU,\ 458 .property = "arat",\ 459 .value = "off",\ 460 },{\ 461 .driver = "qemu64" "-" TYPE_X86_CPU,\ 462 .property = "level",\ 463 .value = stringify(4),\ 464 },{\ 465 .driver = "kvm64" "-" TYPE_X86_CPU,\ 466 .property = "level",\ 467 .value = stringify(5),\ 468 },{\ 469 .driver = "pentium3" "-" TYPE_X86_CPU,\ 470 .property = "level",\ 471 .value = stringify(2),\ 472 },{\ 473 .driver = "n270" "-" TYPE_X86_CPU,\ 474 .property = "level",\ 475 .value = stringify(5),\ 476 },{\ 477 .driver = "Conroe" "-" TYPE_X86_CPU,\ 478 .property = "level",\ 479 .value = stringify(4),\ 480 },{\ 481 .driver = "Penryn" "-" TYPE_X86_CPU,\ 482 .property = "level",\ 483 .value = stringify(4),\ 484 },{\ 485 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 486 .property = "level",\ 487 .value = stringify(4),\ 488 },{\ 489 .driver = "n270" "-" TYPE_X86_CPU,\ 490 .property = "xlevel",\ 491 .value = stringify(0x8000000a),\ 492 },{\ 493 .driver = "Penryn" "-" TYPE_X86_CPU,\ 494 .property = "xlevel",\ 495 .value = stringify(0x8000000a),\ 496 },{\ 497 .driver = "Conroe" "-" TYPE_X86_CPU,\ 498 .property = "xlevel",\ 499 .value = stringify(0x8000000a),\ 500 },{\ 501 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 502 .property = "xlevel",\ 503 .value = stringify(0x8000000a),\ 504 },{\ 505 .driver = "Westmere" "-" TYPE_X86_CPU,\ 506 .property = "xlevel",\ 507 .value = stringify(0x8000000a),\ 508 },{\ 509 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 510 .property = "xlevel",\ 511 .value = stringify(0x8000000a),\ 512 },{\ 513 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 514 .property = "xlevel",\ 515 .value = stringify(0x8000000a),\ 516 },{\ 517 .driver = "Haswell" "-" TYPE_X86_CPU,\ 518 .property = "xlevel",\ 519 .value = stringify(0x8000000a),\ 520 },{\ 521 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 522 .property = "xlevel",\ 523 .value = stringify(0x8000000a),\ 524 },{\ 525 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 526 .property = "xlevel",\ 527 .value = stringify(0x8000000a),\ 528 },{\ 529 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 530 .property = "xlevel",\ 531 .value = stringify(0x8000000a),\ 532 }, 533 534 #define PC_COMPAT_2_2 \ 535 HW_COMPAT_2_2 \ 536 PC_CPU_MODEL_IDS("2.3.0") \ 537 {\ 538 .driver = "kvm64" "-" TYPE_X86_CPU,\ 539 .property = "vme",\ 540 .value = "off",\ 541 },\ 542 {\ 543 .driver = "kvm32" "-" TYPE_X86_CPU,\ 544 .property = "vme",\ 545 .value = "off",\ 546 },\ 547 {\ 548 .driver = "Conroe" "-" TYPE_X86_CPU,\ 549 .property = "vme",\ 550 .value = "off",\ 551 },\ 552 {\ 553 .driver = "Penryn" "-" TYPE_X86_CPU,\ 554 .property = "vme",\ 555 .value = "off",\ 556 },\ 557 {\ 558 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 559 .property = "vme",\ 560 .value = "off",\ 561 },\ 562 {\ 563 .driver = "Westmere" "-" TYPE_X86_CPU,\ 564 .property = "vme",\ 565 .value = "off",\ 566 },\ 567 {\ 568 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 569 .property = "vme",\ 570 .value = "off",\ 571 },\ 572 {\ 573 .driver = "Haswell" "-" TYPE_X86_CPU,\ 574 .property = "vme",\ 575 .value = "off",\ 576 },\ 577 {\ 578 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 579 .property = "vme",\ 580 .value = "off",\ 581 },\ 582 {\ 583 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 584 .property = "vme",\ 585 .value = "off",\ 586 },\ 587 {\ 588 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 589 .property = "vme",\ 590 .value = "off",\ 591 },\ 592 {\ 593 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 594 .property = "vme",\ 595 .value = "off",\ 596 },\ 597 {\ 598 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 599 .property = "vme",\ 600 .value = "off",\ 601 },\ 602 {\ 603 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 604 .property = "vme",\ 605 .value = "off",\ 606 },\ 607 {\ 608 .driver = "Haswell" "-" TYPE_X86_CPU,\ 609 .property = "f16c",\ 610 .value = "off",\ 611 },\ 612 {\ 613 .driver = "Haswell" "-" TYPE_X86_CPU,\ 614 .property = "rdrand",\ 615 .value = "off",\ 616 },\ 617 {\ 618 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 619 .property = "f16c",\ 620 .value = "off",\ 621 },\ 622 {\ 623 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 624 .property = "rdrand",\ 625 .value = "off",\ 626 }, 627 628 #define PC_COMPAT_2_1 \ 629 HW_COMPAT_2_1 \ 630 PC_CPU_MODEL_IDS("2.1.0") \ 631 {\ 632 .driver = "coreduo" "-" TYPE_X86_CPU,\ 633 .property = "vmx",\ 634 .value = "on",\ 635 },\ 636 {\ 637 .driver = "core2duo" "-" TYPE_X86_CPU,\ 638 .property = "vmx",\ 639 .value = "on",\ 640 }, 641 642 #define PC_COMPAT_2_0 \ 643 PC_CPU_MODEL_IDS("2.0.0") \ 644 {\ 645 .driver = "virtio-scsi-pci",\ 646 .property = "any_layout",\ 647 .value = "off",\ 648 },{\ 649 .driver = "PIIX4_PM",\ 650 .property = "memory-hotplug-support",\ 651 .value = "off",\ 652 },\ 653 {\ 654 .driver = "apic",\ 655 .property = "version",\ 656 .value = stringify(0x11),\ 657 },\ 658 {\ 659 .driver = "nec-usb-xhci",\ 660 .property = "superspeed-ports-first",\ 661 .value = "off",\ 662 },\ 663 {\ 664 .driver = "nec-usb-xhci",\ 665 .property = "force-pcie-endcap",\ 666 .value = "on",\ 667 },\ 668 {\ 669 .driver = "pci-serial",\ 670 .property = "prog_if",\ 671 .value = stringify(0),\ 672 },\ 673 {\ 674 .driver = "pci-serial-2x",\ 675 .property = "prog_if",\ 676 .value = stringify(0),\ 677 },\ 678 {\ 679 .driver = "pci-serial-4x",\ 680 .property = "prog_if",\ 681 .value = stringify(0),\ 682 },\ 683 {\ 684 .driver = "virtio-net-pci",\ 685 .property = "guest_announce",\ 686 .value = "off",\ 687 },\ 688 {\ 689 .driver = "ICH9-LPC",\ 690 .property = "memory-hotplug-support",\ 691 .value = "off",\ 692 },{\ 693 .driver = "xio3130-downstream",\ 694 .property = COMPAT_PROP_PCP,\ 695 .value = "off",\ 696 },{\ 697 .driver = "ioh3420",\ 698 .property = COMPAT_PROP_PCP,\ 699 .value = "off",\ 700 }, 701 702 #define PC_COMPAT_1_7 \ 703 PC_CPU_MODEL_IDS("1.7.0") \ 704 {\ 705 .driver = TYPE_USB_DEVICE,\ 706 .property = "msos-desc",\ 707 .value = "no",\ 708 },\ 709 {\ 710 .driver = "PIIX4_PM",\ 711 .property = "acpi-pci-hotplug-with-bridge-support",\ 712 .value = "off",\ 713 },\ 714 {\ 715 .driver = "hpet",\ 716 .property = HPET_INTCAP,\ 717 .value = stringify(4),\ 718 }, 719 720 #define PC_COMPAT_1_6 \ 721 PC_CPU_MODEL_IDS("1.6.0") \ 722 {\ 723 .driver = "e1000",\ 724 .property = "mitigation",\ 725 .value = "off",\ 726 },{\ 727 .driver = "qemu64-" TYPE_X86_CPU,\ 728 .property = "model",\ 729 .value = stringify(2),\ 730 },{\ 731 .driver = "qemu32-" TYPE_X86_CPU,\ 732 .property = "model",\ 733 .value = stringify(3),\ 734 },{\ 735 .driver = "i440FX-pcihost",\ 736 .property = "short_root_bus",\ 737 .value = stringify(1),\ 738 },{\ 739 .driver = "q35-pcihost",\ 740 .property = "short_root_bus",\ 741 .value = stringify(1),\ 742 }, 743 744 #define PC_COMPAT_1_5 \ 745 PC_CPU_MODEL_IDS("1.5.0") \ 746 {\ 747 .driver = "Conroe-" TYPE_X86_CPU,\ 748 .property = "model",\ 749 .value = stringify(2),\ 750 },{\ 751 .driver = "Conroe-" TYPE_X86_CPU,\ 752 .property = "level",\ 753 .value = stringify(2),\ 754 },{\ 755 .driver = "Penryn-" TYPE_X86_CPU,\ 756 .property = "model",\ 757 .value = stringify(2),\ 758 },{\ 759 .driver = "Penryn-" TYPE_X86_CPU,\ 760 .property = "level",\ 761 .value = stringify(2),\ 762 },{\ 763 .driver = "Nehalem-" TYPE_X86_CPU,\ 764 .property = "model",\ 765 .value = stringify(2),\ 766 },{\ 767 .driver = "Nehalem-" TYPE_X86_CPU,\ 768 .property = "level",\ 769 .value = stringify(2),\ 770 },{\ 771 .driver = "virtio-net-pci",\ 772 .property = "any_layout",\ 773 .value = "off",\ 774 },{\ 775 .driver = TYPE_X86_CPU,\ 776 .property = "pmu",\ 777 .value = "on",\ 778 },{\ 779 .driver = "i440FX-pcihost",\ 780 .property = "short_root_bus",\ 781 .value = stringify(0),\ 782 },{\ 783 .driver = "q35-pcihost",\ 784 .property = "short_root_bus",\ 785 .value = stringify(0),\ 786 }, 787 788 #define PC_COMPAT_1_4 \ 789 PC_CPU_MODEL_IDS("1.4.0") \ 790 {\ 791 .driver = "scsi-hd",\ 792 .property = "discard_granularity",\ 793 .value = stringify(0),\ 794 },{\ 795 .driver = "scsi-cd",\ 796 .property = "discard_granularity",\ 797 .value = stringify(0),\ 798 },{\ 799 .driver = "scsi-disk",\ 800 .property = "discard_granularity",\ 801 .value = stringify(0),\ 802 },{\ 803 .driver = "ide-hd",\ 804 .property = "discard_granularity",\ 805 .value = stringify(0),\ 806 },{\ 807 .driver = "ide-cd",\ 808 .property = "discard_granularity",\ 809 .value = stringify(0),\ 810 },{\ 811 .driver = "ide-drive",\ 812 .property = "discard_granularity",\ 813 .value = stringify(0),\ 814 },{\ 815 .driver = "virtio-blk-pci",\ 816 .property = "discard_granularity",\ 817 .value = stringify(0),\ 818 },{\ 819 .driver = "virtio-serial-pci",\ 820 .property = "vectors",\ 821 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 822 .value = stringify(0xFFFFFFFF),\ 823 },{ \ 824 .driver = "virtio-net-pci", \ 825 .property = "ctrl_guest_offloads", \ 826 .value = "off", \ 827 },{\ 828 .driver = "e1000",\ 829 .property = "romfile",\ 830 .value = "pxe-e1000.rom",\ 831 },{\ 832 .driver = "ne2k_pci",\ 833 .property = "romfile",\ 834 .value = "pxe-ne2k_pci.rom",\ 835 },{\ 836 .driver = "pcnet",\ 837 .property = "romfile",\ 838 .value = "pxe-pcnet.rom",\ 839 },{\ 840 .driver = "rtl8139",\ 841 .property = "romfile",\ 842 .value = "pxe-rtl8139.rom",\ 843 },{\ 844 .driver = "virtio-net-pci",\ 845 .property = "romfile",\ 846 .value = "pxe-virtio.rom",\ 847 },{\ 848 .driver = "486-" TYPE_X86_CPU,\ 849 .property = "model",\ 850 .value = stringify(0),\ 851 },\ 852 {\ 853 .driver = "n270" "-" TYPE_X86_CPU,\ 854 .property = "movbe",\ 855 .value = "off",\ 856 },\ 857 {\ 858 .driver = "Westmere" "-" TYPE_X86_CPU,\ 859 .property = "pclmulqdq",\ 860 .value = "off",\ 861 }, 862 863 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 864 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 865 { \ 866 MachineClass *mc = MACHINE_CLASS(oc); \ 867 optsfn(mc); \ 868 mc->name = namestr; \ 869 mc->init = initfn; \ 870 } \ 871 static const TypeInfo pc_machine_type_##suffix = { \ 872 .name = namestr TYPE_MACHINE_SUFFIX, \ 873 .parent = TYPE_PC_MACHINE, \ 874 .class_init = pc_machine_##suffix##_class_init, \ 875 }; \ 876 static void pc_machine_init_##suffix(void) \ 877 { \ 878 type_register(&pc_machine_type_##suffix); \ 879 } \ 880 type_init(pc_machine_init_##suffix) 881 882 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 883 #endif 884