1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "qemu/typedefs.h" 6 #include "exec/memory.h" 7 #include "hw/boards.h" 8 #include "hw/isa/isa.h" 9 #include "hw/block/fdc.h" 10 #include "net/net.h" 11 #include "hw/i386/ioapic.h" 12 13 #include "qemu/range.h" 14 #include "qemu/bitmap.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/pci/pci.h" 17 #include "hw/boards.h" 18 #include "hw/compat.h" 19 #include "hw/mem/pc-dimm.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 #ifdef CONFIG_KVM 24 #define kvm_pit_in_kernel() \ 25 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 26 #define kvm_pic_in_kernel() \ 27 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 28 #define kvm_ioapic_in_kernel() \ 29 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 30 #else 31 #define kvm_pit_in_kernel() 0 32 #define kvm_pic_in_kernel() 0 33 #define kvm_ioapic_in_kernel() 0 34 #endif 35 36 /** 37 * PCMachineState: 38 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 39 */ 40 struct PCMachineState { 41 /*< private >*/ 42 MachineState parent_obj; 43 44 /* <public> */ 45 46 /* State for other subsystems/APIs: */ 47 MemoryHotplugState hotplug_memory; 48 Notifier machine_done; 49 50 /* Pointers to devices and objects: */ 51 HotplugHandler *acpi_dev; 52 ISADevice *rtc; 53 PCIBus *bus; 54 FWCfgState *fw_cfg; 55 56 /* Configuration options: */ 57 uint64_t max_ram_below_4g; 58 OnOffAuto vmport; 59 OnOffAuto smm; 60 bool nvdimm; 61 62 /* RAM information (sizes, addresses, configuration): */ 63 ram_addr_t below_4g_mem_size, above_4g_mem_size; 64 65 /* CPU and apic information: */ 66 bool apic_xrupt_override; 67 unsigned apic_id_limit; 68 69 /* NUMA information: */ 70 uint64_t numa_nodes; 71 uint64_t *node_mem; 72 uint64_t *node_cpu; 73 }; 74 75 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 76 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 77 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 78 #define PC_MACHINE_VMPORT "vmport" 79 #define PC_MACHINE_SMM "smm" 80 #define PC_MACHINE_NVDIMM "nvdimm" 81 82 /** 83 * PCMachineClass: 84 * 85 * Methods: 86 * 87 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 88 * 89 * Compat fields: 90 * 91 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 92 * backend's alignment value if provided 93 * @acpi_data_size: Size of the chunk of memory at the top of RAM 94 * for the BIOS ACPI tables and other BIOS 95 * datastructures. 96 * @gigabyte_align: Make sure that guest addresses aligned at 97 * 1Gbyte boundaries get mapped to host 98 * addresses aligned at 1Gbyte boundaries. This 99 * way we can use 1GByte pages in the host. 100 * 101 */ 102 struct PCMachineClass { 103 /*< private >*/ 104 MachineClass parent_class; 105 106 /*< public >*/ 107 108 /* Methods: */ 109 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 110 DeviceState *dev); 111 112 /* Device configuration: */ 113 bool pci_enabled; 114 bool kvmclock_enabled; 115 116 /* Compat options: */ 117 118 /* ACPI compat: */ 119 bool has_acpi_build; 120 bool rsdp_in_ram; 121 int legacy_acpi_table_size; 122 unsigned acpi_data_size; 123 124 /* SMBIOS compat: */ 125 bool smbios_defaults; 126 bool smbios_legacy_mode; 127 bool smbios_uuid_encoded; 128 129 /* RAM / address space compat: */ 130 bool gigabyte_align; 131 bool has_reserved_memory; 132 bool enforce_aligned_dimm; 133 bool broken_reserved_end; 134 135 /* TSC rate migration: */ 136 bool save_tsc_khz; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* PC-style peripherals (also used by other machines). */ 148 149 typedef struct PcPciInfo { 150 Range w32; 151 Range w64; 152 } PcPciInfo; 153 154 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 155 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 156 #define ACPI_PM_PROP_S4_VAL "s4_val" 157 #define ACPI_PM_PROP_SCI_INT "sci_int" 158 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 159 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 160 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 161 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 162 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 163 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 164 165 /* parallel.c */ 166 167 void parallel_hds_isa_init(ISABus *bus, int n); 168 169 bool parallel_mm_init(MemoryRegion *address_space, 170 hwaddr base, int it_shift, qemu_irq irq, 171 CharDriverState *chr); 172 173 /* i8259.c */ 174 175 extern DeviceState *isa_pic; 176 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 177 qemu_irq *kvm_i8259_init(ISABus *bus); 178 int pic_read_irq(DeviceState *d); 179 int pic_get_output(DeviceState *d); 180 void hmp_info_pic(Monitor *mon, const QDict *qdict); 181 void hmp_info_irq(Monitor *mon, const QDict *qdict); 182 183 /* ioapic.c */ 184 185 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 186 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 187 188 /* Global System Interrupts */ 189 190 #define GSI_NUM_PINS IOAPIC_NUM_PINS 191 192 typedef struct GSIState { 193 qemu_irq i8259_irq[ISA_NUM_IRQS]; 194 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 195 } GSIState; 196 197 void gsi_handler(void *opaque, int n, int level); 198 199 /* vmport.c */ 200 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 201 202 static inline void vmport_init(ISABus *bus) 203 { 204 isa_create_simple(bus, "vmport"); 205 } 206 207 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 208 void vmmouse_get_data(uint32_t *data); 209 void vmmouse_set_data(const uint32_t *data); 210 211 /* pckbd.c */ 212 213 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 214 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 215 MemoryRegion *region, ram_addr_t size, 216 hwaddr mask); 217 void i8042_isa_mouse_fake_event(void *opaque); 218 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 219 220 /* pc.c */ 221 extern int fd_bootchk; 222 223 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 224 void pc_register_ferr_irq(qemu_irq irq); 225 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 226 227 void pc_cpus_init(PCMachineState *pcms); 228 void pc_hot_add_cpu(const int64_t id, Error **errp); 229 void pc_acpi_init(const char *default_dsdt); 230 231 void pc_guest_info_init(PCMachineState *pcms); 232 233 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 234 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 235 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 236 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 237 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 238 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 239 240 241 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 242 MemoryRegion *pci_address_space); 243 244 void xen_load_linux(PCMachineState *pcms); 245 void pc_memory_init(PCMachineState *pcms, 246 MemoryRegion *system_memory, 247 MemoryRegion *rom_memory, 248 MemoryRegion **ram_memory); 249 qemu_irq pc_allocate_cpu_irq(void); 250 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 251 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 252 ISADevice **rtc_state, 253 bool create_fdctrl, 254 bool no_vmport, 255 uint32_t hpet_irqs); 256 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 257 void pc_cmos_init(PCMachineState *pcms, 258 BusState *ide0, BusState *ide1, 259 ISADevice *s); 260 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 261 void pc_pci_device_init(PCIBus *pci_bus); 262 263 typedef void (*cpu_set_smm_t)(int smm, void *arg); 264 265 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 266 267 ISADevice *pc_find_fdc0(void); 268 269 /* acpi_piix.c */ 270 271 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 272 qemu_irq sci_irq, qemu_irq smi_irq, 273 int smm_enabled, DeviceState **piix4_pm); 274 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 275 276 /* hpet.c */ 277 extern int no_hpet; 278 279 /* piix_pci.c */ 280 struct PCII440FXState; 281 typedef struct PCII440FXState PCII440FXState; 282 283 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 284 #define TYPE_I440FX_PCI_DEVICE "i440FX" 285 286 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 287 288 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 289 PCII440FXState **pi440fx_state, int *piix_devfn, 290 ISABus **isa_bus, qemu_irq *pic, 291 MemoryRegion *address_space_mem, 292 MemoryRegion *address_space_io, 293 ram_addr_t ram_size, 294 ram_addr_t below_4g_mem_size, 295 ram_addr_t above_4g_mem_size, 296 MemoryRegion *pci_memory, 297 MemoryRegion *ram_memory); 298 299 PCIBus *find_i440fx(void); 300 /* piix4.c */ 301 extern PCIDevice *piix4_dev; 302 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 303 304 /* vga.c */ 305 enum vga_retrace_method { 306 VGA_RETRACE_DUMB, 307 VGA_RETRACE_PRECISE 308 }; 309 310 extern enum vga_retrace_method vga_retrace_method; 311 312 int isa_vga_mm_init(hwaddr vram_base, 313 hwaddr ctrl_base, int it_shift, 314 MemoryRegion *address_space); 315 316 /* ne2000.c */ 317 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 318 { 319 DeviceState *dev; 320 ISADevice *isadev; 321 322 qemu_check_nic_model(nd, "ne2k_isa"); 323 324 isadev = isa_try_create(bus, "ne2k_isa"); 325 if (!isadev) { 326 return false; 327 } 328 dev = DEVICE(isadev); 329 qdev_prop_set_uint32(dev, "iobase", base); 330 qdev_prop_set_uint32(dev, "irq", irq); 331 qdev_set_nic_properties(dev, nd); 332 qdev_init_nofail(dev); 333 return true; 334 } 335 336 /* pc_sysfw.c */ 337 void pc_system_firmware_init(MemoryRegion *rom_memory, 338 bool isapc_ram_fw); 339 340 /* pvpanic.c */ 341 uint16_t pvpanic_port(void); 342 343 /* e820 types */ 344 #define E820_RAM 1 345 #define E820_RESERVED 2 346 #define E820_ACPI 3 347 #define E820_NVS 4 348 #define E820_UNUSABLE 5 349 350 int e820_add_entry(uint64_t, uint64_t, uint32_t); 351 int e820_get_num_entries(void); 352 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 353 354 #define PC_COMPAT_2_5 \ 355 HW_COMPAT_2_5 356 357 #define PC_COMPAT_2_4 \ 358 PC_COMPAT_2_5 \ 359 HW_COMPAT_2_4 \ 360 {\ 361 .driver = "Haswell-" TYPE_X86_CPU,\ 362 .property = "abm",\ 363 .value = "off",\ 364 },\ 365 {\ 366 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 367 .property = "abm",\ 368 .value = "off",\ 369 },\ 370 {\ 371 .driver = "Broadwell-" TYPE_X86_CPU,\ 372 .property = "abm",\ 373 .value = "off",\ 374 },\ 375 {\ 376 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 377 .property = "abm",\ 378 .value = "off",\ 379 },\ 380 {\ 381 .driver = "host" "-" TYPE_X86_CPU,\ 382 .property = "host-cache-info",\ 383 .value = "on",\ 384 },\ 385 {\ 386 .driver = TYPE_X86_CPU,\ 387 .property = "check",\ 388 .value = "off",\ 389 },\ 390 {\ 391 .driver = "qemu64" "-" TYPE_X86_CPU,\ 392 .property = "sse4a",\ 393 .value = "on",\ 394 },\ 395 {\ 396 .driver = "qemu64" "-" TYPE_X86_CPU,\ 397 .property = "abm",\ 398 .value = "on",\ 399 },\ 400 {\ 401 .driver = "qemu64" "-" TYPE_X86_CPU,\ 402 .property = "popcnt",\ 403 .value = "on",\ 404 },\ 405 {\ 406 .driver = "qemu32" "-" TYPE_X86_CPU,\ 407 .property = "popcnt",\ 408 .value = "on",\ 409 },{\ 410 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 411 .property = "rdtscp",\ 412 .value = "on",\ 413 },{\ 414 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 415 .property = "rdtscp",\ 416 .value = "on",\ 417 },{\ 418 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 419 .property = "rdtscp",\ 420 .value = "on",\ 421 },{\ 422 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 423 .property = "rdtscp",\ 424 .value = "on",\ 425 }, 426 427 428 #define PC_COMPAT_2_3 \ 429 PC_COMPAT_2_4 \ 430 HW_COMPAT_2_3 \ 431 {\ 432 .driver = TYPE_X86_CPU,\ 433 .property = "arat",\ 434 .value = "off",\ 435 },{\ 436 .driver = "qemu64" "-" TYPE_X86_CPU,\ 437 .property = "level",\ 438 .value = stringify(4),\ 439 },{\ 440 .driver = "kvm64" "-" TYPE_X86_CPU,\ 441 .property = "level",\ 442 .value = stringify(5),\ 443 },{\ 444 .driver = "pentium3" "-" TYPE_X86_CPU,\ 445 .property = "level",\ 446 .value = stringify(2),\ 447 },{\ 448 .driver = "n270" "-" TYPE_X86_CPU,\ 449 .property = "level",\ 450 .value = stringify(5),\ 451 },{\ 452 .driver = "Conroe" "-" TYPE_X86_CPU,\ 453 .property = "level",\ 454 .value = stringify(4),\ 455 },{\ 456 .driver = "Penryn" "-" TYPE_X86_CPU,\ 457 .property = "level",\ 458 .value = stringify(4),\ 459 },{\ 460 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 461 .property = "level",\ 462 .value = stringify(4),\ 463 },{\ 464 .driver = "n270" "-" TYPE_X86_CPU,\ 465 .property = "xlevel",\ 466 .value = stringify(0x8000000a),\ 467 },{\ 468 .driver = "Penryn" "-" TYPE_X86_CPU,\ 469 .property = "xlevel",\ 470 .value = stringify(0x8000000a),\ 471 },{\ 472 .driver = "Conroe" "-" TYPE_X86_CPU,\ 473 .property = "xlevel",\ 474 .value = stringify(0x8000000a),\ 475 },{\ 476 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 477 .property = "xlevel",\ 478 .value = stringify(0x8000000a),\ 479 },{\ 480 .driver = "Westmere" "-" TYPE_X86_CPU,\ 481 .property = "xlevel",\ 482 .value = stringify(0x8000000a),\ 483 },{\ 484 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 485 .property = "xlevel",\ 486 .value = stringify(0x8000000a),\ 487 },{\ 488 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 489 .property = "xlevel",\ 490 .value = stringify(0x8000000a),\ 491 },{\ 492 .driver = "Haswell" "-" TYPE_X86_CPU,\ 493 .property = "xlevel",\ 494 .value = stringify(0x8000000a),\ 495 },{\ 496 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 497 .property = "xlevel",\ 498 .value = stringify(0x8000000a),\ 499 },{\ 500 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 501 .property = "xlevel",\ 502 .value = stringify(0x8000000a),\ 503 },{\ 504 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 505 .property = "xlevel",\ 506 .value = stringify(0x8000000a),\ 507 }, 508 509 #define PC_COMPAT_2_2 \ 510 PC_COMPAT_2_3 \ 511 HW_COMPAT_2_2 \ 512 {\ 513 .driver = "kvm64" "-" TYPE_X86_CPU,\ 514 .property = "vme",\ 515 .value = "off",\ 516 },\ 517 {\ 518 .driver = "kvm32" "-" TYPE_X86_CPU,\ 519 .property = "vme",\ 520 .value = "off",\ 521 },\ 522 {\ 523 .driver = "Conroe" "-" TYPE_X86_CPU,\ 524 .property = "vme",\ 525 .value = "off",\ 526 },\ 527 {\ 528 .driver = "Penryn" "-" TYPE_X86_CPU,\ 529 .property = "vme",\ 530 .value = "off",\ 531 },\ 532 {\ 533 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 534 .property = "vme",\ 535 .value = "off",\ 536 },\ 537 {\ 538 .driver = "Westmere" "-" TYPE_X86_CPU,\ 539 .property = "vme",\ 540 .value = "off",\ 541 },\ 542 {\ 543 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 544 .property = "vme",\ 545 .value = "off",\ 546 },\ 547 {\ 548 .driver = "Haswell" "-" TYPE_X86_CPU,\ 549 .property = "vme",\ 550 .value = "off",\ 551 },\ 552 {\ 553 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 554 .property = "vme",\ 555 .value = "off",\ 556 },\ 557 {\ 558 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 559 .property = "vme",\ 560 .value = "off",\ 561 },\ 562 {\ 563 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 564 .property = "vme",\ 565 .value = "off",\ 566 },\ 567 {\ 568 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 569 .property = "vme",\ 570 .value = "off",\ 571 },\ 572 {\ 573 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 574 .property = "vme",\ 575 .value = "off",\ 576 },\ 577 {\ 578 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 579 .property = "vme",\ 580 .value = "off",\ 581 },\ 582 {\ 583 .driver = "Haswell" "-" TYPE_X86_CPU,\ 584 .property = "f16c",\ 585 .value = "off",\ 586 },\ 587 {\ 588 .driver = "Haswell" "-" TYPE_X86_CPU,\ 589 .property = "rdrand",\ 590 .value = "off",\ 591 },\ 592 {\ 593 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 594 .property = "f16c",\ 595 .value = "off",\ 596 },\ 597 {\ 598 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 599 .property = "rdrand",\ 600 .value = "off",\ 601 }, 602 603 #define PC_COMPAT_2_1 \ 604 PC_COMPAT_2_2 \ 605 HW_COMPAT_2_1 \ 606 {\ 607 .driver = "coreduo" "-" TYPE_X86_CPU,\ 608 .property = "vmx",\ 609 .value = "on",\ 610 },\ 611 {\ 612 .driver = "core2duo" "-" TYPE_X86_CPU,\ 613 .property = "vmx",\ 614 .value = "on",\ 615 }, 616 617 #define PC_COMPAT_2_0 \ 618 PC_COMPAT_2_1 \ 619 {\ 620 .driver = "virtio-scsi-pci",\ 621 .property = "any_layout",\ 622 .value = "off",\ 623 },{\ 624 .driver = "PIIX4_PM",\ 625 .property = "memory-hotplug-support",\ 626 .value = "off",\ 627 },\ 628 {\ 629 .driver = "apic",\ 630 .property = "version",\ 631 .value = stringify(0x11),\ 632 },\ 633 {\ 634 .driver = "nec-usb-xhci",\ 635 .property = "superspeed-ports-first",\ 636 .value = "off",\ 637 },\ 638 {\ 639 .driver = "nec-usb-xhci",\ 640 .property = "force-pcie-endcap",\ 641 .value = "on",\ 642 },\ 643 {\ 644 .driver = "pci-serial",\ 645 .property = "prog_if",\ 646 .value = stringify(0),\ 647 },\ 648 {\ 649 .driver = "pci-serial-2x",\ 650 .property = "prog_if",\ 651 .value = stringify(0),\ 652 },\ 653 {\ 654 .driver = "pci-serial-4x",\ 655 .property = "prog_if",\ 656 .value = stringify(0),\ 657 },\ 658 {\ 659 .driver = "virtio-net-pci",\ 660 .property = "guest_announce",\ 661 .value = "off",\ 662 },\ 663 {\ 664 .driver = "ICH9-LPC",\ 665 .property = "memory-hotplug-support",\ 666 .value = "off",\ 667 },{\ 668 .driver = "xio3130-downstream",\ 669 .property = COMPAT_PROP_PCP,\ 670 .value = "off",\ 671 },{\ 672 .driver = "ioh3420",\ 673 .property = COMPAT_PROP_PCP,\ 674 .value = "off",\ 675 }, 676 677 #define PC_COMPAT_1_7 \ 678 PC_COMPAT_2_0 \ 679 {\ 680 .driver = TYPE_USB_DEVICE,\ 681 .property = "msos-desc",\ 682 .value = "no",\ 683 },\ 684 {\ 685 .driver = "PIIX4_PM",\ 686 .property = "acpi-pci-hotplug-with-bridge-support",\ 687 .value = "off",\ 688 },\ 689 {\ 690 .driver = "hpet",\ 691 .property = HPET_INTCAP,\ 692 .value = stringify(4),\ 693 }, 694 695 #define PC_COMPAT_1_6 \ 696 PC_COMPAT_1_7 \ 697 {\ 698 .driver = "e1000",\ 699 .property = "mitigation",\ 700 .value = "off",\ 701 },{\ 702 .driver = "qemu64-" TYPE_X86_CPU,\ 703 .property = "model",\ 704 .value = stringify(2),\ 705 },{\ 706 .driver = "qemu32-" TYPE_X86_CPU,\ 707 .property = "model",\ 708 .value = stringify(3),\ 709 },{\ 710 .driver = "i440FX-pcihost",\ 711 .property = "short_root_bus",\ 712 .value = stringify(1),\ 713 },{\ 714 .driver = "q35-pcihost",\ 715 .property = "short_root_bus",\ 716 .value = stringify(1),\ 717 }, 718 719 #define PC_COMPAT_1_5 \ 720 PC_COMPAT_1_6 \ 721 {\ 722 .driver = "Conroe-" TYPE_X86_CPU,\ 723 .property = "model",\ 724 .value = stringify(2),\ 725 },{\ 726 .driver = "Conroe-" TYPE_X86_CPU,\ 727 .property = "level",\ 728 .value = stringify(2),\ 729 },{\ 730 .driver = "Penryn-" TYPE_X86_CPU,\ 731 .property = "model",\ 732 .value = stringify(2),\ 733 },{\ 734 .driver = "Penryn-" TYPE_X86_CPU,\ 735 .property = "level",\ 736 .value = stringify(2),\ 737 },{\ 738 .driver = "Nehalem-" TYPE_X86_CPU,\ 739 .property = "model",\ 740 .value = stringify(2),\ 741 },{\ 742 .driver = "Nehalem-" TYPE_X86_CPU,\ 743 .property = "level",\ 744 .value = stringify(2),\ 745 },{\ 746 .driver = "virtio-net-pci",\ 747 .property = "any_layout",\ 748 .value = "off",\ 749 },{\ 750 .driver = TYPE_X86_CPU,\ 751 .property = "pmu",\ 752 .value = "on",\ 753 },{\ 754 .driver = "i440FX-pcihost",\ 755 .property = "short_root_bus",\ 756 .value = stringify(0),\ 757 },{\ 758 .driver = "q35-pcihost",\ 759 .property = "short_root_bus",\ 760 .value = stringify(0),\ 761 }, 762 763 #define PC_COMPAT_1_4 \ 764 PC_COMPAT_1_5 \ 765 {\ 766 .driver = "scsi-hd",\ 767 .property = "discard_granularity",\ 768 .value = stringify(0),\ 769 },{\ 770 .driver = "scsi-cd",\ 771 .property = "discard_granularity",\ 772 .value = stringify(0),\ 773 },{\ 774 .driver = "scsi-disk",\ 775 .property = "discard_granularity",\ 776 .value = stringify(0),\ 777 },{\ 778 .driver = "ide-hd",\ 779 .property = "discard_granularity",\ 780 .value = stringify(0),\ 781 },{\ 782 .driver = "ide-cd",\ 783 .property = "discard_granularity",\ 784 .value = stringify(0),\ 785 },{\ 786 .driver = "ide-drive",\ 787 .property = "discard_granularity",\ 788 .value = stringify(0),\ 789 },{\ 790 .driver = "virtio-blk-pci",\ 791 .property = "discard_granularity",\ 792 .value = stringify(0),\ 793 },{\ 794 .driver = "virtio-serial-pci",\ 795 .property = "vectors",\ 796 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 797 .value = stringify(0xFFFFFFFF),\ 798 },{ \ 799 .driver = "virtio-net-pci", \ 800 .property = "ctrl_guest_offloads", \ 801 .value = "off", \ 802 },{\ 803 .driver = "e1000",\ 804 .property = "romfile",\ 805 .value = "pxe-e1000.rom",\ 806 },{\ 807 .driver = "ne2k_pci",\ 808 .property = "romfile",\ 809 .value = "pxe-ne2k_pci.rom",\ 810 },{\ 811 .driver = "pcnet",\ 812 .property = "romfile",\ 813 .value = "pxe-pcnet.rom",\ 814 },{\ 815 .driver = "rtl8139",\ 816 .property = "romfile",\ 817 .value = "pxe-rtl8139.rom",\ 818 },{\ 819 .driver = "virtio-net-pci",\ 820 .property = "romfile",\ 821 .value = "pxe-virtio.rom",\ 822 },{\ 823 .driver = "486-" TYPE_X86_CPU,\ 824 .property = "model",\ 825 .value = stringify(0),\ 826 },\ 827 {\ 828 .driver = "n270" "-" TYPE_X86_CPU,\ 829 .property = "movbe",\ 830 .value = "off",\ 831 },\ 832 {\ 833 .driver = "Westmere" "-" TYPE_X86_CPU,\ 834 .property = "pclmulqdq",\ 835 .value = "off",\ 836 }, 837 838 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 839 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 840 { \ 841 MachineClass *mc = MACHINE_CLASS(oc); \ 842 optsfn(mc); \ 843 mc->name = namestr; \ 844 mc->init = initfn; \ 845 } \ 846 static const TypeInfo pc_machine_type_##suffix = { \ 847 .name = namestr TYPE_MACHINE_SUFFIX, \ 848 .parent = TYPE_PC_MACHINE, \ 849 .class_init = pc_machine_##suffix##_class_init, \ 850 }; \ 851 static void pc_machine_init_##suffix(void) \ 852 { \ 853 type_register(&pc_machine_type_##suffix); \ 854 } \ 855 machine_init(pc_machine_init_##suffix) 856 857 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 858 #endif 859