1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 #include "hw/compat.h" 18 19 #define HPET_INTCAP "hpet-intcap" 20 21 /** 22 * PCMachineState: 23 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 24 * address space begins. 25 * @hotplug_memory: hotplug memory addess space container 26 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 27 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 28 * backend's alignment value if provided 29 */ 30 struct PCMachineState { 31 /*< private >*/ 32 MachineState parent_obj; 33 34 /* <public> */ 35 ram_addr_t hotplug_memory_base; 36 MemoryRegion hotplug_memory; 37 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 41 uint64_t max_ram_below_4g; 42 OnOffAuto vmport; 43 bool enforce_aligned_dimm; 44 }; 45 46 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 47 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 48 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 49 #define PC_MACHINE_VMPORT "vmport" 50 #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm" 51 52 /** 53 * PCMachineClass: 54 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 55 */ 56 struct PCMachineClass { 57 /*< private >*/ 58 MachineClass parent_class; 59 60 /*< public >*/ 61 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 62 DeviceState *dev); 63 }; 64 65 typedef struct PCMachineState PCMachineState; 66 typedef struct PCMachineClass PCMachineClass; 67 68 #define TYPE_PC_MACHINE "generic-pc-machine" 69 #define PC_MACHINE(obj) \ 70 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 71 #define PC_MACHINE_GET_CLASS(obj) \ 72 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 73 #define PC_MACHINE_CLASS(klass) \ 74 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 75 76 /* PC-style peripherals (also used by other machines). */ 77 78 typedef struct PcPciInfo { 79 Range w32; 80 Range w64; 81 } PcPciInfo; 82 83 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 84 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 85 #define ACPI_PM_PROP_S4_VAL "s4_val" 86 #define ACPI_PM_PROP_SCI_INT "sci_int" 87 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 88 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 89 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 90 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 91 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 92 93 struct PcGuestInfo { 94 bool isapc_ram_fw; 95 hwaddr ram_size, ram_size_below_4g; 96 unsigned apic_id_limit; 97 bool apic_xrupt_override; 98 uint64_t numa_nodes; 99 uint64_t *node_mem; 100 uint64_t *node_cpu; 101 FWCfgState *fw_cfg; 102 int legacy_acpi_table_size; 103 bool has_acpi_build; 104 bool has_reserved_memory; 105 bool rsdp_in_ram; 106 }; 107 108 /* parallel.c */ 109 110 void parallel_hds_isa_init(ISABus *bus, int n); 111 112 bool parallel_mm_init(MemoryRegion *address_space, 113 hwaddr base, int it_shift, qemu_irq irq, 114 CharDriverState *chr); 115 116 /* i8259.c */ 117 118 extern DeviceState *isa_pic; 119 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 120 qemu_irq *kvm_i8259_init(ISABus *bus); 121 int pic_read_irq(DeviceState *d); 122 int pic_get_output(DeviceState *d); 123 void hmp_info_pic(Monitor *mon, const QDict *qdict); 124 void hmp_info_irq(Monitor *mon, const QDict *qdict); 125 126 /* Global System Interrupts */ 127 128 #define GSI_NUM_PINS IOAPIC_NUM_PINS 129 130 typedef struct GSIState { 131 qemu_irq i8259_irq[ISA_NUM_IRQS]; 132 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 133 } GSIState; 134 135 void gsi_handler(void *opaque, int n, int level); 136 137 /* vmport.c */ 138 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 139 140 static inline void vmport_init(ISABus *bus) 141 { 142 isa_create_simple(bus, "vmport"); 143 } 144 145 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 146 void vmmouse_get_data(uint32_t *data); 147 void vmmouse_set_data(const uint32_t *data); 148 149 /* pckbd.c */ 150 151 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 152 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 153 MemoryRegion *region, ram_addr_t size, 154 hwaddr mask); 155 void i8042_isa_mouse_fake_event(void *opaque); 156 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 157 158 /* pc.c */ 159 extern int fd_bootchk; 160 161 void pc_register_ferr_irq(qemu_irq irq); 162 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 163 164 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 165 void pc_hot_add_cpu(const int64_t id, Error **errp); 166 void pc_acpi_init(const char *default_dsdt); 167 168 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 169 ram_addr_t above_4g_mem_size); 170 171 void pc_set_legacy_acpi_data_size(void); 172 173 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 174 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 175 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 176 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 177 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 178 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 179 180 181 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 182 MemoryRegion *pci_address_space); 183 184 FWCfgState *xen_load_linux(const char *kernel_filename, 185 const char *kernel_cmdline, 186 const char *initrd_filename, 187 ram_addr_t below_4g_mem_size, 188 PcGuestInfo *guest_info); 189 FWCfgState *pc_memory_init(MachineState *machine, 190 MemoryRegion *system_memory, 191 ram_addr_t below_4g_mem_size, 192 ram_addr_t above_4g_mem_size, 193 MemoryRegion *rom_memory, 194 MemoryRegion **ram_memory, 195 PcGuestInfo *guest_info); 196 qemu_irq pc_allocate_cpu_irq(void); 197 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 198 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 199 ISADevice **rtc_state, 200 bool create_fdctrl, 201 ISADevice **floppy, 202 bool no_vmport, 203 uint32 hpet_irqs); 204 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 205 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 206 const char *boot_device, MachineState *machine, 207 ISADevice *floppy, BusState *ide0, BusState *ide1, 208 ISADevice *s); 209 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 210 void pc_pci_device_init(PCIBus *pci_bus); 211 212 typedef void (*cpu_set_smm_t)(int smm, void *arg); 213 214 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 215 216 /* acpi_piix.c */ 217 218 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 219 qemu_irq sci_irq, qemu_irq smi_irq, 220 int kvm_enabled, DeviceState **piix4_pm); 221 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 222 223 /* hpet.c */ 224 extern int no_hpet; 225 226 /* piix_pci.c */ 227 struct PCII440FXState; 228 typedef struct PCII440FXState PCII440FXState; 229 230 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 231 ISABus **isa_bus, qemu_irq *pic, 232 MemoryRegion *address_space_mem, 233 MemoryRegion *address_space_io, 234 ram_addr_t ram_size, 235 ram_addr_t below_4g_mem_size, 236 ram_addr_t above_4g_mem_size, 237 MemoryRegion *pci_memory, 238 MemoryRegion *ram_memory); 239 240 PCIBus *find_i440fx(void); 241 /* piix4.c */ 242 extern PCIDevice *piix4_dev; 243 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 244 245 /* vga.c */ 246 enum vga_retrace_method { 247 VGA_RETRACE_DUMB, 248 VGA_RETRACE_PRECISE 249 }; 250 251 extern enum vga_retrace_method vga_retrace_method; 252 253 int isa_vga_mm_init(hwaddr vram_base, 254 hwaddr ctrl_base, int it_shift, 255 MemoryRegion *address_space); 256 257 /* ne2000.c */ 258 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 259 { 260 DeviceState *dev; 261 ISADevice *isadev; 262 263 qemu_check_nic_model(nd, "ne2k_isa"); 264 265 isadev = isa_try_create(bus, "ne2k_isa"); 266 if (!isadev) { 267 return false; 268 } 269 dev = DEVICE(isadev); 270 qdev_prop_set_uint32(dev, "iobase", base); 271 qdev_prop_set_uint32(dev, "irq", irq); 272 qdev_set_nic_properties(dev, nd); 273 qdev_init_nofail(dev); 274 return true; 275 } 276 277 /* pc_sysfw.c */ 278 void pc_system_firmware_init(MemoryRegion *rom_memory, 279 bool isapc_ram_fw); 280 281 /* pvpanic.c */ 282 uint16_t pvpanic_port(void); 283 284 /* e820 types */ 285 #define E820_RAM 1 286 #define E820_RESERVED 2 287 #define E820_ACPI 3 288 #define E820_NVS 4 289 #define E820_UNUSABLE 5 290 291 int e820_add_entry(uint64_t, uint64_t, uint32_t); 292 int e820_get_num_entries(void); 293 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 294 295 #define PC_COMPAT_2_3 \ 296 HW_COMPAT_2_3 297 298 #define PC_COMPAT_2_2 \ 299 PC_COMPAT_2_3 \ 300 HW_COMPAT_2_2 301 302 #define PC_COMPAT_2_1 \ 303 PC_COMPAT_2_2 \ 304 HW_COMPAT_2_1 305 306 #define PC_COMPAT_2_0 \ 307 PC_COMPAT_2_1 \ 308 {\ 309 .driver = "virtio-scsi-pci",\ 310 .property = "any_layout",\ 311 .value = "off",\ 312 },{\ 313 .driver = "PIIX4_PM",\ 314 .property = "memory-hotplug-support",\ 315 .value = "off",\ 316 },\ 317 {\ 318 .driver = "apic",\ 319 .property = "version",\ 320 .value = stringify(0x11),\ 321 },\ 322 {\ 323 .driver = "nec-usb-xhci",\ 324 .property = "superspeed-ports-first",\ 325 .value = "off",\ 326 },\ 327 {\ 328 .driver = "nec-usb-xhci",\ 329 .property = "force-pcie-endcap",\ 330 .value = "on",\ 331 },\ 332 {\ 333 .driver = "pci-serial",\ 334 .property = "prog_if",\ 335 .value = stringify(0),\ 336 },\ 337 {\ 338 .driver = "pci-serial-2x",\ 339 .property = "prog_if",\ 340 .value = stringify(0),\ 341 },\ 342 {\ 343 .driver = "pci-serial-4x",\ 344 .property = "prog_if",\ 345 .value = stringify(0),\ 346 },\ 347 {\ 348 .driver = "virtio-net-pci",\ 349 .property = "guest_announce",\ 350 .value = "off",\ 351 },\ 352 {\ 353 .driver = "ICH9-LPC",\ 354 .property = "memory-hotplug-support",\ 355 .value = "off",\ 356 },{\ 357 .driver = "xio3130-downstream",\ 358 .property = COMPAT_PROP_PCP,\ 359 .value = "off",\ 360 },{\ 361 .driver = "ioh3420",\ 362 .property = COMPAT_PROP_PCP,\ 363 .value = "off",\ 364 }, 365 366 #define PC_COMPAT_1_7 \ 367 PC_COMPAT_2_0 \ 368 {\ 369 .driver = TYPE_USB_DEVICE,\ 370 .property = "msos-desc",\ 371 .value = "no",\ 372 },\ 373 {\ 374 .driver = "PIIX4_PM",\ 375 .property = "acpi-pci-hotplug-with-bridge-support",\ 376 .value = "off",\ 377 },\ 378 {\ 379 .driver = "hpet",\ 380 .property = HPET_INTCAP,\ 381 .value = stringify(4),\ 382 }, 383 384 #define PC_COMPAT_1_6 \ 385 PC_COMPAT_1_7 \ 386 {\ 387 .driver = "e1000",\ 388 .property = "mitigation",\ 389 .value = "off",\ 390 },{\ 391 .driver = "qemu64-" TYPE_X86_CPU,\ 392 .property = "model",\ 393 .value = stringify(2),\ 394 },{\ 395 .driver = "qemu32-" TYPE_X86_CPU,\ 396 .property = "model",\ 397 .value = stringify(3),\ 398 },{\ 399 .driver = "i440FX-pcihost",\ 400 .property = "short_root_bus",\ 401 .value = stringify(1),\ 402 },{\ 403 .driver = "q35-pcihost",\ 404 .property = "short_root_bus",\ 405 .value = stringify(1),\ 406 }, 407 408 #define PC_COMPAT_1_5 \ 409 PC_COMPAT_1_6 \ 410 {\ 411 .driver = "Conroe-" TYPE_X86_CPU,\ 412 .property = "model",\ 413 .value = stringify(2),\ 414 },{\ 415 .driver = "Conroe-" TYPE_X86_CPU,\ 416 .property = "level",\ 417 .value = stringify(2),\ 418 },{\ 419 .driver = "Penryn-" TYPE_X86_CPU,\ 420 .property = "model",\ 421 .value = stringify(2),\ 422 },{\ 423 .driver = "Penryn-" TYPE_X86_CPU,\ 424 .property = "level",\ 425 .value = stringify(2),\ 426 },{\ 427 .driver = "Nehalem-" TYPE_X86_CPU,\ 428 .property = "model",\ 429 .value = stringify(2),\ 430 },{\ 431 .driver = "Nehalem-" TYPE_X86_CPU,\ 432 .property = "level",\ 433 .value = stringify(2),\ 434 },{\ 435 .driver = "virtio-net-pci",\ 436 .property = "any_layout",\ 437 .value = "off",\ 438 },{\ 439 .driver = TYPE_X86_CPU,\ 440 .property = "pmu",\ 441 .value = "on",\ 442 },{\ 443 .driver = "i440FX-pcihost",\ 444 .property = "short_root_bus",\ 445 .value = stringify(0),\ 446 },{\ 447 .driver = "q35-pcihost",\ 448 .property = "short_root_bus",\ 449 .value = stringify(0),\ 450 }, 451 452 #define PC_COMPAT_1_4 \ 453 PC_COMPAT_1_5 \ 454 {\ 455 .driver = "scsi-hd",\ 456 .property = "discard_granularity",\ 457 .value = stringify(0),\ 458 },{\ 459 .driver = "scsi-cd",\ 460 .property = "discard_granularity",\ 461 .value = stringify(0),\ 462 },{\ 463 .driver = "scsi-disk",\ 464 .property = "discard_granularity",\ 465 .value = stringify(0),\ 466 },{\ 467 .driver = "ide-hd",\ 468 .property = "discard_granularity",\ 469 .value = stringify(0),\ 470 },{\ 471 .driver = "ide-cd",\ 472 .property = "discard_granularity",\ 473 .value = stringify(0),\ 474 },{\ 475 .driver = "ide-drive",\ 476 .property = "discard_granularity",\ 477 .value = stringify(0),\ 478 },{\ 479 .driver = "virtio-blk-pci",\ 480 .property = "discard_granularity",\ 481 .value = stringify(0),\ 482 },{\ 483 .driver = "virtio-serial-pci",\ 484 .property = "vectors",\ 485 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 486 .value = stringify(0xFFFFFFFF),\ 487 },{ \ 488 .driver = "virtio-net-pci", \ 489 .property = "ctrl_guest_offloads", \ 490 .value = "off", \ 491 },{\ 492 .driver = "e1000",\ 493 .property = "romfile",\ 494 .value = "pxe-e1000.rom",\ 495 },{\ 496 .driver = "ne2k_pci",\ 497 .property = "romfile",\ 498 .value = "pxe-ne2k_pci.rom",\ 499 },{\ 500 .driver = "pcnet",\ 501 .property = "romfile",\ 502 .value = "pxe-pcnet.rom",\ 503 },{\ 504 .driver = "rtl8139",\ 505 .property = "romfile",\ 506 .value = "pxe-rtl8139.rom",\ 507 },{\ 508 .driver = "virtio-net-pci",\ 509 .property = "romfile",\ 510 .value = "pxe-virtio.rom",\ 511 },{\ 512 .driver = "486-" TYPE_X86_CPU,\ 513 .property = "model",\ 514 .value = stringify(0),\ 515 }, 516 517 static inline void pc_common_machine_options(MachineClass *m) 518 { 519 m->default_boot_order = "cad"; 520 } 521 522 static inline void pc_default_machine_options(MachineClass *m) 523 { 524 pc_common_machine_options(m); 525 m->hot_add_cpu = pc_hot_add_cpu; 526 m->max_cpus = 255; 527 } 528 529 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 530 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 531 { \ 532 MachineClass *mc = MACHINE_CLASS(oc); \ 533 optsfn(mc); \ 534 mc->name = namestr; \ 535 mc->init = initfn; \ 536 } \ 537 static const TypeInfo pc_machine_type_##suffix = { \ 538 .name = namestr TYPE_MACHINE_SUFFIX, \ 539 .parent = TYPE_PC_MACHINE, \ 540 .class_init = pc_machine_##suffix##_class_init, \ 541 }; \ 542 static void pc_machine_init_##suffix(void) \ 543 { \ 544 type_register(&pc_machine_type_##suffix); \ 545 } \ 546 machine_init(pc_machine_init_##suffix) 547 548 #define SET_MACHINE_COMPAT(m, COMPAT) do { \ 549 static GlobalProperty props[] = { \ 550 COMPAT \ 551 { /* end of list */ } \ 552 }; \ 553 (m)->compat_props = props; \ 554 } while (0) 555 556 #endif 557