1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 #include "hw/i386/sgx-epc.h" 15 #include "hw/firmware/smbios.h" 16 #include "hw/cxl/cxl.h" 17 18 /** 19 * PCMachineState: 20 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 21 * @boot_cpus: number of present VCPUs 22 */ 23 typedef struct PCMachineState { 24 /*< private >*/ 25 X86MachineState parent_obj; 26 27 /* <public> */ 28 29 /* State for other subsystems/APIs: */ 30 Notifier machine_done; 31 32 /* Pointers to devices and objects: */ 33 PCIBus *bus; 34 I2CBus *smbus; 35 PFlashCFI01 *flash[2]; 36 ISADevice *pcspk; 37 DeviceState *iommu; 38 39 /* Configuration options: */ 40 uint64_t max_ram_below_4g; 41 OnOffAuto vmport; 42 SmbiosEntryPointType smbios_entry_point_type; 43 const char *south_bridge; 44 45 bool acpi_build_enabled; 46 bool smbus_enabled; 47 bool sata_enabled; 48 bool hpet_enabled; 49 bool i8042_enabled; 50 bool default_bus_bypass_iommu; 51 uint64_t max_fw_size; 52 53 /* ACPI Memory hotplug IO base address */ 54 hwaddr memhp_io_base; 55 56 SGXEPCState sgx_epc; 57 CXLState cxl_devices_state; 58 } PCMachineState; 59 60 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 61 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 62 #define PC_MACHINE_VMPORT "vmport" 63 #define PC_MACHINE_SMBUS "smbus" 64 #define PC_MACHINE_SATA "sata" 65 #define PC_MACHINE_I8042 "i8042" 66 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 67 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type" 68 69 /** 70 * PCMachineClass: 71 * 72 * Compat fields: 73 * 74 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 75 * backend's alignment value if provided 76 * @acpi_data_size: Size of the chunk of memory at the top of RAM 77 * for the BIOS ACPI tables and other BIOS 78 * datastructures. 79 * @gigabyte_align: Make sure that guest addresses aligned at 80 * 1Gbyte boundaries get mapped to host 81 * addresses aligned at 1Gbyte boundaries. This 82 * way we can use 1GByte pages in the host. 83 * 84 */ 85 struct PCMachineClass { 86 /*< private >*/ 87 X86MachineClass parent_class; 88 89 /*< public >*/ 90 91 /* Device configuration: */ 92 bool pci_enabled; 93 bool kvmclock_enabled; 94 const char *default_south_bridge; 95 96 /* Compat options: */ 97 98 /* Default CPU model version. See x86_cpu_set_default_version(). */ 99 int default_cpu_version; 100 101 /* ACPI compat: */ 102 bool has_acpi_build; 103 bool rsdp_in_ram; 104 int legacy_acpi_table_size; 105 unsigned acpi_data_size; 106 int pci_root_uid; 107 108 /* SMBIOS compat: */ 109 bool smbios_defaults; 110 bool smbios_legacy_mode; 111 bool smbios_uuid_encoded; 112 SmbiosEntryPointType default_smbios_ep_type; 113 114 /* RAM / address space compat: */ 115 bool gigabyte_align; 116 bool has_reserved_memory; 117 bool enforce_aligned_dimm; 118 bool broken_reserved_end; 119 bool enforce_amd_1tb_hole; 120 121 /* generate legacy CPU hotplug AML */ 122 bool legacy_cpu_hotplug; 123 124 /* use PVH to load kernels that support this feature */ 125 bool pvh_enabled; 126 127 /* create kvmclock device even when KVM PV features are not exposed */ 128 bool kvmclock_create_always; 129 130 /* resizable acpi blob compat */ 131 bool resizable_acpi_blob; 132 133 /* 134 * whether the machine type implements broken 32-bit address space bound 135 * check for memory. 136 */ 137 bool broken_32bit_mem_addr_check; 138 }; 139 140 #define TYPE_PC_MACHINE "generic-pc-machine" 141 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 142 143 /* ioapic.c */ 144 145 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 146 147 /* pc.c */ 148 extern int fd_bootchk; 149 150 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 151 152 void pc_guest_info_init(PCMachineState *pcms); 153 154 #define PCI_HOST_PROP_RAM_MEM "ram-mem" 155 #define PCI_HOST_PROP_PCI_MEM "pci-mem" 156 #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" 157 #define PCI_HOST_PROP_IO_MEM "io-mem" 158 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 159 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 160 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 161 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 162 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 163 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 164 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 165 166 167 void pc_pci_as_mapping_init(MemoryRegion *system_memory, 168 MemoryRegion *pci_address_space); 169 170 void xen_load_linux(PCMachineState *pcms); 171 void pc_memory_init(PCMachineState *pcms, 172 MemoryRegion *system_memory, 173 MemoryRegion *rom_memory, 174 uint64_t pci_hole64_size); 175 uint64_t pc_pci_hole64_start(void); 176 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 177 void pc_basic_device_init(struct PCMachineState *pcms, 178 ISABus *isa_bus, qemu_irq *gsi, 179 ISADevice *rtc_state, 180 bool create_fdctrl, 181 uint32_t hpet_irqs); 182 void pc_cmos_init(PCMachineState *pcms, 183 BusState *ide0, BusState *ide1, 184 ISADevice *s); 185 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 186 187 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 188 189 /* port92.c */ 190 #define PORT92_A20_LINE "a20" 191 192 #define TYPE_PORT92 "port92" 193 194 /* pc_sysfw.c */ 195 void pc_system_flash_create(PCMachineState *pcms); 196 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 197 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 198 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 199 int *data_len); 200 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 201 202 /* hw/i386/acpi-common.c */ 203 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids, 204 GArray *entry, bool force_enabled); 205 206 /* sgx.c */ 207 void pc_machine_init_sgx_epc(PCMachineState *pcms); 208 209 extern GlobalProperty pc_compat_8_2[]; 210 extern const size_t pc_compat_8_2_len; 211 212 extern GlobalProperty pc_compat_8_1[]; 213 extern const size_t pc_compat_8_1_len; 214 215 extern GlobalProperty pc_compat_8_0[]; 216 extern const size_t pc_compat_8_0_len; 217 218 extern GlobalProperty pc_compat_7_2[]; 219 extern const size_t pc_compat_7_2_len; 220 221 extern GlobalProperty pc_compat_7_1[]; 222 extern const size_t pc_compat_7_1_len; 223 224 extern GlobalProperty pc_compat_7_0[]; 225 extern const size_t pc_compat_7_0_len; 226 227 extern GlobalProperty pc_compat_6_2[]; 228 extern const size_t pc_compat_6_2_len; 229 230 extern GlobalProperty pc_compat_6_1[]; 231 extern const size_t pc_compat_6_1_len; 232 233 extern GlobalProperty pc_compat_6_0[]; 234 extern const size_t pc_compat_6_0_len; 235 236 extern GlobalProperty pc_compat_5_2[]; 237 extern const size_t pc_compat_5_2_len; 238 239 extern GlobalProperty pc_compat_5_1[]; 240 extern const size_t pc_compat_5_1_len; 241 242 extern GlobalProperty pc_compat_5_0[]; 243 extern const size_t pc_compat_5_0_len; 244 245 extern GlobalProperty pc_compat_4_2[]; 246 extern const size_t pc_compat_4_2_len; 247 248 extern GlobalProperty pc_compat_4_1[]; 249 extern const size_t pc_compat_4_1_len; 250 251 extern GlobalProperty pc_compat_4_0[]; 252 extern const size_t pc_compat_4_0_len; 253 254 extern GlobalProperty pc_compat_3_1[]; 255 extern const size_t pc_compat_3_1_len; 256 257 extern GlobalProperty pc_compat_3_0[]; 258 extern const size_t pc_compat_3_0_len; 259 260 extern GlobalProperty pc_compat_2_12[]; 261 extern const size_t pc_compat_2_12_len; 262 263 extern GlobalProperty pc_compat_2_11[]; 264 extern const size_t pc_compat_2_11_len; 265 266 extern GlobalProperty pc_compat_2_10[]; 267 extern const size_t pc_compat_2_10_len; 268 269 extern GlobalProperty pc_compat_2_9[]; 270 extern const size_t pc_compat_2_9_len; 271 272 extern GlobalProperty pc_compat_2_8[]; 273 extern const size_t pc_compat_2_8_len; 274 275 extern GlobalProperty pc_compat_2_7[]; 276 extern const size_t pc_compat_2_7_len; 277 278 extern GlobalProperty pc_compat_2_6[]; 279 extern const size_t pc_compat_2_6_len; 280 281 extern GlobalProperty pc_compat_2_5[]; 282 extern const size_t pc_compat_2_5_len; 283 284 extern GlobalProperty pc_compat_2_4[]; 285 extern const size_t pc_compat_2_4_len; 286 287 extern GlobalProperty pc_compat_2_3[]; 288 extern const size_t pc_compat_2_3_len; 289 290 extern GlobalProperty pc_compat_2_2[]; 291 extern const size_t pc_compat_2_2_len; 292 293 extern GlobalProperty pc_compat_2_1[]; 294 extern const size_t pc_compat_2_1_len; 295 296 extern GlobalProperty pc_compat_2_0[]; 297 extern const size_t pc_compat_2_0_len; 298 299 extern GlobalProperty pc_compat_1_7[]; 300 extern const size_t pc_compat_1_7_len; 301 302 extern GlobalProperty pc_compat_1_6[]; 303 extern const size_t pc_compat_1_6_len; 304 305 extern GlobalProperty pc_compat_1_5[]; 306 extern const size_t pc_compat_1_5_len; 307 308 extern GlobalProperty pc_compat_1_4[]; 309 extern const size_t pc_compat_1_4_len; 310 311 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 312 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 313 { \ 314 MachineClass *mc = MACHINE_CLASS(oc); \ 315 optsfn(mc); \ 316 mc->init = initfn; \ 317 } \ 318 static const TypeInfo pc_machine_type_##suffix = { \ 319 .name = namestr TYPE_MACHINE_SUFFIX, \ 320 .parent = TYPE_PC_MACHINE, \ 321 .class_init = pc_machine_##suffix##_class_init, \ 322 }; \ 323 static void pc_machine_init_##suffix(void) \ 324 { \ 325 type_register(&pc_machine_type_##suffix); \ 326 } \ 327 type_init(pc_machine_init_##suffix) 328 329 #endif 330