1 /* 2 * SGX EPC device 3 * 4 * Copyright (C) 2019 Intel Corporation 5 * 6 * Authors: 7 * Sean Christopherson <sean.j.christopherson@intel.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 #ifndef QEMU_SGX_EPC_H 13 #define QEMU_SGX_EPC_H 14 15 #include "hw/i386/hostmem-epc.h" 16 17 #define TYPE_SGX_EPC "sgx-epc" 18 #define SGX_EPC(obj) \ 19 OBJECT_CHECK(SGXEPCDevice, (obj), TYPE_SGX_EPC) 20 #define SGX_EPC_CLASS(oc) \ 21 OBJECT_CLASS_CHECK(SGXEPCDeviceClass, (oc), TYPE_SGX_EPC) 22 #define SGX_EPC_GET_CLASS(obj) \ 23 OBJECT_GET_CLASS(SGXEPCDeviceClass, (obj), TYPE_SGX_EPC) 24 25 #define SGX_EPC_ADDR_PROP "addr" 26 #define SGX_EPC_SIZE_PROP "size" 27 #define SGX_EPC_MEMDEV_PROP "memdev" 28 29 /** 30 * SGXEPCDevice: 31 * @addr: starting guest physical address, where @SGXEPCDevice is mapped. 32 * Default value: 0, means that address is auto-allocated. 33 * @hostmem: host memory backend providing memory for @SGXEPCDevice 34 */ 35 typedef struct SGXEPCDevice { 36 /* private */ 37 DeviceState parent_obj; 38 39 /* public */ 40 uint64_t addr; 41 HostMemoryBackendEpc *hostmem; 42 } SGXEPCDevice; 43 44 /* 45 * @base: address in guest physical address space where EPC regions start 46 * @mr: address space container for memory devices 47 */ 48 typedef struct SGXEPCState { 49 uint64_t base; 50 uint64_t size; 51 52 MemoryRegion mr; 53 54 struct SGXEPCDevice **sections; 55 int nr_sections; 56 } SGXEPCState; 57 58 bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size); 59 60 static inline uint64_t sgx_epc_above_4g_end(SGXEPCState *sgx_epc) 61 { 62 assert(sgx_epc != NULL && sgx_epc->base >= 0x100000000ULL); 63 64 return sgx_epc->base + sgx_epc->size; 65 } 66 67 #endif 68