xref: /qemu/include/hw/i386/x86.h (revision 4ab4c330)
1549e984eSSergio Lopez /*
2549e984eSSergio Lopez  * Copyright (c) 2019 Red Hat, Inc.
3549e984eSSergio Lopez  *
4549e984eSSergio Lopez  * This program is free software; you can redistribute it and/or modify it
5549e984eSSergio Lopez  * under the terms and conditions of the GNU General Public License,
6549e984eSSergio Lopez  * version 2 or later, as published by the Free Software Foundation.
7549e984eSSergio Lopez  *
8549e984eSSergio Lopez  * This program is distributed in the hope it will be useful, but WITHOUT
9549e984eSSergio Lopez  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10549e984eSSergio Lopez  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11549e984eSSergio Lopez  * more details.
12549e984eSSergio Lopez  *
13549e984eSSergio Lopez  * You should have received a copy of the GNU General Public License along with
14549e984eSSergio Lopez  * this program.  If not, see <http://www.gnu.org/licenses/>.
15549e984eSSergio Lopez  */
16549e984eSSergio Lopez 
17549e984eSSergio Lopez #ifndef HW_I386_X86_H
18549e984eSSergio Lopez #define HW_I386_X86_H
19549e984eSSergio Lopez 
20f0bb276bSPaolo Bonzini #include "exec/hwaddr.h"
21f0bb276bSPaolo Bonzini #include "qemu/notify.h"
22f0bb276bSPaolo Bonzini 
2353a5e7bdSBabu Moger #include "hw/i386/topology.h"
24549e984eSSergio Lopez #include "hw/boards.h"
25f0bb276bSPaolo Bonzini #include "hw/nmi.h"
2689a289c7SPaolo Bonzini #include "hw/isa/isa.h"
2789a289c7SPaolo Bonzini #include "hw/i386/ioapic.h"
28db1015e9SEduardo Habkost #include "qom/object.h"
29f0bb276bSPaolo Bonzini 
30db1015e9SEduardo Habkost struct X86MachineClass {
31f0bb276bSPaolo Bonzini     /*< private >*/
32f0bb276bSPaolo Bonzini     MachineClass parent;
33f0bb276bSPaolo Bonzini 
34f0bb276bSPaolo Bonzini     /*< public >*/
35f0bb276bSPaolo Bonzini 
362f34ebf2SLiam Merwick     /* TSC rate migration: */
372f34ebf2SLiam Merwick     bool save_tsc_khz;
38f014c974SPaolo Bonzini     /* use DMA capable linuxboot option rom */
39f014c974SPaolo Bonzini     bool fwcfg_dma_enabled;
40db1015e9SEduardo Habkost };
41f0bb276bSPaolo Bonzini 
42db1015e9SEduardo Habkost struct X86MachineState {
43f0bb276bSPaolo Bonzini     /*< private >*/
44f0bb276bSPaolo Bonzini     MachineState parent;
45f0bb276bSPaolo Bonzini 
46f0bb276bSPaolo Bonzini     /*< public >*/
47f0bb276bSPaolo Bonzini 
48f0bb276bSPaolo Bonzini     /* Pointers to devices and objects: */
49f0bb276bSPaolo Bonzini     ISADevice *rtc;
50f0bb276bSPaolo Bonzini     FWCfgState *fw_cfg;
51f0bb276bSPaolo Bonzini     qemu_irq *gsi;
5294c5a606SGerd Hoffmann     DeviceState *ioapic2;
53f0bb276bSPaolo Bonzini     GMappedFile *initrd_mapped_file;
5450aef131SGerd Hoffmann     HotplugHandler *acpi_dev;
55f0bb276bSPaolo Bonzini 
56f0bb276bSPaolo Bonzini     /* RAM information (sizes, addresses, configuration): */
57f0bb276bSPaolo Bonzini     ram_addr_t below_4g_mem_size, above_4g_mem_size;
58f0bb276bSPaolo Bonzini 
59*4ab4c330SJoao Martins     /* Start address of the initial RAM above 4G */
60*4ab4c330SJoao Martins     uint64_t above_4g_mem_start;
61*4ab4c330SJoao Martins 
62f0bb276bSPaolo Bonzini     /* CPU and apic information: */
63f0bb276bSPaolo Bonzini     bool apic_xrupt_override;
641b2802c4SGerd Hoffmann     unsigned pci_irq_mask;
65f0bb276bSPaolo Bonzini     unsigned apic_id_limit;
66f0bb276bSPaolo Bonzini     uint16_t boot_cpus;
67dfce81f1SSean Christopherson     SgxEPCList *sgx_epc_list;
68f0bb276bSPaolo Bonzini 
69ed9e923cSPaolo Bonzini     OnOffAuto smm;
7017e89077SGerd Hoffmann     OnOffAuto acpi;
719dee7e51SXiaoyao Li     OnOffAuto pit;
72c300bbe8SXiaoyao Li     OnOffAuto pic;
73ed9e923cSPaolo Bonzini 
74d07b2286SMarian Postevca     char *oem_id;
75d07b2286SMarian Postevca     char *oem_table_id;
76f0bb276bSPaolo Bonzini     /*
77f0bb276bSPaolo Bonzini      * Address space used by IOAPIC device. All IOAPIC interrupts
78f0bb276bSPaolo Bonzini      * will be translated to MSI messages in the address space.
79f0bb276bSPaolo Bonzini      */
80f0bb276bSPaolo Bonzini     AddressSpace *ioapic_as;
81035d1ef2SChenyi Qiang 
82035d1ef2SChenyi Qiang     /*
83035d1ef2SChenyi Qiang      * Ratelimit enforced on detected bus locks in guest.
84035d1ef2SChenyi Qiang      * The default value of the bus_lock_ratelimit is 0 per second,
85035d1ef2SChenyi Qiang      * which means no limitation on the guest's bus locks.
86035d1ef2SChenyi Qiang      */
87035d1ef2SChenyi Qiang     uint64_t bus_lock_ratelimit;
88db1015e9SEduardo Habkost };
89f0bb276bSPaolo Bonzini 
90ed9e923cSPaolo Bonzini #define X86_MACHINE_SMM              "smm"
9117e89077SGerd Hoffmann #define X86_MACHINE_ACPI             "acpi"
929dee7e51SXiaoyao Li #define X86_MACHINE_PIT              "pit"
93c300bbe8SXiaoyao Li #define X86_MACHINE_PIC              "pic"
9490a66f48SPaolo Bonzini #define X86_MACHINE_OEM_ID           "x-oem-id"
9590a66f48SPaolo Bonzini #define X86_MACHINE_OEM_TABLE_ID     "x-oem-table-id"
96035d1ef2SChenyi Qiang #define X86_MACHINE_BUS_LOCK_RATELIMIT  "bus-lock-ratelimit"
97f0bb276bSPaolo Bonzini 
98f0bb276bSPaolo Bonzini #define TYPE_X86_MACHINE   MACHINE_TYPE_NAME("x86")
99a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE)
100549e984eSSergio Lopez 
10153a5e7bdSBabu Moger void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);
10253a5e7bdSBabu Moger 
103703a548aSSergio Lopez uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms,
104549e984eSSergio Lopez                                     unsigned int cpu_index);
105703a548aSSergio Lopez 
106703a548aSSergio Lopez void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp);
107703a548aSSergio Lopez void x86_cpus_init(X86MachineState *pcms, int default_cpu_version);
108549e984eSSergio Lopez CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms,
109549e984eSSergio Lopez                                              unsigned cpu_index);
110549e984eSSergio Lopez int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx);
111549e984eSSergio Lopez const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms);
1120cca1a91SGerd Hoffmann CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx);
1130cca1a91SGerd Hoffmann void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count);
1140cca1a91SGerd Hoffmann void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
1150cca1a91SGerd Hoffmann                       DeviceState *dev, Error **errp);
1160cca1a91SGerd Hoffmann void x86_cpu_plug(HotplugHandler *hotplug_dev,
1170cca1a91SGerd Hoffmann                   DeviceState *dev, Error **errp);
1180cca1a91SGerd Hoffmann void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
1190cca1a91SGerd Hoffmann                                DeviceState *dev, Error **errp);
1200cca1a91SGerd Hoffmann void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev,
1210cca1a91SGerd Hoffmann                        DeviceState *dev, Error **errp);
122549e984eSSergio Lopez 
1237d435078SPaolo Bonzini void x86_bios_rom_init(MachineState *ms, const char *default_firmware,
1247d435078SPaolo Bonzini                        MemoryRegion *rom_memory, bool isapc_ram_fw);
125549e984eSSergio Lopez 
126703a548aSSergio Lopez void x86_load_linux(X86MachineState *x86ms,
127703a548aSSergio Lopez                     FWCfgState *fw_cfg,
128703a548aSSergio Lopez                     int acpi_data_size,
12967f7e426SJason A. Donenfeld                     bool pvh_enabled,
13067f7e426SJason A. Donenfeld                     bool legacy_no_rng_seed);
131549e984eSSergio Lopez 
1329927a632SGerd Hoffmann bool x86_machine_is_smm_enabled(const X86MachineState *x86ms);
1339927a632SGerd Hoffmann bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
134ed9e923cSPaolo Bonzini 
13589a289c7SPaolo Bonzini /* Global System Interrupts */
13689a289c7SPaolo Bonzini 
13789a289c7SPaolo Bonzini #define GSI_NUM_PINS IOAPIC_NUM_PINS
1381b2802c4SGerd Hoffmann #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
13989a289c7SPaolo Bonzini 
14089a289c7SPaolo Bonzini typedef struct GSIState {
14189a289c7SPaolo Bonzini     qemu_irq i8259_irq[ISA_NUM_IRQS];
14289a289c7SPaolo Bonzini     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
14394c5a606SGerd Hoffmann     qemu_irq ioapic2_irq[IOAPIC_NUM_PINS];
14489a289c7SPaolo Bonzini } GSIState;
14589a289c7SPaolo Bonzini 
14689a289c7SPaolo Bonzini qemu_irq x86_allocate_cpu_irq(void);
14789a289c7SPaolo Bonzini void gsi_handler(void *opaque, int n, int level);
14889a289c7SPaolo Bonzini void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
14994c5a606SGerd Hoffmann DeviceState *ioapic_init_secondary(GSIState *gsi_state);
15089a289c7SPaolo Bonzini 
151966f1ca5SGerd Hoffmann /* pc_sysfw.c */
152966f1ca5SGerd Hoffmann void x86_firmware_configure(void *ptr, int size);
153966f1ca5SGerd Hoffmann 
154549e984eSSergio Lopez #endif
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