1549e984eSSergio Lopez /* 2549e984eSSergio Lopez * Copyright (c) 2019 Red Hat, Inc. 3549e984eSSergio Lopez * 4549e984eSSergio Lopez * This program is free software; you can redistribute it and/or modify it 5549e984eSSergio Lopez * under the terms and conditions of the GNU General Public License, 6549e984eSSergio Lopez * version 2 or later, as published by the Free Software Foundation. 7549e984eSSergio Lopez * 8549e984eSSergio Lopez * This program is distributed in the hope it will be useful, but WITHOUT 9549e984eSSergio Lopez * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10549e984eSSergio Lopez * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11549e984eSSergio Lopez * more details. 12549e984eSSergio Lopez * 13549e984eSSergio Lopez * You should have received a copy of the GNU General Public License along with 14549e984eSSergio Lopez * this program. If not, see <http://www.gnu.org/licenses/>. 15549e984eSSergio Lopez */ 16549e984eSSergio Lopez 17549e984eSSergio Lopez #ifndef HW_I386_X86_H 18549e984eSSergio Lopez #define HW_I386_X86_H 19549e984eSSergio Lopez 20f0bb276bSPaolo Bonzini #include "exec/hwaddr.h" 21f0bb276bSPaolo Bonzini 22549e984eSSergio Lopez #include "hw/boards.h" 237f54640bSBernhard Beschow #include "hw/intc/ioapic.h" 2489a289c7SPaolo Bonzini #include "hw/isa/isa.h" 25db1015e9SEduardo Habkost #include "qom/object.h" 26f0bb276bSPaolo Bonzini 27db1015e9SEduardo Habkost struct X86MachineClass { 28f0bb276bSPaolo Bonzini /*< private >*/ 29f0bb276bSPaolo Bonzini MachineClass parent; 30f0bb276bSPaolo Bonzini 31f0bb276bSPaolo Bonzini /*< public >*/ 32f0bb276bSPaolo Bonzini 332f34ebf2SLiam Merwick /* TSC rate migration: */ 342f34ebf2SLiam Merwick bool save_tsc_khz; 35f014c974SPaolo Bonzini /* use DMA capable linuxboot option rom */ 36f014c974SPaolo Bonzini bool fwcfg_dma_enabled; 376e6d59a9SBernhard Beschow /* CPU and apic information: */ 386e6d59a9SBernhard Beschow bool apic_xrupt_override; 39db1015e9SEduardo Habkost }; 40f0bb276bSPaolo Bonzini 41db1015e9SEduardo Habkost struct X86MachineState { 42f0bb276bSPaolo Bonzini /*< private >*/ 43f0bb276bSPaolo Bonzini MachineState parent; 44f0bb276bSPaolo Bonzini 45f0bb276bSPaolo Bonzini /*< public >*/ 46f0bb276bSPaolo Bonzini 47f0bb276bSPaolo Bonzini /* Pointers to devices and objects: */ 48f0bb276bSPaolo Bonzini ISADevice *rtc; 49f0bb276bSPaolo Bonzini FWCfgState *fw_cfg; 50f0bb276bSPaolo Bonzini qemu_irq *gsi; 5194c5a606SGerd Hoffmann DeviceState *ioapic2; 52f0bb276bSPaolo Bonzini GMappedFile *initrd_mapped_file; 5350aef131SGerd Hoffmann HotplugHandler *acpi_dev; 54f0bb276bSPaolo Bonzini 55f0bb276bSPaolo Bonzini /* RAM information (sizes, addresses, configuration): */ 56f0bb276bSPaolo Bonzini ram_addr_t below_4g_mem_size, above_4g_mem_size; 57f0bb276bSPaolo Bonzini 584ab4c330SJoao Martins /* Start address of the initial RAM above 4G */ 594ab4c330SJoao Martins uint64_t above_4g_mem_start; 604ab4c330SJoao Martins 61f0bb276bSPaolo Bonzini /* CPU and apic information: */ 621b2802c4SGerd Hoffmann unsigned pci_irq_mask; 63f0bb276bSPaolo Bonzini unsigned apic_id_limit; 64f0bb276bSPaolo Bonzini uint16_t boot_cpus; 65dfce81f1SSean Christopherson SgxEPCList *sgx_epc_list; 66f0bb276bSPaolo Bonzini 67ed9e923cSPaolo Bonzini OnOffAuto smm; 6817e89077SGerd Hoffmann OnOffAuto acpi; 699dee7e51SXiaoyao Li OnOffAuto pit; 70c300bbe8SXiaoyao Li OnOffAuto pic; 71ed9e923cSPaolo Bonzini 72d07b2286SMarian Postevca char *oem_id; 73d07b2286SMarian Postevca char *oem_table_id; 74f0bb276bSPaolo Bonzini /* 75f0bb276bSPaolo Bonzini * Address space used by IOAPIC device. All IOAPIC interrupts 76f0bb276bSPaolo Bonzini * will be translated to MSI messages in the address space. 77f0bb276bSPaolo Bonzini */ 78f0bb276bSPaolo Bonzini AddressSpace *ioapic_as; 79035d1ef2SChenyi Qiang 80035d1ef2SChenyi Qiang /* 81035d1ef2SChenyi Qiang * Ratelimit enforced on detected bus locks in guest. 82035d1ef2SChenyi Qiang * The default value of the bus_lock_ratelimit is 0 per second, 83035d1ef2SChenyi Qiang * which means no limitation on the guest's bus locks. 84035d1ef2SChenyi Qiang */ 85035d1ef2SChenyi Qiang uint64_t bus_lock_ratelimit; 86db1015e9SEduardo Habkost }; 87f0bb276bSPaolo Bonzini 88ed9e923cSPaolo Bonzini #define X86_MACHINE_SMM "smm" 8917e89077SGerd Hoffmann #define X86_MACHINE_ACPI "acpi" 909dee7e51SXiaoyao Li #define X86_MACHINE_PIT "pit" 91c300bbe8SXiaoyao Li #define X86_MACHINE_PIC "pic" 9290a66f48SPaolo Bonzini #define X86_MACHINE_OEM_ID "x-oem-id" 9390a66f48SPaolo Bonzini #define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id" 94035d1ef2SChenyi Qiang #define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit" 95f0bb276bSPaolo Bonzini 96f0bb276bSPaolo Bonzini #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") 97a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) 98549e984eSSergio Lopez 99703a548aSSergio Lopez uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, 100549e984eSSergio Lopez unsigned int cpu_index); 101703a548aSSergio Lopez 102703a548aSSergio Lopez void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); 103703a548aSSergio Lopez void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); 104549e984eSSergio Lopez CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, 105549e984eSSergio Lopez unsigned cpu_index); 106549e984eSSergio Lopez int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx); 107549e984eSSergio Lopez const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); 1080cca1a91SGerd Hoffmann CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx); 1090cca1a91SGerd Hoffmann void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count); 1100cca1a91SGerd Hoffmann void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, 1110cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 1120cca1a91SGerd Hoffmann void x86_cpu_plug(HotplugHandler *hotplug_dev, 1130cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 1140cca1a91SGerd Hoffmann void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 1150cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 1160cca1a91SGerd Hoffmann void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, 1170cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 118549e984eSSergio Lopez 1197d435078SPaolo Bonzini void x86_bios_rom_init(MachineState *ms, const char *default_firmware, 1207d435078SPaolo Bonzini MemoryRegion *rom_memory, bool isapc_ram_fw); 121549e984eSSergio Lopez 122703a548aSSergio Lopez void x86_load_linux(X86MachineState *x86ms, 123703a548aSSergio Lopez FWCfgState *fw_cfg, 124703a548aSSergio Lopez int acpi_data_size, 125167f4873SMichael S. Tsirkin bool pvh_enabled); 126549e984eSSergio Lopez 1279927a632SGerd Hoffmann bool x86_machine_is_smm_enabled(const X86MachineState *x86ms); 1289927a632SGerd Hoffmann bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms); 129ed9e923cSPaolo Bonzini 13089a289c7SPaolo Bonzini /* Global System Interrupts */ 13189a289c7SPaolo Bonzini 1321b2802c4SGerd Hoffmann #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) 13389a289c7SPaolo Bonzini 13489a289c7SPaolo Bonzini typedef struct GSIState { 13589a289c7SPaolo Bonzini qemu_irq i8259_irq[ISA_NUM_IRQS]; 13689a289c7SPaolo Bonzini qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 13794c5a606SGerd Hoffmann qemu_irq ioapic2_irq[IOAPIC_NUM_PINS]; 13889a289c7SPaolo Bonzini } GSIState; 13989a289c7SPaolo Bonzini 14089a289c7SPaolo Bonzini qemu_irq x86_allocate_cpu_irq(void); 14189a289c7SPaolo Bonzini void gsi_handler(void *opaque, int n, int level); 142*9b0c4433SBernhard Beschow void ioapic_init_gsi(GSIState *gsi_state, Object *parent); 14394c5a606SGerd Hoffmann DeviceState *ioapic_init_secondary(GSIState *gsi_state); 14489a289c7SPaolo Bonzini 145966f1ca5SGerd Hoffmann /* pc_sysfw.c */ 146966f1ca5SGerd Hoffmann void x86_firmware_configure(void *ptr, int size); 147966f1ca5SGerd Hoffmann 148549e984eSSergio Lopez #endif 149