1549e984eSSergio Lopez /* 2549e984eSSergio Lopez * Copyright (c) 2019 Red Hat, Inc. 3549e984eSSergio Lopez * 4549e984eSSergio Lopez * This program is free software; you can redistribute it and/or modify it 5549e984eSSergio Lopez * under the terms and conditions of the GNU General Public License, 6549e984eSSergio Lopez * version 2 or later, as published by the Free Software Foundation. 7549e984eSSergio Lopez * 8549e984eSSergio Lopez * This program is distributed in the hope it will be useful, but WITHOUT 9549e984eSSergio Lopez * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10549e984eSSergio Lopez * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11549e984eSSergio Lopez * more details. 12549e984eSSergio Lopez * 13549e984eSSergio Lopez * You should have received a copy of the GNU General Public License along with 14549e984eSSergio Lopez * this program. If not, see <http://www.gnu.org/licenses/>. 15549e984eSSergio Lopez */ 16549e984eSSergio Lopez 17549e984eSSergio Lopez #ifndef HW_I386_X86_H 18549e984eSSergio Lopez #define HW_I386_X86_H 19549e984eSSergio Lopez 20f0bb276bSPaolo Bonzini #include "qemu-common.h" 21f0bb276bSPaolo Bonzini #include "exec/hwaddr.h" 22f0bb276bSPaolo Bonzini #include "qemu/notify.h" 23f0bb276bSPaolo Bonzini 2453a5e7bdSBabu Moger #include "hw/i386/topology.h" 25549e984eSSergio Lopez #include "hw/boards.h" 26f0bb276bSPaolo Bonzini #include "hw/nmi.h" 2789a289c7SPaolo Bonzini #include "hw/isa/isa.h" 2889a289c7SPaolo Bonzini #include "hw/i386/ioapic.h" 29db1015e9SEduardo Habkost #include "qom/object.h" 30f0bb276bSPaolo Bonzini 31db1015e9SEduardo Habkost struct X86MachineClass { 32f0bb276bSPaolo Bonzini /*< private >*/ 33f0bb276bSPaolo Bonzini MachineClass parent; 34f0bb276bSPaolo Bonzini 35f0bb276bSPaolo Bonzini /*< public >*/ 36f0bb276bSPaolo Bonzini 372f34ebf2SLiam Merwick /* TSC rate migration: */ 382f34ebf2SLiam Merwick bool save_tsc_khz; 39f0bb276bSPaolo Bonzini /* Enables contiguous-apic-ID mode */ 40f0bb276bSPaolo Bonzini bool compat_apic_id_mode; 41db1015e9SEduardo Habkost }; 42f0bb276bSPaolo Bonzini 43db1015e9SEduardo Habkost struct X86MachineState { 44f0bb276bSPaolo Bonzini /*< private >*/ 45f0bb276bSPaolo Bonzini MachineState parent; 46f0bb276bSPaolo Bonzini 47f0bb276bSPaolo Bonzini /*< public >*/ 48f0bb276bSPaolo Bonzini 49f0bb276bSPaolo Bonzini /* Pointers to devices and objects: */ 50f0bb276bSPaolo Bonzini ISADevice *rtc; 51f0bb276bSPaolo Bonzini FWCfgState *fw_cfg; 52f0bb276bSPaolo Bonzini qemu_irq *gsi; 53f0bb276bSPaolo Bonzini GMappedFile *initrd_mapped_file; 5450aef131SGerd Hoffmann HotplugHandler *acpi_dev; 55f0bb276bSPaolo Bonzini 56f0bb276bSPaolo Bonzini /* RAM information (sizes, addresses, configuration): */ 57f0bb276bSPaolo Bonzini ram_addr_t below_4g_mem_size, above_4g_mem_size; 58f0bb276bSPaolo Bonzini 59f0bb276bSPaolo Bonzini /* CPU and apic information: */ 60f0bb276bSPaolo Bonzini bool apic_xrupt_override; 61f0bb276bSPaolo Bonzini unsigned apic_id_limit; 62f0bb276bSPaolo Bonzini uint16_t boot_cpus; 63f0bb276bSPaolo Bonzini unsigned smp_dies; 64f0bb276bSPaolo Bonzini 65ed9e923cSPaolo Bonzini OnOffAuto smm; 6617e89077SGerd Hoffmann OnOffAuto acpi; 67ed9e923cSPaolo Bonzini 68f0bb276bSPaolo Bonzini /* 69f0bb276bSPaolo Bonzini * Address space used by IOAPIC device. All IOAPIC interrupts 70f0bb276bSPaolo Bonzini * will be translated to MSI messages in the address space. 71f0bb276bSPaolo Bonzini */ 72f0bb276bSPaolo Bonzini AddressSpace *ioapic_as; 73db1015e9SEduardo Habkost }; 74f0bb276bSPaolo Bonzini 75ed9e923cSPaolo Bonzini #define X86_MACHINE_SMM "smm" 7617e89077SGerd Hoffmann #define X86_MACHINE_ACPI "acpi" 77f0bb276bSPaolo Bonzini 78f0bb276bSPaolo Bonzini #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") 79*a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) 80549e984eSSergio Lopez 8153a5e7bdSBabu Moger void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms); 8253a5e7bdSBabu Moger 83703a548aSSergio Lopez uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, 84549e984eSSergio Lopez unsigned int cpu_index); 85703a548aSSergio Lopez 86703a548aSSergio Lopez void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); 87703a548aSSergio Lopez void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); 88549e984eSSergio Lopez CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, 89549e984eSSergio Lopez unsigned cpu_index); 90549e984eSSergio Lopez int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx); 91549e984eSSergio Lopez const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); 920cca1a91SGerd Hoffmann CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx); 930cca1a91SGerd Hoffmann void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count); 940cca1a91SGerd Hoffmann void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, 950cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 960cca1a91SGerd Hoffmann void x86_cpu_plug(HotplugHandler *hotplug_dev, 970cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 980cca1a91SGerd Hoffmann void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 990cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 1000cca1a91SGerd Hoffmann void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, 1010cca1a91SGerd Hoffmann DeviceState *dev, Error **errp); 102549e984eSSergio Lopez 103549e984eSSergio Lopez void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw); 104549e984eSSergio Lopez 105703a548aSSergio Lopez void x86_load_linux(X86MachineState *x86ms, 106703a548aSSergio Lopez FWCfgState *fw_cfg, 107703a548aSSergio Lopez int acpi_data_size, 108703a548aSSergio Lopez bool pvh_enabled, 109703a548aSSergio Lopez bool linuxboot_dma_enabled); 110549e984eSSergio Lopez 1119927a632SGerd Hoffmann bool x86_machine_is_smm_enabled(const X86MachineState *x86ms); 1129927a632SGerd Hoffmann bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms); 113ed9e923cSPaolo Bonzini 11489a289c7SPaolo Bonzini /* Global System Interrupts */ 11589a289c7SPaolo Bonzini 11689a289c7SPaolo Bonzini #define GSI_NUM_PINS IOAPIC_NUM_PINS 11789a289c7SPaolo Bonzini 11889a289c7SPaolo Bonzini typedef struct GSIState { 11989a289c7SPaolo Bonzini qemu_irq i8259_irq[ISA_NUM_IRQS]; 12089a289c7SPaolo Bonzini qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 12189a289c7SPaolo Bonzini } GSIState; 12289a289c7SPaolo Bonzini 12389a289c7SPaolo Bonzini qemu_irq x86_allocate_cpu_irq(void); 12489a289c7SPaolo Bonzini void gsi_handler(void *opaque, int n, int level); 12589a289c7SPaolo Bonzini void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 12689a289c7SPaolo Bonzini 12789a289c7SPaolo Bonzini /* hpet.c */ 12889a289c7SPaolo Bonzini extern int no_hpet; 12989a289c7SPaolo Bonzini 130549e984eSSergio Lopez #endif 131