xref: /qemu/include/hw/intc/rx_icu.h (revision 727385c4)
1 /*
2  * RX Interrupt Control Unit
3  *
4  * Copyright (c) 2019 Yoshinori Sato
5  *
6  * SPDX-License-Identifier: GPL-2.0-or-later
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms and conditions of the GNU General Public License,
10  * version 2 or later, as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #ifndef HW_INTC_RX_ICU_H
22 #define HW_INTC_RX_ICU_H
23 
24 #include "hw/sysbus.h"
25 #include "qom/object.h"
26 
27 enum TRG_MODE {
28     TRG_LEVEL = 0,
29     TRG_NEDGE = 1,      /* Falling */
30     TRG_PEDGE = 2,      /* Raising */
31     TRG_BEDGE = 3,      /* Both */
32 };
33 
34 struct IRQSource {
35     enum TRG_MODE sense;
36     int level;
37 };
38 
39 enum {
40     /* Software interrupt request */
41     SWI = 27,
42     NR_IRQS = 256
43 };
44 
45 struct RXICUState {
46     /*< private >*/
47     SysBusDevice parent_obj;
48     /*< public >*/
49 
50     MemoryRegion memory;
51     struct IRQSource src[NR_IRQS];
52     uint32_t nr_irqs;
53     uint8_t *map;
54     uint32_t nr_sense;
55     uint8_t *init_sense;
56 
57     uint8_t ir[NR_IRQS];
58     uint8_t dtcer[NR_IRQS];
59     uint8_t ier[NR_IRQS / 8];
60     uint8_t ipr[142];
61     uint8_t dmasr[4];
62     uint16_t fir;
63     uint8_t nmisr;
64     uint8_t nmier;
65     uint8_t nmiclr;
66     uint8_t nmicr;
67     int16_t req_irq;
68     qemu_irq _irq;
69     qemu_irq _fir;
70     qemu_irq _swi;
71 };
72 
73 #define TYPE_RX_ICU "rx-icu"
74 OBJECT_DECLARE_SIMPLE_TYPE(RXICUState, RX_ICU)
75 
76 #endif /* RX_ICU_H */
77