xref: /qemu/include/hw/misc/msf2-sysreg.h (revision 8063396b)
1 /*
2  * Microsemi SmartFusion2 SYSREG
3  *
4  * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef HW_MSF2_SYSREG_H
26 #define HW_MSF2_SYSREG_H
27 
28 #include "hw/sysbus.h"
29 #include "qom/object.h"
30 
31 enum {
32     ESRAM_CR        = 0x00 / 4,
33     ESRAM_MAX_LAT,
34     DDR_CR,
35     ENVM_CR,
36     ENVM_REMAP_BASE_CR,
37     ENVM_REMAP_FAB_CR,
38     CC_CR,
39     CC_REGION_CR,
40     CC_LOCK_BASE_ADDR_CR,
41     CC_FLUSH_INDX_CR,
42     DDRB_BUF_TIMER_CR,
43     DDRB_NB_ADDR_CR,
44     DDRB_NB_SIZE_CR,
45     DDRB_CR,
46 
47     SOFT_RESET_CR  = 0x48 / 4,
48     M3_CR,
49 
50     GPIO_SYSRESET_SEL_CR = 0x58 / 4,
51 
52     MDDR_CR = 0x60 / 4,
53 
54     MSSDDR_PLL_STATUS_LOW_CR = 0x90 / 4,
55     MSSDDR_PLL_STATUS_HIGH_CR,
56     MSSDDR_FACC1_CR,
57     MSSDDR_FACC2_CR,
58 
59     MSSDDR_PLL_STATUS = 0x150 / 4,
60 };
61 
62 #define MSF2_SYSREG_MMIO_SIZE     0x300
63 
64 #define TYPE_MSF2_SYSREG          "msf2-sysreg"
65 OBJECT_DECLARE_SIMPLE_TYPE(MSF2SysregState, MSF2_SYSREG)
66 
67 struct MSF2SysregState {
68     SysBusDevice parent_obj;
69 
70     MemoryRegion iomem;
71 
72     uint8_t apb0div;
73     uint8_t apb1div;
74 
75     uint32_t regs[MSF2_SYSREG_MMIO_SIZE / 4];
76 };
77 
78 #endif /* HW_MSF2_SYSREG_H */
79