1344f4b15SPeter Maydell /* 2344f4b15SPeter Maydell * ARM AHB5 TrustZone Memory Protection Controller emulation 3344f4b15SPeter Maydell * 4344f4b15SPeter Maydell * Copyright (c) 2018 Linaro Limited 5344f4b15SPeter Maydell * Written by Peter Maydell 6344f4b15SPeter Maydell * 7344f4b15SPeter Maydell * This program is free software; you can redistribute it and/or modify 8344f4b15SPeter Maydell * it under the terms of the GNU General Public License version 2 or 9344f4b15SPeter Maydell * (at your option) any later version. 10344f4b15SPeter Maydell */ 11344f4b15SPeter Maydell 12344f4b15SPeter Maydell /* This is a model of the TrustZone memory protection controller (MPC). 13344f4b15SPeter Maydell * It is documented in the ARM CoreLink SIE-200 System IP for Embedded TRM 14344f4b15SPeter Maydell * (DDI 0571G): 15344f4b15SPeter Maydell * https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g 16344f4b15SPeter Maydell * 17344f4b15SPeter Maydell * The MPC sits in front of memory and allows secure software to 18344f4b15SPeter Maydell * configure it to either pass through or reject transactions. 19344f4b15SPeter Maydell * Rejected transactions may be configured to either be aborted, or to 20344f4b15SPeter Maydell * behave as RAZ/WI. An interrupt can be signalled for a rejected transaction. 21344f4b15SPeter Maydell * 22344f4b15SPeter Maydell * The MPC has a register interface which the guest uses to configure it. 23344f4b15SPeter Maydell * 24344f4b15SPeter Maydell * QEMU interface: 25344f4b15SPeter Maydell * + sysbus MMIO region 0: MemoryRegion for the MPC's config registers 26344f4b15SPeter Maydell * + sysbus MMIO region 1: MemoryRegion for the upstream end of the MPC 27344f4b15SPeter Maydell * + Property "downstream": MemoryRegion defining the downstream memory 28344f4b15SPeter Maydell * + Named GPIO output "irq": set for a transaction-failed interrupt 29344f4b15SPeter Maydell */ 30344f4b15SPeter Maydell 31344f4b15SPeter Maydell #ifndef TZ_MPC_H 32344f4b15SPeter Maydell #define TZ_MPC_H 33344f4b15SPeter Maydell 34344f4b15SPeter Maydell #include "hw/sysbus.h" 35db1015e9SEduardo Habkost #include "qom/object.h" 36344f4b15SPeter Maydell 37344f4b15SPeter Maydell #define TYPE_TZ_MPC "tz-mpc" 38*8063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(TZMPC, TZ_MPC) 39344f4b15SPeter Maydell 40344f4b15SPeter Maydell #define TZ_NUM_PORTS 16 41344f4b15SPeter Maydell 42344f4b15SPeter Maydell #define TYPE_TZ_MPC_IOMMU_MEMORY_REGION "tz-mpc-iommu-memory-region" 43344f4b15SPeter Maydell 44344f4b15SPeter Maydell 45344f4b15SPeter Maydell struct TZMPC { 46344f4b15SPeter Maydell /*< private >*/ 47344f4b15SPeter Maydell SysBusDevice parent_obj; 48344f4b15SPeter Maydell 49344f4b15SPeter Maydell /*< public >*/ 50344f4b15SPeter Maydell 51cdb60998SPeter Maydell /* State */ 52cdb60998SPeter Maydell uint32_t ctrl; 53cdb60998SPeter Maydell uint32_t blk_idx; 54cdb60998SPeter Maydell uint32_t int_stat; 55cdb60998SPeter Maydell uint32_t int_en; 56cdb60998SPeter Maydell uint32_t int_info1; 57cdb60998SPeter Maydell uint32_t int_info2; 58cdb60998SPeter Maydell 59cdb60998SPeter Maydell uint32_t *blk_lut; 60cdb60998SPeter Maydell 61344f4b15SPeter Maydell qemu_irq irq; 62344f4b15SPeter Maydell 63344f4b15SPeter Maydell /* Properties */ 64344f4b15SPeter Maydell MemoryRegion *downstream; 65344f4b15SPeter Maydell 66344f4b15SPeter Maydell hwaddr blocksize; 67344f4b15SPeter Maydell uint32_t blk_max; 68344f4b15SPeter Maydell 69344f4b15SPeter Maydell /* MemoryRegions exposed to user */ 70344f4b15SPeter Maydell MemoryRegion regmr; 71344f4b15SPeter Maydell IOMMUMemoryRegion upstream; 72344f4b15SPeter Maydell 73344f4b15SPeter Maydell /* MemoryRegion used internally */ 74344f4b15SPeter Maydell MemoryRegion blocked_io; 75344f4b15SPeter Maydell 76344f4b15SPeter Maydell AddressSpace downstream_as; 77344f4b15SPeter Maydell AddressSpace blocked_io_as; 78344f4b15SPeter Maydell }; 79344f4b15SPeter Maydell 80344f4b15SPeter Maydell #endif 81