xref: /qemu/include/hw/ppc/pnv_chiptod.h (revision cde2ba34)
19a69950fSNicholas Piggin /*
29a69950fSNicholas Piggin  * QEMU PowerPC PowerNV Emulation of some CHIPTOD behaviour
39a69950fSNicholas Piggin  *
49a69950fSNicholas Piggin  * Copyright (c) 2022-2023, IBM Corporation.
59a69950fSNicholas Piggin  *
69a69950fSNicholas Piggin  * SPDX-License-Identifier: GPL-2.0-or-later
79a69950fSNicholas Piggin  */
89a69950fSNicholas Piggin 
99a69950fSNicholas Piggin #ifndef PPC_PNV_CHIPTOD_H
109a69950fSNicholas Piggin #define PPC_PNV_CHIPTOD_H
119a69950fSNicholas Piggin 
129a69950fSNicholas Piggin #include "qom/object.h"
139a69950fSNicholas Piggin 
149a69950fSNicholas Piggin #define TYPE_PNV_CHIPTOD "pnv-chiptod"
159a69950fSNicholas Piggin OBJECT_DECLARE_TYPE(PnvChipTOD, PnvChipTODClass, PNV_CHIPTOD)
169a69950fSNicholas Piggin #define TYPE_PNV9_CHIPTOD TYPE_PNV_CHIPTOD "-POWER9"
179a69950fSNicholas Piggin DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV9_CHIPTOD, TYPE_PNV9_CHIPTOD)
189a69950fSNicholas Piggin #define TYPE_PNV10_CHIPTOD TYPE_PNV_CHIPTOD "-POWER10"
199a69950fSNicholas Piggin DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV10_CHIPTOD, TYPE_PNV10_CHIPTOD)
209a69950fSNicholas Piggin 
219a69950fSNicholas Piggin enum tod_state {
229a69950fSNicholas Piggin     tod_error = 0,
239a69950fSNicholas Piggin     tod_not_set = 7,
249a69950fSNicholas Piggin     tod_running = 2,
259a69950fSNicholas Piggin     tod_stopped = 1,
269a69950fSNicholas Piggin };
279a69950fSNicholas Piggin 
28*cde2ba34SNicholas Piggin typedef struct PnvCore PnvCore;
29*cde2ba34SNicholas Piggin 
309a69950fSNicholas Piggin struct PnvChipTOD {
319a69950fSNicholas Piggin     DeviceState xd;
329a69950fSNicholas Piggin 
339a69950fSNicholas Piggin     PnvChip *chip;
349a69950fSNicholas Piggin     MemoryRegion xscom_regs;
359a69950fSNicholas Piggin 
369a69950fSNicholas Piggin     bool primary;
379a69950fSNicholas Piggin     bool secondary;
389a69950fSNicholas Piggin     enum tod_state tod_state;
399a69950fSNicholas Piggin     uint64_t tod_error;
409a69950fSNicholas Piggin     uint64_t pss_mss_ctrl_reg;
41*cde2ba34SNicholas Piggin     PnvCore *slave_pc_target;
429a69950fSNicholas Piggin };
439a69950fSNicholas Piggin 
449a69950fSNicholas Piggin struct PnvChipTODClass {
459a69950fSNicholas Piggin     DeviceClass parent_class;
469a69950fSNicholas Piggin 
479a69950fSNicholas Piggin     void (*broadcast_ttype)(PnvChipTOD *sender, uint32_t trigger);
48*cde2ba34SNicholas Piggin     PnvCore *(*tx_ttype_target)(PnvChipTOD *chiptod, uint64_t val);
499a69950fSNicholas Piggin 
509a69950fSNicholas Piggin     int xscom_size;
519a69950fSNicholas Piggin };
529a69950fSNicholas Piggin 
539a69950fSNicholas Piggin #endif /* PPC_PNV_CHIPTOD_H */
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