xref: /qemu/include/hw/ppc/pnv_lpc.h (revision abff1abf)
1 /*
2  * QEMU PowerPC PowerNV LPC controller
3  *
4  * Copyright (c) 2016, IBM Corporation.
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef PPC_PNV_LPC_H
21 #define PPC_PNV_LPC_H
22 
23 #include "hw/ppc/pnv_psi.h"
24 
25 #define TYPE_PNV_LPC "pnv-lpc"
26 #define PNV_LPC(obj) \
27      OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC)
28 #define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8"
29 #define PNV8_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV8_LPC)
30 
31 #define TYPE_PNV9_LPC TYPE_PNV_LPC "-POWER9"
32 #define PNV9_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV9_LPC)
33 
34 #define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10"
35 #define PNV10_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV10_LPC)
36 
37 typedef struct PnvLpcController {
38     DeviceState parent;
39 
40     uint64_t eccb_stat_reg;
41     uint32_t eccb_data_reg;
42 
43     /* OPB bus */
44     MemoryRegion opb_mr;
45     AddressSpace opb_as;
46 
47     /* ISA IO and Memory space */
48     MemoryRegion isa_io;
49     MemoryRegion isa_mem;
50     MemoryRegion isa_fw;
51 
52     /* Windows from OPB to ISA (aliases) */
53     MemoryRegion opb_isa_io;
54     MemoryRegion opb_isa_mem;
55     MemoryRegion opb_isa_fw;
56 
57     /* Registers */
58     MemoryRegion lpc_hc_regs;
59     MemoryRegion opb_master_regs;
60 
61     /* OPB Master LS registers */
62     uint32_t opb_irq_route0;
63     uint32_t opb_irq_route1;
64     uint32_t opb_irq_stat;
65     uint32_t opb_irq_mask;
66     uint32_t opb_irq_pol;
67     uint32_t opb_irq_input;
68 
69     /* LPC HC registers */
70     uint32_t lpc_hc_fw_seg_idsel;
71     uint32_t lpc_hc_fw_rd_acc_size;
72     uint32_t lpc_hc_irqser_ctrl;
73     uint32_t lpc_hc_irqmask;
74     uint32_t lpc_hc_irqstat;
75     uint32_t lpc_hc_error_addr;
76 
77     /* XSCOM registers */
78     MemoryRegion xscom_regs;
79 
80     /* PSI to generate interrupts */
81     PnvPsi *psi;
82 } PnvLpcController;
83 
84 #define PNV_LPC_CLASS(klass) \
85      OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC)
86 #define PNV_LPC_GET_CLASS(obj) \
87      OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC)
88 
89 typedef struct PnvLpcClass {
90     DeviceClass parent_class;
91 
92     int psi_irq;
93 
94     DeviceRealize parent_realize;
95 } PnvLpcClass;
96 
97 /*
98  * Old compilers error on typdef forward declarations. Keep them happy.
99  */
100 struct PnvChip;
101 
102 ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
103 int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset,
104                uint64_t lpcm_addr, uint64_t lpcm_size);
105 
106 #endif /* PPC_PNV_LPC_H */
107