1 /* 2 * sPAPR CPU core device. 3 * 4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 #ifndef HW_SPAPR_CPU_CORE_H 10 #define HW_SPAPR_CPU_CORE_H 11 12 #include "hw/cpu/core.h" 13 #include "hw/qdev-core.h" 14 #include "target/ppc/cpu-qom.h" 15 #include "target/ppc/cpu.h" 16 #include "qom/object.h" 17 18 #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" 19 typedef struct SpaprCpuCore SpaprCpuCore; 20 typedef struct SpaprCpuCoreClass SpaprCpuCoreClass; 21 DECLARE_OBJ_CHECKERS(SpaprCpuCore, SpaprCpuCoreClass, 22 SPAPR_CPU_CORE, TYPE_SPAPR_CPU_CORE) 23 24 #define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE 25 26 struct SpaprCpuCore { 27 /*< private >*/ 28 CPUCore parent_obj; 29 30 /*< public >*/ 31 PowerPCCPU **threads; 32 int node_id; 33 bool pre_3_0_migration; /* older machine don't know about SpaprCpuState */ 34 }; 35 36 struct SpaprCpuCoreClass { 37 DeviceClass parent_class; 38 const char *cpu_type; 39 }; 40 41 const char *spapr_get_cpu_core_type(const char *cpu_type); 42 void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, 43 target_ulong r1, target_ulong r3, 44 target_ulong r4); 45 46 typedef struct SpaprCpuState { 47 uint64_t vpa_addr; 48 uint64_t slb_shadow_addr, slb_shadow_size; 49 uint64_t dtl_addr, dtl_size; 50 bool prod; /* not migrated, only used to improve dispatch latencies */ 51 struct ICPState *icp; 52 struct XiveTCTX *tctx; 53 } SpaprCpuState; 54 55 static inline SpaprCpuState *spapr_cpu_state(PowerPCCPU *cpu) 56 { 57 return (SpaprCpuState *)cpu->machine_data; 58 } 59 60 #endif 61