xref: /qemu/include/hw/ppc/spapr_cpu_core.h (revision abff1abf)
1 /*
2  * sPAPR CPU core device.
3  *
4  * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
7  * See the COPYING file in the top-level directory.
8  */
9 #ifndef HW_SPAPR_CPU_CORE_H
10 #define HW_SPAPR_CPU_CORE_H
11 
12 #include "hw/cpu/core.h"
13 #include "hw/qdev-core.h"
14 #include "target/ppc/cpu-qom.h"
15 #include "target/ppc/cpu.h"
16 
17 #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core"
18 #define SPAPR_CPU_CORE(obj) \
19     OBJECT_CHECK(SpaprCpuCore, (obj), TYPE_SPAPR_CPU_CORE)
20 #define SPAPR_CPU_CORE_CLASS(klass) \
21     OBJECT_CLASS_CHECK(SpaprCpuCoreClass, (klass), TYPE_SPAPR_CPU_CORE)
22 #define SPAPR_CPU_CORE_GET_CLASS(obj) \
23      OBJECT_GET_CLASS(SpaprCpuCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
24 
25 #define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
26 
27 typedef struct SpaprCpuCore {
28     /*< private >*/
29     CPUCore parent_obj;
30 
31     /*< public >*/
32     PowerPCCPU **threads;
33     int node_id;
34     bool pre_3_0_migration; /* older machine don't know about SpaprCpuState */
35 } SpaprCpuCore;
36 
37 typedef struct SpaprCpuCoreClass {
38     DeviceClass parent_class;
39     const char *cpu_type;
40 } SpaprCpuCoreClass;
41 
42 const char *spapr_get_cpu_core_type(const char *cpu_type);
43 void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip,
44                                target_ulong r1, target_ulong r3,
45                                target_ulong r4);
46 
47 typedef struct SpaprCpuState {
48     uint64_t vpa_addr;
49     uint64_t slb_shadow_addr, slb_shadow_size;
50     uint64_t dtl_addr, dtl_size;
51     bool prod; /* not migrated, only used to improve dispatch latencies */
52     struct ICPState *icp;
53     struct XiveTCTX *tctx;
54 } SpaprCpuState;
55 
56 static inline SpaprCpuState *spapr_cpu_state(PowerPCCPU *cpu)
57 {
58     return (SpaprCpuState *)cpu->machine_data;
59 }
60 
61 #endif
62