1 /* 2 * Register Definition API: field macros 3 * 4 * Copyright (c) 2016 Xilinx Inc. 5 * Copyright (c) 2013 Peter Crosthwaite <peter.crosthwaite@xilinx.com> 6 * 7 * This work is licensed under the terms of the GNU GPL, version 2. See 8 * the COPYING file in the top-level directory. 9 */ 10 11 #ifndef REGISTERFIELDS_H 12 #define REGISTERFIELDS_H 13 14 #include "qemu/bitops.h" 15 16 /* Define constants for a 32 bit register */ 17 18 /* This macro will define A_FOO, for the byte address of a register 19 * as well as R_FOO for the uint32_t[] register number (A_FOO / 4). 20 */ 21 #define REG32(reg, addr) \ 22 enum { A_ ## reg = (addr) }; \ 23 enum { R_ ## reg = (addr) / 4 }; 24 25 #define REG8(reg, addr) \ 26 enum { A_ ## reg = (addr) }; \ 27 enum { R_ ## reg = (addr) }; 28 29 #define REG16(reg, addr) \ 30 enum { A_ ## reg = (addr) }; \ 31 enum { R_ ## reg = (addr) / 2 }; 32 33 /* Define SHIFT, LENGTH and MASK constants for a field within a register */ 34 35 /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH 36 * constants for field BAR in register FOO. 37 */ 38 #define FIELD(reg, field, shift, length) \ 39 enum { R_ ## reg ## _ ## field ## _SHIFT = (shift)}; \ 40 enum { R_ ## reg ## _ ## field ## _LENGTH = (length)}; \ 41 enum { R_ ## reg ## _ ## field ## _MASK = \ 42 MAKE_64BIT_MASK(shift, length)}; 43 44 /* Extract a field from a register */ 45 #define FIELD_EX8(storage, reg, field) \ 46 extract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 47 R_ ## reg ## _ ## field ## _LENGTH) 48 #define FIELD_EX16(storage, reg, field) \ 49 extract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 50 R_ ## reg ## _ ## field ## _LENGTH) 51 #define FIELD_EX32(storage, reg, field) \ 52 extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 53 R_ ## reg ## _ ## field ## _LENGTH) 54 #define FIELD_EX64(storage, reg, field) \ 55 extract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 56 R_ ## reg ## _ ## field ## _LENGTH) 57 58 /* Extract a field from an array of registers */ 59 #define ARRAY_FIELD_EX32(regs, reg, field) \ 60 FIELD_EX32((regs)[R_ ## reg], reg, field) 61 62 /* Deposit a register field. 63 * Assigning values larger then the target field will result in 64 * compilation warnings. 65 */ 66 #define FIELD_DP8(storage, reg, field, val) ({ \ 67 struct { \ 68 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ 69 } v = { .v = val }; \ 70 uint8_t d; \ 71 d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 72 R_ ## reg ## _ ## field ## _LENGTH, v.v); \ 73 d; }) 74 #define FIELD_DP16(storage, reg, field, val) ({ \ 75 struct { \ 76 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ 77 } v = { .v = val }; \ 78 uint16_t d; \ 79 d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 80 R_ ## reg ## _ ## field ## _LENGTH, v.v); \ 81 d; }) 82 #define FIELD_DP32(storage, reg, field, val) ({ \ 83 struct { \ 84 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ 85 } v = { .v = val }; \ 86 uint32_t d; \ 87 d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 88 R_ ## reg ## _ ## field ## _LENGTH, v.v); \ 89 d; }) 90 #define FIELD_DP64(storage, reg, field, val) ({ \ 91 struct { \ 92 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ 93 } v = { .v = val }; \ 94 uint64_t d; \ 95 d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \ 96 R_ ## reg ## _ ## field ## _LENGTH, v.v); \ 97 d; }) 98 99 /* Deposit a field to array of registers. */ 100 #define ARRAY_FIELD_DP32(regs, reg, field, val) \ 101 (regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val); 102 103 #endif 104