xref: /qemu/include/hw/timer/i8254.h (revision 6402cbbb)
1 /*
2  * QEMU 8253/8254 interval timer emulation
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef HW_I8254_H
26 #define HW_I8254_H
27 
28 #include "hw/hw.h"
29 #include "hw/isa/isa.h"
30 
31 #define PIT_FREQ 1193182
32 
33 typedef struct PITChannelInfo {
34     int gate;
35     int mode;
36     int initial_count;
37     int out;
38 } PITChannelInfo;
39 
40 #define TYPE_PIT_COMMON "pit-common"
41 #define PIT_COMMON(obj) \
42      OBJECT_CHECK(PITCommonState, (obj), TYPE_PIT_COMMON)
43 #define PIT_COMMON_CLASS(klass) \
44      OBJECT_CLASS_CHECK(PITCommonClass, (klass), TYPE_PIT_COMMON)
45 #define PIT_COMMON_GET_CLASS(obj) \
46      OBJECT_GET_CLASS(PITCommonClass, (obj), TYPE_PIT_COMMON)
47 
48 #define TYPE_I8254 "isa-pit"
49 #define TYPE_KVM_I8254 "kvm-pit"
50 
51 static inline ISADevice *pit_init(ISABus *bus, int base, int isa_irq,
52                                   qemu_irq alt_irq)
53 {
54     DeviceState *dev;
55     ISADevice *d;
56 
57     d = isa_create(bus, TYPE_I8254);
58     dev = DEVICE(d);
59     qdev_prop_set_uint32(dev, "iobase", base);
60     qdev_init_nofail(dev);
61     qdev_connect_gpio_out(dev, 0,
62                           isa_irq >= 0 ? isa_get_irq(d, isa_irq) : alt_irq);
63 
64     return d;
65 }
66 
67 static inline ISADevice *kvm_pit_init(ISABus *bus, int base)
68 {
69     DeviceState *dev;
70     ISADevice *d;
71 
72     d = isa_create(bus, TYPE_KVM_I8254);
73     dev = DEVICE(d);
74     qdev_prop_set_uint32(dev, "iobase", base);
75     qdev_init_nofail(dev);
76 
77     return d;
78 }
79 
80 void pit_set_gate(ISADevice *dev, int channel, int val);
81 void pit_get_channel_info(ISADevice *dev, int channel, PITChannelInfo *info);
82 
83 #endif /* HW_I8254_H */
84