xref: /qemu/include/hw/timer/renesas_tmr.h (revision abff1abf)
1 /*
2  * Renesas 8bit timer Object
3  *
4  * Copyright (c) 2018 Yoshinori Sato
5  *
6  * SPDX-License-Identifier: GPL-2.0-or-later
7  */
8 
9 #ifndef HW_TIMER_RENESAS_TMR_H
10 #define HW_TIMER_RENESAS_TMR_H
11 
12 #include "qemu/timer.h"
13 #include "hw/sysbus.h"
14 
15 #define TYPE_RENESAS_TMR "renesas-tmr"
16 #define RTMR(obj) OBJECT_CHECK(RTMRState, (obj), TYPE_RENESAS_TMR)
17 
18 enum timer_event {
19     cmia = 0,
20     cmib = 1,
21     ovi = 2,
22     none = 3,
23     TMR_NR_EVENTS = 4
24 };
25 
26 enum {
27     TMR_CH = 2,
28     TMR_NR_IRQ = 3 * TMR_CH
29 };
30 
31 typedef struct RTMRState {
32     /*< private >*/
33     SysBusDevice parent_obj;
34     /*< public >*/
35 
36     uint64_t input_freq;
37     MemoryRegion memory;
38 
39     int64_t tick;
40     uint8_t tcnt[TMR_CH];
41     uint8_t tcora[TMR_CH];
42     uint8_t tcorb[TMR_CH];
43     uint8_t tcr[TMR_CH];
44     uint8_t tccr[TMR_CH];
45     uint8_t tcor[TMR_CH];
46     uint8_t tcsr[TMR_CH];
47     int64_t div_round[TMR_CH];
48     uint8_t next[TMR_CH];
49     qemu_irq cmia[TMR_CH];
50     qemu_irq cmib[TMR_CH];
51     qemu_irq ovi[TMR_CH];
52     QEMUTimer timer[TMR_CH];
53 } RTMRState;
54 
55 #endif
56