xref: /qemu/include/hw/watchdog/allwinner-wdt.h (revision 7bdd67a5)
1 /*
2  * Allwinner Watchdog emulation
3  *
4  * Copyright (C) 2023 Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
5  *
6  *  This file is derived from Allwinner RTC,
7  *  by Niek Linnenbank.
8  *
9  * This program is free software: you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation, either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22 
23 #ifndef HW_WATCHDOG_ALLWINNER_WDT_H
24 #define HW_WATCHDOG_ALLWINNER_WDT_H
25 
26 #include "qom/object.h"
27 #include "hw/ptimer.h"
28 #include "hw/sysbus.h"
29 
30 /*
31  * This is a model of the Allwinner watchdog.
32  * Since watchdog registers belong to the timer module (and are shared with the
33  * RTC module), the interrupt line from watchdog is not handled right now.
34  * In QEMU, we just wire up the watchdog reset to watchdog_perform_action(),
35  * at least for the moment.
36  */
37 
38 #define TYPE_AW_WDT    "allwinner-wdt"
39 
40 /** Allwinner WDT sun4i family (A10, A12), also sun7i (A20) */
41 #define TYPE_AW_WDT_SUN4I    TYPE_AW_WDT "-sun4i"
42 
43 /** Allwinner WDT sun6i family and newer (A31, H2+, H3, etc) */
44 #define TYPE_AW_WDT_SUN6I    TYPE_AW_WDT "-sun6i"
45 
46 /** Number of WDT registers */
47 #define AW_WDT_REGS_NUM      (5)
48 
49 OBJECT_DECLARE_TYPE(AwWdtState, AwWdtClass, AW_WDT)
50 
51 /**
52  * Allwinner WDT object instance state.
53  */
54 struct AwWdtState {
55     /*< private >*/
56     SysBusDevice parent_obj;
57 
58     /*< public >*/
59     MemoryRegion iomem;
60     struct ptimer_state *timer;
61 
62     uint32_t regs[AW_WDT_REGS_NUM];
63 };
64 
65 /**
66  * Allwinner WDT class-level struct.
67  *
68  * This struct is filled by each sunxi device specific code
69  * such that the generic code can use this struct to support
70  * all devices.
71  */
72 struct AwWdtClass {
73     /*< private >*/
74     SysBusDeviceClass parent_class;
75     /*< public >*/
76 
77     /** Defines device specific register map */
78     const uint8_t *regmap;
79 
80     /** Size of the regmap in bytes */
81     size_t regmap_size;
82 
83     /**
84      * Read device specific register
85      *
86      * @offset: register offset to read
87      * @return true if register read successful, false otherwise
88      */
89     bool (*read)(AwWdtState *s, uint32_t offset);
90 
91     /**
92      * Write device specific register
93      *
94      * @offset: register offset to write
95      * @data: value to set in register
96      * @return true if register write successful, false otherwise
97      */
98     bool (*write)(AwWdtState *s, uint32_t offset, uint32_t data);
99 
100     /**
101      * Check if watchdog can generate system reset
102      *
103      * @return true if watchdog can generate system reset
104      */
105     bool (*can_reset_system)(AwWdtState *s);
106 
107     /**
108      * Check if provided key is valid
109      *
110      * @value: value written to register
111      * @return true if key is valid, false otherwise
112      */
113     bool (*is_key_valid)(AwWdtState *s, uint32_t val);
114 
115     /**
116      * Get current INTV_VALUE setting
117      *
118      * @return current INTV_VALUE (0-15)
119      */
120     uint8_t (*get_intv_value)(AwWdtState *s);
121 };
122 
123 #endif /* HW_WATCHDOG_ALLWINNER_WDT_H */
124