1 /* 2 * ARM CMSDK APB watchdog emulation 3 * 4 * Copyright (c) 2018 Linaro Limited 5 * Written by Peter Maydell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or 9 * (at your option) any later version. 10 */ 11 12 /* 13 * This is a model of the "APB watchdog" which is part of the Cortex-M 14 * System Design Kit (CMSDK) and documented in the Cortex-M System 15 * Design Kit Technical Reference Manual (ARM DDI0479C): 16 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit 17 * 18 * QEMU interface: 19 * + QOM property "wdogclk-frq": frequency at which the watchdog is clocked 20 * + Clock input "WDOGCLK": clock for the watchdog's timer 21 * + sysbus MMIO region 0: the register bank 22 * + sysbus IRQ 0: watchdog interrupt 23 * 24 * In real hardware the watchdog's reset output is just a GPIO line 25 * which can then be masked by the board or treated as a simple interrupt. 26 * (For instance the IoTKit does this with the non-secure watchdog, so that 27 * secure code can control whether non-secure code can perform a system 28 * reset via its watchdog.) In QEMU, we just wire up the watchdog reset 29 * to watchdog_perform_action(), at least for the moment. 30 */ 31 32 #ifndef CMSDK_APB_WATCHDOG_H 33 #define CMSDK_APB_WATCHDOG_H 34 35 #include "hw/sysbus.h" 36 #include "hw/ptimer.h" 37 #include "hw/clock.h" 38 #include "qom/object.h" 39 40 #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog" 41 OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBWatchdog, CMSDK_APB_WATCHDOG) 42 43 /* 44 * This shares the same struct (and cast macro) as the base 45 * cmsdk-apb-watchdog device. 46 */ 47 #define TYPE_LUMINARY_WATCHDOG "luminary-watchdog" 48 49 struct CMSDKAPBWatchdog { 50 /*< private >*/ 51 SysBusDevice parent_obj; 52 53 /*< public >*/ 54 MemoryRegion iomem; 55 qemu_irq wdogint; 56 uint32_t wdogclk_frq; 57 bool is_luminary; 58 struct ptimer_state *timer; 59 Clock *wdogclk; 60 61 uint32_t control; 62 uint32_t intstatus; 63 uint32_t lock; 64 uint32_t itcr; 65 uint32_t itop; 66 uint32_t resetstatus; 67 const uint32_t *id; 68 }; 69 70 #endif 71