18ac98aedSDavid Woodhouse /* SPDX-License-Identifier: MIT */ 250c88402SJoao Martins /****************************************************************************** 350c88402SJoao Martins * arch-x86/xen.h 450c88402SJoao Martins * 550c88402SJoao Martins * Guest OS interface to x86 Xen. 650c88402SJoao Martins * 750c88402SJoao Martins * Copyright (c) 2004-2006, K A Fraser 850c88402SJoao Martins */ 950c88402SJoao Martins 1050c88402SJoao Martins #include "../xen.h" 1150c88402SJoao Martins 1250c88402SJoao Martins #ifndef __XEN_PUBLIC_ARCH_X86_XEN_H__ 1350c88402SJoao Martins #define __XEN_PUBLIC_ARCH_X86_XEN_H__ 1450c88402SJoao Martins 1550c88402SJoao Martins /* Structural guest handles introduced in 0x00030201. */ 1650c88402SJoao Martins #if __XEN_INTERFACE_VERSION__ >= 0x00030201 1750c88402SJoao Martins #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 1850c88402SJoao Martins typedef struct { type *p; } __guest_handle_ ## name 1950c88402SJoao Martins #else 2050c88402SJoao Martins #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 2150c88402SJoao Martins typedef type * __guest_handle_ ## name 2250c88402SJoao Martins #endif 2350c88402SJoao Martins 2450c88402SJoao Martins /* 2550c88402SJoao Martins * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field 2650c88402SJoao Martins * in a struct in memory. 2750c88402SJoao Martins * XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an 2850c88402SJoao Martins * hypercall argument. 2950c88402SJoao Martins * XEN_GUEST_HANDLE_PARAM and XEN_GUEST_HANDLE are the same on X86 but 3050c88402SJoao Martins * they might not be on other architectures. 3150c88402SJoao Martins */ 3250c88402SJoao Martins #define __DEFINE_XEN_GUEST_HANDLE(name, type) \ 3350c88402SJoao Martins ___DEFINE_XEN_GUEST_HANDLE(name, type); \ 3450c88402SJoao Martins ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) 3550c88402SJoao Martins #define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) 3650c88402SJoao Martins #define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name 3750c88402SJoao Martins #define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) 3850c88402SJoao Martins #define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name) 3950c88402SJoao Martins #define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0) 4050c88402SJoao Martins #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) 4150c88402SJoao Martins 4250c88402SJoao Martins #if defined(__i386__) 4350c88402SJoao Martins # ifdef __XEN__ 4450c88402SJoao Martins __DeFiNe__ __DECL_REG_LO8(which) uint32_t e ## which ## x 4550c88402SJoao Martins __DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name; } 4650c88402SJoao Martins # endif 4750c88402SJoao Martins #include "xen-x86_32.h" 4850c88402SJoao Martins # ifdef __XEN__ 4950c88402SJoao Martins __UnDeF__ __DECL_REG_LO8 5050c88402SJoao Martins __UnDeF__ __DECL_REG_LO16 5150c88402SJoao Martins __DeFiNe__ __DECL_REG_LO8(which) e ## which ## x 5250c88402SJoao Martins __DeFiNe__ __DECL_REG_LO16(name) e ## name 5350c88402SJoao Martins # endif 5450c88402SJoao Martins #elif defined(__x86_64__) 5550c88402SJoao Martins #include "xen-x86_64.h" 5650c88402SJoao Martins #endif 5750c88402SJoao Martins 5850c88402SJoao Martins #ifndef __ASSEMBLY__ 5950c88402SJoao Martins typedef unsigned long xen_pfn_t; 6050c88402SJoao Martins #define PRI_xen_pfn "lx" 6150c88402SJoao Martins #define PRIu_xen_pfn "lu" 6250c88402SJoao Martins #endif 6350c88402SJoao Martins 6450c88402SJoao Martins #define XEN_HAVE_PV_GUEST_ENTRY 1 6550c88402SJoao Martins 6650c88402SJoao Martins #define XEN_HAVE_PV_UPCALL_MASK 1 6750c88402SJoao Martins 6850c88402SJoao Martins /* 6950c88402SJoao Martins * `incontents 200 segdesc Segment Descriptor Tables 7050c88402SJoao Martins */ 7150c88402SJoao Martins /* 7250c88402SJoao Martins * ` enum neg_errnoval 7350c88402SJoao Martins * ` HYPERVISOR_set_gdt(const xen_pfn_t frames[], unsigned int entries); 7450c88402SJoao Martins * ` 7550c88402SJoao Martins */ 7650c88402SJoao Martins /* 7750c88402SJoao Martins * A number of GDT entries are reserved by Xen. These are not situated at the 7850c88402SJoao Martins * start of the GDT because some stupid OSes export hard-coded selector values 7950c88402SJoao Martins * in their ABI. These hard-coded values are always near the start of the GDT, 8050c88402SJoao Martins * so Xen places itself out of the way, at the far end of the GDT. 8150c88402SJoao Martins * 8250c88402SJoao Martins * NB The LDT is set using the MMUEXT_SET_LDT op of HYPERVISOR_mmuext_op 8350c88402SJoao Martins */ 8450c88402SJoao Martins #define FIRST_RESERVED_GDT_PAGE 14 8550c88402SJoao Martins #define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096) 8650c88402SJoao Martins #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) 8750c88402SJoao Martins 8850c88402SJoao Martins 8950c88402SJoao Martins /* 9050c88402SJoao Martins * ` enum neg_errnoval 9150c88402SJoao Martins * ` HYPERVISOR_update_descriptor(u64 pa, u64 desc); 9250c88402SJoao Martins * ` 9350c88402SJoao Martins * ` @pa The machine physical address of the descriptor to 9450c88402SJoao Martins * ` update. Must be either a descriptor page or writable. 9550c88402SJoao Martins * ` @desc The descriptor value to update, in the same format as a 9650c88402SJoao Martins * ` native descriptor table entry. 9750c88402SJoao Martins */ 9850c88402SJoao Martins 9950c88402SJoao Martins /* Maximum number of virtual CPUs in legacy multi-processor guests. */ 10050c88402SJoao Martins #define XEN_LEGACY_MAX_VCPUS 32 10150c88402SJoao Martins 10250c88402SJoao Martins #ifndef __ASSEMBLY__ 10350c88402SJoao Martins 10450c88402SJoao Martins typedef unsigned long xen_ulong_t; 10550c88402SJoao Martins #define PRI_xen_ulong "lx" 10650c88402SJoao Martins 10750c88402SJoao Martins /* 10850c88402SJoao Martins * ` enum neg_errnoval 10950c88402SJoao Martins * ` HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp); 11050c88402SJoao Martins * ` 11150c88402SJoao Martins * Sets the stack segment and pointer for the current vcpu. 11250c88402SJoao Martins */ 11350c88402SJoao Martins 11450c88402SJoao Martins /* 11550c88402SJoao Martins * ` enum neg_errnoval 11650c88402SJoao Martins * ` HYPERVISOR_set_trap_table(const struct trap_info traps[]); 11750c88402SJoao Martins * ` 11850c88402SJoao Martins */ 11950c88402SJoao Martins /* 12050c88402SJoao Martins * Send an array of these to HYPERVISOR_set_trap_table(). 12150c88402SJoao Martins * Terminate the array with a sentinel entry, with traps[].address==0. 12250c88402SJoao Martins * The privilege level specifies which modes may enter a trap via a software 12350c88402SJoao Martins * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate 12450c88402SJoao Martins * privilege levels as follows: 12550c88402SJoao Martins * Level == 0: Noone may enter 12650c88402SJoao Martins * Level == 1: Kernel may enter 12750c88402SJoao Martins * Level == 2: Kernel may enter 12850c88402SJoao Martins * Level == 3: Everyone may enter 12950c88402SJoao Martins * 13050c88402SJoao Martins * Note: For compatibility with kernels not setting up exception handlers 13150c88402SJoao Martins * early enough, Xen will avoid trying to inject #GP (and hence crash 13250c88402SJoao Martins * the domain) when an RDMSR would require this, but no handler was 13350c88402SJoao Martins * set yet. The precise conditions are implementation specific, and 13450c88402SJoao Martins * new code may not rely on such behavior anyway. 13550c88402SJoao Martins */ 13650c88402SJoao Martins #define TI_GET_DPL(_ti) ((_ti)->flags & 3) 13750c88402SJoao Martins #define TI_GET_IF(_ti) ((_ti)->flags & 4) 13850c88402SJoao Martins #define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl)) 13950c88402SJoao Martins #define TI_SET_IF(_ti,_if) ((_ti)->flags |= ((!!(_if))<<2)) 14050c88402SJoao Martins struct trap_info { 14150c88402SJoao Martins uint8_t vector; /* exception vector */ 14250c88402SJoao Martins uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ 14350c88402SJoao Martins uint16_t cs; /* code selector */ 14450c88402SJoao Martins unsigned long address; /* code offset */ 14550c88402SJoao Martins }; 14650c88402SJoao Martins typedef struct trap_info trap_info_t; 14750c88402SJoao Martins DEFINE_XEN_GUEST_HANDLE(trap_info_t); 14850c88402SJoao Martins 14950c88402SJoao Martins typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ 15050c88402SJoao Martins 15150c88402SJoao Martins /* 15250c88402SJoao Martins * The following is all CPU context. Note that the fpu_ctxt block is filled 15350c88402SJoao Martins * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. 15450c88402SJoao Martins * 15550c88402SJoao Martins * Also note that when calling DOMCTL_setvcpucontext for HVM guests, not all 15650c88402SJoao Martins * information in this structure is updated, the fields read include: fpu_ctxt 15750c88402SJoao Martins * (if VGCT_I387_VALID is set), flags, user_regs and debugreg[*]. 15850c88402SJoao Martins * 15950c88402SJoao Martins * Note: VCPUOP_initialise for HVM guests is non-symetric with 16050c88402SJoao Martins * DOMCTL_setvcpucontext, and uses struct vcpu_hvm_context from hvm/hvm_vcpu.h 16150c88402SJoao Martins */ 16250c88402SJoao Martins struct vcpu_guest_context { 16350c88402SJoao Martins /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ 16450c88402SJoao Martins struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */ 16550c88402SJoao Martins #define VGCF_I387_VALID (1<<0) 16650c88402SJoao Martins #define VGCF_IN_KERNEL (1<<2) 16750c88402SJoao Martins #define _VGCF_i387_valid 0 16850c88402SJoao Martins #define VGCF_i387_valid (1<<_VGCF_i387_valid) 16950c88402SJoao Martins #define _VGCF_in_kernel 2 17050c88402SJoao Martins #define VGCF_in_kernel (1<<_VGCF_in_kernel) 17150c88402SJoao Martins #define _VGCF_failsafe_disables_events 3 17250c88402SJoao Martins #define VGCF_failsafe_disables_events (1<<_VGCF_failsafe_disables_events) 17350c88402SJoao Martins #define _VGCF_syscall_disables_events 4 17450c88402SJoao Martins #define VGCF_syscall_disables_events (1<<_VGCF_syscall_disables_events) 17550c88402SJoao Martins #define _VGCF_online 5 17650c88402SJoao Martins #define VGCF_online (1<<_VGCF_online) 17750c88402SJoao Martins unsigned long flags; /* VGCF_* flags */ 17850c88402SJoao Martins struct cpu_user_regs user_regs; /* User-level CPU registers */ 17950c88402SJoao Martins struct trap_info trap_ctxt[256]; /* Virtual IDT */ 18050c88402SJoao Martins unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ 18150c88402SJoao Martins unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ 18250c88402SJoao Martins unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ 18350c88402SJoao Martins /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */ 18450c88402SJoao Martins unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ 18550c88402SJoao Martins unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ 18650c88402SJoao Martins #ifdef __i386__ 18750c88402SJoao Martins unsigned long event_callback_cs; /* CS:EIP of event callback */ 18850c88402SJoao Martins unsigned long event_callback_eip; 18950c88402SJoao Martins unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ 19050c88402SJoao Martins unsigned long failsafe_callback_eip; 19150c88402SJoao Martins #else 19250c88402SJoao Martins unsigned long event_callback_eip; 19350c88402SJoao Martins unsigned long failsafe_callback_eip; 19450c88402SJoao Martins #ifdef __XEN__ 19550c88402SJoao Martins union { 19650c88402SJoao Martins unsigned long syscall_callback_eip; 19750c88402SJoao Martins struct { 19850c88402SJoao Martins unsigned int event_callback_cs; /* compat CS of event cb */ 19950c88402SJoao Martins unsigned int failsafe_callback_cs; /* compat CS of failsafe cb */ 20050c88402SJoao Martins }; 20150c88402SJoao Martins }; 20250c88402SJoao Martins #else 20350c88402SJoao Martins unsigned long syscall_callback_eip; 20450c88402SJoao Martins #endif 20550c88402SJoao Martins #endif 20650c88402SJoao Martins unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ 20750c88402SJoao Martins #ifdef __x86_64__ 20850c88402SJoao Martins /* Segment base addresses. */ 20950c88402SJoao Martins uint64_t fs_base; 21050c88402SJoao Martins uint64_t gs_base_kernel; 21150c88402SJoao Martins uint64_t gs_base_user; 21250c88402SJoao Martins #endif 21350c88402SJoao Martins }; 21450c88402SJoao Martins typedef struct vcpu_guest_context vcpu_guest_context_t; 21550c88402SJoao Martins DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 21650c88402SJoao Martins 21750c88402SJoao Martins struct arch_shared_info { 21850c88402SJoao Martins /* 21950c88402SJoao Martins * Number of valid entries in the p2m table(s) anchored at 22050c88402SJoao Martins * pfn_to_mfn_frame_list_list and/or p2m_vaddr. 22150c88402SJoao Martins */ 22250c88402SJoao Martins unsigned long max_pfn; 22350c88402SJoao Martins /* 22450c88402SJoao Martins * Frame containing list of mfns containing list of mfns containing p2m. 22550c88402SJoao Martins * A value of 0 indicates it has not yet been set up, ~0 indicates it has 22650c88402SJoao Martins * been set to invalid e.g. due to the p2m being too large for the 3-level 22750c88402SJoao Martins * p2m tree. In this case the linear mapper p2m list anchored at p2m_vaddr 22850c88402SJoao Martins * is to be used. 22950c88402SJoao Martins */ 23050c88402SJoao Martins xen_pfn_t pfn_to_mfn_frame_list_list; 23150c88402SJoao Martins unsigned long nmi_reason; 23250c88402SJoao Martins /* 23350c88402SJoao Martins * Following three fields are valid if p2m_cr3 contains a value different 23450c88402SJoao Martins * from 0. 23550c88402SJoao Martins * p2m_cr3 is the root of the address space where p2m_vaddr is valid. 23650c88402SJoao Martins * p2m_cr3 is in the same format as a cr3 value in the vcpu register state 23750c88402SJoao Martins * and holds the folded machine frame number (via xen_pfn_to_cr3) of a 23850c88402SJoao Martins * L3 or L4 page table. 23950c88402SJoao Martins * p2m_vaddr holds the virtual address of the linear p2m list. All entries 24050c88402SJoao Martins * in the range [0...max_pfn[ are accessible via this pointer. 24150c88402SJoao Martins * p2m_generation will be incremented by the guest before and after each 24250c88402SJoao Martins * change of the mappings of the p2m list. p2m_generation starts at 0 and 24350c88402SJoao Martins * a value with the least significant bit set indicates that a mapping 24450c88402SJoao Martins * update is in progress. This allows guest external software (e.g. in Dom0) 24550c88402SJoao Martins * to verify that read mappings are consistent and whether they have changed 24650c88402SJoao Martins * since the last check. 24750c88402SJoao Martins * Modifying a p2m element in the linear p2m list is allowed via an atomic 24850c88402SJoao Martins * write only. 24950c88402SJoao Martins */ 25050c88402SJoao Martins unsigned long p2m_cr3; /* cr3 value of the p2m address space */ 25150c88402SJoao Martins unsigned long p2m_vaddr; /* virtual address of the p2m list */ 25250c88402SJoao Martins unsigned long p2m_generation; /* generation count of p2m mapping */ 25350c88402SJoao Martins #ifdef __i386__ 25450c88402SJoao Martins /* There's no room for this field in the generic structure. */ 25550c88402SJoao Martins uint32_t wc_sec_hi; 25650c88402SJoao Martins #endif 25750c88402SJoao Martins }; 25850c88402SJoao Martins typedef struct arch_shared_info arch_shared_info_t; 25950c88402SJoao Martins 26050c88402SJoao Martins #if defined(__XEN__) || defined(__XEN_TOOLS__) 26150c88402SJoao Martins /* 26250c88402SJoao Martins * struct xen_arch_domainconfig's ABI is covered by 26350c88402SJoao Martins * XEN_DOMCTL_INTERFACE_VERSION. 26450c88402SJoao Martins */ 26550c88402SJoao Martins struct xen_arch_domainconfig { 26650c88402SJoao Martins #define _XEN_X86_EMU_LAPIC 0 26750c88402SJoao Martins #define XEN_X86_EMU_LAPIC (1U<<_XEN_X86_EMU_LAPIC) 26850c88402SJoao Martins #define _XEN_X86_EMU_HPET 1 26950c88402SJoao Martins #define XEN_X86_EMU_HPET (1U<<_XEN_X86_EMU_HPET) 27050c88402SJoao Martins #define _XEN_X86_EMU_PM 2 27150c88402SJoao Martins #define XEN_X86_EMU_PM (1U<<_XEN_X86_EMU_PM) 27250c88402SJoao Martins #define _XEN_X86_EMU_RTC 3 27350c88402SJoao Martins #define XEN_X86_EMU_RTC (1U<<_XEN_X86_EMU_RTC) 27450c88402SJoao Martins #define _XEN_X86_EMU_IOAPIC 4 27550c88402SJoao Martins #define XEN_X86_EMU_IOAPIC (1U<<_XEN_X86_EMU_IOAPIC) 27650c88402SJoao Martins #define _XEN_X86_EMU_PIC 5 27750c88402SJoao Martins #define XEN_X86_EMU_PIC (1U<<_XEN_X86_EMU_PIC) 27850c88402SJoao Martins #define _XEN_X86_EMU_VGA 6 27950c88402SJoao Martins #define XEN_X86_EMU_VGA (1U<<_XEN_X86_EMU_VGA) 28050c88402SJoao Martins #define _XEN_X86_EMU_IOMMU 7 28150c88402SJoao Martins #define XEN_X86_EMU_IOMMU (1U<<_XEN_X86_EMU_IOMMU) 28250c88402SJoao Martins #define _XEN_X86_EMU_PIT 8 28350c88402SJoao Martins #define XEN_X86_EMU_PIT (1U<<_XEN_X86_EMU_PIT) 28450c88402SJoao Martins #define _XEN_X86_EMU_USE_PIRQ 9 28550c88402SJoao Martins #define XEN_X86_EMU_USE_PIRQ (1U<<_XEN_X86_EMU_USE_PIRQ) 28650c88402SJoao Martins #define _XEN_X86_EMU_VPCI 10 28750c88402SJoao Martins #define XEN_X86_EMU_VPCI (1U<<_XEN_X86_EMU_VPCI) 28850c88402SJoao Martins 28950c88402SJoao Martins #define XEN_X86_EMU_ALL (XEN_X86_EMU_LAPIC | XEN_X86_EMU_HPET | \ 29050c88402SJoao Martins XEN_X86_EMU_PM | XEN_X86_EMU_RTC | \ 29150c88402SJoao Martins XEN_X86_EMU_IOAPIC | XEN_X86_EMU_PIC | \ 29250c88402SJoao Martins XEN_X86_EMU_VGA | XEN_X86_EMU_IOMMU | \ 29350c88402SJoao Martins XEN_X86_EMU_PIT | XEN_X86_EMU_USE_PIRQ |\ 29450c88402SJoao Martins XEN_X86_EMU_VPCI) 29550c88402SJoao Martins uint32_t emulation_flags; 29650c88402SJoao Martins 29750c88402SJoao Martins /* 29850c88402SJoao Martins * Select whether to use a relaxed behavior for accesses to MSRs not explicitly 29950c88402SJoao Martins * handled by Xen instead of injecting a #GP to the guest. Note this option 30050c88402SJoao Martins * doesn't allow the guest to read or write to the underlying MSR. 30150c88402SJoao Martins */ 30250c88402SJoao Martins #define XEN_X86_MSR_RELAXED (1u << 0) 30350c88402SJoao Martins uint32_t misc_flags; 30450c88402SJoao Martins }; 30550c88402SJoao Martins 3068ac98aedSDavid Woodhouse /* Max XEN_X86_* constant. Used for ABI checking. */ 3078ac98aedSDavid Woodhouse #define XEN_X86_MISC_FLAGS_MAX XEN_X86_MSR_RELAXED 30850c88402SJoao Martins 30950c88402SJoao Martins #endif 31050c88402SJoao Martins 31150c88402SJoao Martins /* 31250c88402SJoao Martins * Representations of architectural CPUID and MSR information. Used as the 31350c88402SJoao Martins * serialised version of Xen's internal representation. 31450c88402SJoao Martins */ 31550c88402SJoao Martins typedef struct xen_cpuid_leaf { 31650c88402SJoao Martins #define XEN_CPUID_NO_SUBLEAF 0xffffffffu 31750c88402SJoao Martins uint32_t leaf, subleaf; 31850c88402SJoao Martins uint32_t a, b, c, d; 31950c88402SJoao Martins } xen_cpuid_leaf_t; 32050c88402SJoao Martins DEFINE_XEN_GUEST_HANDLE(xen_cpuid_leaf_t); 32150c88402SJoao Martins 32250c88402SJoao Martins typedef struct xen_msr_entry { 32350c88402SJoao Martins uint32_t idx; 32450c88402SJoao Martins uint32_t flags; /* Reserved MBZ. */ 32550c88402SJoao Martins uint64_t val; 32650c88402SJoao Martins } xen_msr_entry_t; 32750c88402SJoao Martins DEFINE_XEN_GUEST_HANDLE(xen_msr_entry_t); 32850c88402SJoao Martins 32950c88402SJoao Martins #endif /* !__ASSEMBLY__ */ 33050c88402SJoao Martins 33150c88402SJoao Martins /* 33250c88402SJoao Martins * ` enum neg_errnoval 33350c88402SJoao Martins * ` HYPERVISOR_fpu_taskswitch(int set); 33450c88402SJoao Martins * ` 33550c88402SJoao Martins * Sets (if set!=0) or clears (if set==0) CR0.TS. 33650c88402SJoao Martins */ 33750c88402SJoao Martins 33850c88402SJoao Martins /* 33950c88402SJoao Martins * ` enum neg_errnoval 34050c88402SJoao Martins * ` HYPERVISOR_set_debugreg(int regno, unsigned long value); 34150c88402SJoao Martins * 34250c88402SJoao Martins * ` unsigned long 34350c88402SJoao Martins * ` HYPERVISOR_get_debugreg(int regno); 34450c88402SJoao Martins * For 0<=reg<=7, returns the debug register value. 34550c88402SJoao Martins * For other values of reg, returns ((unsigned long)-EINVAL). 34650c88402SJoao Martins * (Unfortunately, this interface is defective.) 34750c88402SJoao Martins */ 34850c88402SJoao Martins 34950c88402SJoao Martins /* 35050c88402SJoao Martins * Prefix forces emulation of some non-trapping instructions. 35150c88402SJoao Martins * Currently only CPUID. 35250c88402SJoao Martins */ 35350c88402SJoao Martins #ifdef __ASSEMBLY__ 35450c88402SJoao Martins #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ; 35550c88402SJoao Martins #define XEN_CPUID XEN_EMULATE_PREFIX cpuid 35650c88402SJoao Martins #else 35750c88402SJoao Martins #define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; " 35850c88402SJoao Martins #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" 35950c88402SJoao Martins #endif 36050c88402SJoao Martins 36150c88402SJoao Martins /* 36250c88402SJoao Martins * Debug console IO port, also called "port E9 hack". Each character written 36350c88402SJoao Martins * to this IO port will be printed on the hypervisor console, subject to log 36450c88402SJoao Martins * level restrictions. 36550c88402SJoao Martins */ 36650c88402SJoao Martins #define XEN_HVM_DEBUGCONS_IOPORT 0xe9 36750c88402SJoao Martins 36850c88402SJoao Martins #endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */ 36950c88402SJoao Martins 37050c88402SJoao Martins /* 37150c88402SJoao Martins * Local variables: 37250c88402SJoao Martins * mode: C 37350c88402SJoao Martins * c-file-style: "BSD" 37450c88402SJoao Martins * c-basic-offset: 4 37550c88402SJoao Martins * tab-width: 4 37650c88402SJoao Martins * indent-tabs-mode: nil 37750c88402SJoao Martins * End: 37850c88402SJoao Martins */ 379