xref: /qemu/include/tcg/tcg-op-common.h (revision ce32a9e9)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Target independent opcode generation functions.
4  *
5  * Copyright (c) 2008 Fabrice Bellard
6  */
7 
8 #ifndef TCG_TCG_OP_COMMON_H
9 #define TCG_TCG_OP_COMMON_H
10 
11 #include "tcg/tcg.h"
12 #include "exec/helper-proto-common.h"
13 #include "exec/helper-gen-common.h"
14 
15 /* Basic output routines.  Not for general consumption.  */
16 
17 void tcg_gen_op1(TCGOpcode, TCGArg);
18 void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
19 void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
20 void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
21 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
22 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
23 
24 void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
25 void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
26 void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
27 
28 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
29 {
30     tcg_gen_op1(opc, tcgv_i32_arg(a1));
31 }
32 
33 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
34 {
35     tcg_gen_op1(opc, tcgv_i64_arg(a1));
36 }
37 
38 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
39 {
40     tcg_gen_op1(opc, a1);
41 }
42 
43 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
44 {
45     tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
46 }
47 
48 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
49 {
50     tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
51 }
52 
53 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
54 {
55     tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
56 }
57 
58 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
59 {
60     tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
61 }
62 
63 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
64 {
65     tcg_gen_op2(opc, a1, a2);
66 }
67 
68 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
69                                    TCGv_i32 a2, TCGv_i32 a3)
70 {
71     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
72 }
73 
74 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
75                                    TCGv_i64 a2, TCGv_i64 a3)
76 {
77     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
78 }
79 
80 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
81                                     TCGv_i32 a2, TCGArg a3)
82 {
83     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
84 }
85 
86 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
87                                     TCGv_i64 a2, TCGArg a3)
88 {
89     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
90 }
91 
92 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
93                                        TCGv_ptr base, TCGArg offset)
94 {
95     tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
96 }
97 
98 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
99                                        TCGv_ptr base, TCGArg offset)
100 {
101     tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
102 }
103 
104 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
105                                    TCGv_i32 a3, TCGv_i32 a4)
106 {
107     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
108                 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
109 }
110 
111 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
112                                    TCGv_i64 a3, TCGv_i64 a4)
113 {
114     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
115                 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
116 }
117 
118 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
119                                     TCGv_i32 a3, TCGArg a4)
120 {
121     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
122                 tcgv_i32_arg(a3), a4);
123 }
124 
125 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
126                                     TCGv_i64 a3, TCGArg a4)
127 {
128     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
129                 tcgv_i64_arg(a3), a4);
130 }
131 
132 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
133                                      TCGArg a3, TCGArg a4)
134 {
135     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
136 }
137 
138 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
139                                      TCGArg a3, TCGArg a4)
140 {
141     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
142 }
143 
144 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
145                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
146 {
147     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
148                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
149 }
150 
151 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
152                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
153 {
154     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
155                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
156 }
157 
158 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
159                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
160 {
161     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
162                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
163 }
164 
165 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
166                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
167 {
168     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
169                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
170 }
171 
172 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
173                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
174 {
175     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
176                 tcgv_i32_arg(a3), a4, a5);
177 }
178 
179 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
180                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
181 {
182     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
183                 tcgv_i64_arg(a3), a4, a5);
184 }
185 
186 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
187                                    TCGv_i32 a3, TCGv_i32 a4,
188                                    TCGv_i32 a5, TCGv_i32 a6)
189 {
190     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
191                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
192                 tcgv_i32_arg(a6));
193 }
194 
195 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
196                                    TCGv_i64 a3, TCGv_i64 a4,
197                                    TCGv_i64 a5, TCGv_i64 a6)
198 {
199     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
200                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
201                 tcgv_i64_arg(a6));
202 }
203 
204 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
205                                     TCGv_i32 a3, TCGv_i32 a4,
206                                     TCGv_i32 a5, TCGArg a6)
207 {
208     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
209                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
210 }
211 
212 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
213                                     TCGv_i64 a3, TCGv_i64 a4,
214                                     TCGv_i64 a5, TCGArg a6)
215 {
216     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
217                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
218 }
219 
220 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
221                                      TCGv_i32 a3, TCGv_i32 a4,
222                                      TCGArg a5, TCGArg a6)
223 {
224     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
225                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
226 }
227 
228 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
229                                      TCGv_i64 a3, TCGv_i64 a4,
230                                      TCGArg a5, TCGArg a6)
231 {
232     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
233                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
234 }
235 
236 
237 /* Generic ops.  */
238 
239 static inline void gen_set_label(TCGLabel *l)
240 {
241     l->present = 1;
242     tcg_gen_op1(INDEX_op_set_label, label_arg(l));
243 }
244 
245 void tcg_gen_br(TCGLabel *l);
246 void tcg_gen_mb(TCGBar);
247 
248 /**
249  * tcg_gen_exit_tb() - output exit_tb TCG operation
250  * @tb: The TranslationBlock from which we are exiting
251  * @idx: Direct jump slot index, or exit request
252  *
253  * See tcg/README for more info about this TCG operation.
254  * See also tcg.h and the block comment above TB_EXIT_MASK.
255  *
256  * For a normal exit from the TB, back to the main loop, @tb should
257  * be NULL and @idx should be 0.  Otherwise, @tb should be valid and
258  * @idx should be one of the TB_EXIT_ values.
259  */
260 void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx);
261 
262 /**
263  * tcg_gen_goto_tb() - output goto_tb TCG operation
264  * @idx: Direct jump slot index (0 or 1)
265  *
266  * See tcg/README for more info about this TCG operation.
267  *
268  * NOTE: In system emulation, direct jumps with goto_tb are only safe within
269  * the pages this TB resides in because we don't take care of direct jumps when
270  * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
271  * static address translation, so the destination address is always valid, TBs
272  * are always invalidated properly, and direct jumps are reset when mapping
273  * changes.
274  */
275 void tcg_gen_goto_tb(unsigned idx);
276 
277 /**
278  * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid
279  * @addr: Guest address of the target TB
280  *
281  * If the TB is not valid, jump to the epilogue.
282  *
283  * This operation is optional. If the TCG backend does not implement goto_ptr,
284  * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
285  */
286 void tcg_gen_lookup_and_goto_ptr(void);
287 
288 static inline void tcg_gen_plugin_cb_start(unsigned from, unsigned type,
289                                            unsigned wr)
290 {
291     tcg_gen_op3(INDEX_op_plugin_cb_start, from, type, wr);
292 }
293 
294 static inline void tcg_gen_plugin_cb_end(void)
295 {
296     tcg_emit_op(INDEX_op_plugin_cb_end, 0);
297 }
298 
299 /* 32 bit ops */
300 
301 void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg);
302 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
303 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
304 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
305 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
306 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
307 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
308 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
309 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
310 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
311 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
312 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
313 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
314 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
315 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
316 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
317 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
318 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
319 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
320 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
321 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
322 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
323 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
324 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
325 void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
326 void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
327 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
328 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
329 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
330 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
331 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
332                          unsigned int ofs, unsigned int len);
333 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
334                            unsigned int ofs, unsigned int len);
335 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
336                          unsigned int ofs, unsigned int len);
337 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
338                           unsigned int ofs, unsigned int len);
339 void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah,
340                           unsigned int ofs);
341 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
342 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
343 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
344                          TCGv_i32 arg1, TCGv_i32 arg2);
345 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
346                           TCGv_i32 arg1, int32_t arg2);
347 void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret,
348                             TCGv_i32 arg1, TCGv_i32 arg2);
349 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
350                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
351 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
352                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
353 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
354                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
355 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
356 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
357 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
358 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
359 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
360 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
361 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
362 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags);
363 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
364 void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg);
365 void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
366 void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
367 void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
368 void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
369 void tcg_gen_abs_i32(TCGv_i32, TCGv_i32);
370 
371 /* Replicate a value of size @vece from @in to all the lanes in @out */
372 void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in);
373 
374 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
375 {
376     tcg_gen_op1_i32(INDEX_op_discard, arg);
377 }
378 
379 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
380 {
381     if (ret != arg) {
382         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
383     }
384 }
385 
386 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
387                                     tcg_target_long offset)
388 {
389     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
390 }
391 
392 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
393                                     tcg_target_long offset)
394 {
395     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
396 }
397 
398 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
399                                      tcg_target_long offset)
400 {
401     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
402 }
403 
404 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
405                                      tcg_target_long offset)
406 {
407     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
408 }
409 
410 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
411                                   tcg_target_long offset)
412 {
413     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
414 }
415 
416 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
417                                    tcg_target_long offset)
418 {
419     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
420 }
421 
422 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
423                                     tcg_target_long offset)
424 {
425     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
426 }
427 
428 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
429                                   tcg_target_long offset)
430 {
431     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
432 }
433 
434 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
435 {
436     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
437 }
438 
439 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
440 {
441     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
442 }
443 
444 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
445 {
446     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
447 }
448 
449 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
450 {
451     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
452 }
453 
454 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
455 {
456     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
457 }
458 
459 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
460 {
461     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
462 }
463 
464 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
465 {
466     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
467 }
468 
469 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
470 {
471     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
472 }
473 
474 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
475 {
476     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
477 }
478 
479 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
480 {
481     if (TCG_TARGET_HAS_neg_i32) {
482         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
483     } else {
484         tcg_gen_subfi_i32(ret, 0, arg);
485     }
486 }
487 
488 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
489 {
490     if (TCG_TARGET_HAS_not_i32) {
491         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
492     } else {
493         tcg_gen_xori_i32(ret, arg, -1);
494     }
495 }
496 
497 /* 64 bit ops */
498 
499 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
500 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
501 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
502 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
503 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
504 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
505 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
506 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
507 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
508 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
509 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
510 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
511 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
512 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
513 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
514 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
515 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
516 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
517 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
518 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
519 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
520 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
521 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
522 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
523 void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
524 void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
525 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
526 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
527 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
528 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
529 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
530                          unsigned int ofs, unsigned int len);
531 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
532                            unsigned int ofs, unsigned int len);
533 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
534                          unsigned int ofs, unsigned int len);
535 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
536                           unsigned int ofs, unsigned int len);
537 void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah,
538                           unsigned int ofs);
539 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
540 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
541 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
542                          TCGv_i64 arg1, TCGv_i64 arg2);
543 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
544                           TCGv_i64 arg1, int64_t arg2);
545 void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret,
546                             TCGv_i64 arg1, TCGv_i64 arg2);
547 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
548                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
549 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
550                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
551 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
552                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
553 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
554 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
555 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
556 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
557 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
558 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
559 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
560 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
561 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
562 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
563 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
564 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
565 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
566 void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg);
567 void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg);
568 void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
569 void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
570 void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
571 void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
572 void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
573 
574 /* Replicate a value of size @vece from @in to all the lanes in @out */
575 void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
576 
577 #if TCG_TARGET_REG_BITS == 64
578 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
579 {
580     tcg_gen_op1_i64(INDEX_op_discard, arg);
581 }
582 
583 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
584 {
585     if (ret != arg) {
586         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
587     }
588 }
589 
590 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
591                                     tcg_target_long offset)
592 {
593     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
594 }
595 
596 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
597                                     tcg_target_long offset)
598 {
599     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
600 }
601 
602 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
603                                      tcg_target_long offset)
604 {
605     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
606 }
607 
608 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
609                                      tcg_target_long offset)
610 {
611     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
612 }
613 
614 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
615                                      tcg_target_long offset)
616 {
617     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
618 }
619 
620 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
621                                      tcg_target_long offset)
622 {
623     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
624 }
625 
626 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
627                                   tcg_target_long offset)
628 {
629     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
630 }
631 
632 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
633                                    tcg_target_long offset)
634 {
635     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
636 }
637 
638 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
639                                     tcg_target_long offset)
640 {
641     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
642 }
643 
644 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
645                                     tcg_target_long offset)
646 {
647     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
648 }
649 
650 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
651                                   tcg_target_long offset)
652 {
653     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
654 }
655 
656 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
657 {
658     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
659 }
660 
661 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
662 {
663     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
664 }
665 
666 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
667 {
668     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
669 }
670 
671 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
672 {
673     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
674 }
675 
676 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
677 {
678     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
679 }
680 
681 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
682 {
683     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
684 }
685 
686 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
687 {
688     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
689 }
690 
691 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
692 {
693     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
694 }
695 
696 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
697 {
698     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
699 }
700 #else /* TCG_TARGET_REG_BITS == 32 */
701 void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
702 void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
703 void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
704 
705 void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
706 void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
707 
708 void tcg_gen_discard_i64(TCGv_i64 arg);
709 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
710 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
711 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
712 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
713 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
714 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
715 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
716 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
717 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
718 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
719 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
720 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
721 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
722 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
723 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
724 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
725 #endif /* TCG_TARGET_REG_BITS */
726 
727 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
728 {
729     if (TCG_TARGET_HAS_neg_i64) {
730         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
731     } else {
732         tcg_gen_subfi_i64(ret, 0, arg);
733     }
734 }
735 
736 /* Size changing operations.  */
737 
738 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
739 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
740 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
741 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
742 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
743 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
744 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
745 
746 void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src);
747 void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg);
748 void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi);
749 
750 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
751 {
752     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
753 }
754 
755 /* Local load/store bit ops */
756 
757 void tcg_gen_qemu_ld_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType);
758 void tcg_gen_qemu_st_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType);
759 void tcg_gen_qemu_ld_i64_chk(TCGv_i64, TCGTemp *, TCGArg, MemOp, TCGType);
760 void tcg_gen_qemu_st_i64_chk(TCGv_i64, TCGTemp *, TCGArg, MemOp, TCGType);
761 void tcg_gen_qemu_ld_i128_chk(TCGv_i128, TCGTemp *, TCGArg, MemOp, TCGType);
762 void tcg_gen_qemu_st_i128_chk(TCGv_i128, TCGTemp *, TCGArg, MemOp, TCGType);
763 
764 /* Atomic ops */
765 
766 void tcg_gen_atomic_cmpxchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, TCGv_i32,
767                                     TCGArg, MemOp, TCGType);
768 void tcg_gen_atomic_cmpxchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, TCGv_i64,
769                                     TCGArg, MemOp, TCGType);
770 void tcg_gen_atomic_cmpxchg_i128_chk(TCGv_i128, TCGTemp *, TCGv_i128,
771                                      TCGv_i128, TCGArg, MemOp, TCGType);
772 
773 void tcg_gen_nonatomic_cmpxchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, TCGv_i32,
774                                        TCGArg, MemOp, TCGType);
775 void tcg_gen_nonatomic_cmpxchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, TCGv_i64,
776                                        TCGArg, MemOp, TCGType);
777 void tcg_gen_nonatomic_cmpxchg_i128_chk(TCGv_i128, TCGTemp *, TCGv_i128,
778                                         TCGv_i128, TCGArg, MemOp, TCGType);
779 
780 void tcg_gen_atomic_xchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
781                                  TCGArg, MemOp, TCGType);
782 void tcg_gen_atomic_xchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
783                                  TCGArg, MemOp, TCGType);
784 
785 void tcg_gen_atomic_fetch_add_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
786                                       TCGArg, MemOp, TCGType);
787 void tcg_gen_atomic_fetch_add_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
788                                       TCGArg, MemOp, TCGType);
789 void tcg_gen_atomic_fetch_and_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
790                                       TCGArg, MemOp, TCGType);
791 void tcg_gen_atomic_fetch_and_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
792                                       TCGArg, MemOp, TCGType);
793 void tcg_gen_atomic_fetch_or_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
794                                      TCGArg, MemOp, TCGType);
795 void tcg_gen_atomic_fetch_or_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
796                                      TCGArg, MemOp, TCGType);
797 void tcg_gen_atomic_fetch_xor_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
798                                       TCGArg, MemOp, TCGType);
799 void tcg_gen_atomic_fetch_xor_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
800                                       TCGArg, MemOp, TCGType);
801 void tcg_gen_atomic_fetch_smin_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
802                                        TCGArg, MemOp, TCGType);
803 void tcg_gen_atomic_fetch_smin_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
804                                        TCGArg, MemOp, TCGType);
805 void tcg_gen_atomic_fetch_umin_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
806                                        TCGArg, MemOp, TCGType);
807 void tcg_gen_atomic_fetch_umin_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
808                                        TCGArg, MemOp, TCGType);
809 void tcg_gen_atomic_fetch_smax_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
810                                        TCGArg, MemOp, TCGType);
811 void tcg_gen_atomic_fetch_smax_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
812                                        TCGArg, MemOp, TCGType);
813 void tcg_gen_atomic_fetch_umax_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
814                                        TCGArg, MemOp, TCGType);
815 void tcg_gen_atomic_fetch_umax_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
816                                        TCGArg, MemOp, TCGType);
817 
818 void tcg_gen_atomic_add_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
819                                       TCGArg, MemOp, TCGType);
820 void tcg_gen_atomic_add_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
821                                       TCGArg, MemOp, TCGType);
822 void tcg_gen_atomic_and_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
823                                       TCGArg, MemOp, TCGType);
824 void tcg_gen_atomic_and_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
825                                       TCGArg, MemOp, TCGType);
826 void tcg_gen_atomic_or_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
827                                      TCGArg, MemOp, TCGType);
828 void tcg_gen_atomic_or_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
829                                      TCGArg, MemOp, TCGType);
830 void tcg_gen_atomic_xor_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
831                                       TCGArg, MemOp, TCGType);
832 void tcg_gen_atomic_xor_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
833                                       TCGArg, MemOp, TCGType);
834 void tcg_gen_atomic_smin_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
835                                        TCGArg, MemOp, TCGType);
836 void tcg_gen_atomic_smin_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
837                                        TCGArg, MemOp, TCGType);
838 void tcg_gen_atomic_umin_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
839                                        TCGArg, MemOp, TCGType);
840 void tcg_gen_atomic_umin_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
841                                        TCGArg, MemOp, TCGType);
842 void tcg_gen_atomic_smax_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
843                                        TCGArg, MemOp, TCGType);
844 void tcg_gen_atomic_smax_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
845                                        TCGArg, MemOp, TCGType);
846 void tcg_gen_atomic_umax_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
847                                        TCGArg, MemOp, TCGType);
848 void tcg_gen_atomic_umax_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
849                                        TCGArg, MemOp, TCGType);
850 
851 /* Vector ops */
852 
853 void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
854 void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
855 void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
856 void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long);
857 void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
858 void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
859 void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
860 void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
861 void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
862 void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
863 void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
864 void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
865 void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
866 void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
867 void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
868 void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
869 void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
870 void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
871 void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
872 void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
873 void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
874 void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
875 void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
876 void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
877 void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
878 void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
879 void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
880 
881 void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
882 void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
883 void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
884 void tcg_gen_rotli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
885 void tcg_gen_rotri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
886 
887 void tcg_gen_shls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
888 void tcg_gen_shrs_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
889 void tcg_gen_sars_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
890 void tcg_gen_rotls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
891 
892 void tcg_gen_shlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
893 void tcg_gen_shrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
894 void tcg_gen_sarv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
895 void tcg_gen_rotlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
896 void tcg_gen_rotrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
897 
898 void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
899                      TCGv_vec a, TCGv_vec b);
900 
901 void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a,
902                         TCGv_vec b, TCGv_vec c);
903 void tcg_gen_cmpsel_vec(TCGCond cond, unsigned vece, TCGv_vec r,
904                         TCGv_vec a, TCGv_vec b, TCGv_vec c, TCGv_vec d);
905 
906 void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
907 void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
908 void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
909 
910 /* Host pointer ops */
911 
912 #if UINTPTR_MAX == UINT32_MAX
913 # define PTR  i32
914 # define NAT  TCGv_i32
915 #else
916 # define PTR  i64
917 # define NAT  TCGv_i64
918 #endif
919 
920 static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
921 {
922     glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
923 }
924 
925 static inline void tcg_gen_st_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
926 {
927     glue(tcg_gen_st_, PTR)((NAT)r, a, o);
928 }
929 
930 static inline void tcg_gen_discard_ptr(TCGv_ptr a)
931 {
932     glue(tcg_gen_discard_,PTR)((NAT)a);
933 }
934 
935 static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
936 {
937     glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
938 }
939 
940 static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
941 {
942     glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
943 }
944 
945 static inline void tcg_gen_mov_ptr(TCGv_ptr d, TCGv_ptr s)
946 {
947     glue(tcg_gen_mov_,PTR)((NAT)d, (NAT)s);
948 }
949 
950 static inline void tcg_gen_movi_ptr(TCGv_ptr d, intptr_t s)
951 {
952     glue(tcg_gen_movi_,PTR)((NAT)d, s);
953 }
954 
955 static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
956                                        intptr_t b, TCGLabel *label)
957 {
958     glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
959 }
960 
961 static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
962 {
963 #if UINTPTR_MAX == UINT32_MAX
964     tcg_gen_mov_i32((NAT)r, a);
965 #else
966     tcg_gen_ext_i32_i64((NAT)r, a);
967 #endif
968 }
969 
970 static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
971 {
972 #if UINTPTR_MAX == UINT32_MAX
973     tcg_gen_extrl_i64_i32((NAT)r, a);
974 #else
975     tcg_gen_mov_i64((NAT)r, a);
976 #endif
977 }
978 
979 static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
980 {
981 #if UINTPTR_MAX == UINT32_MAX
982     tcg_gen_extu_i32_i64(r, (NAT)a);
983 #else
984     tcg_gen_mov_i64(r, (NAT)a);
985 #endif
986 }
987 
988 static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
989 {
990 #if UINTPTR_MAX == UINT32_MAX
991     tcg_gen_mov_i32(r, (NAT)a);
992 #else
993     tcg_gen_extrl_i64_i32(r, (NAT)a);
994 #endif
995 }
996 
997 #undef PTR
998 #undef NAT
999 
1000 #endif /* TCG_TCG_OP_COMMON_H */
1001